* [PATCH v3 0/4] arm64: rockchip: Pine64 PineTab2 support
@ 2024-01-02 16:15 Manuel Traut
2024-01-02 16:15 ` [PATCH v3 1/4] dt-bindings: display: panel: Add BOE TH101MB31IG002-28A panel Manuel Traut
` (4 more replies)
0 siblings, 5 replies; 20+ messages in thread
From: Manuel Traut @ 2024-01-02 16:15 UTC (permalink / raw)
To: Neil Armstrong, Jessica Zhang, Sam Ravnborg, Maarten Lankhorst,
Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Sandy Huang, Mark Yao, Diederik de Haas, Segfault,
Arnaud Ferraris, Danct12, Ondrej Jirman
Cc: dri-devel, devicetree, linux-kernel, linux-arm-kernel,
linux-rockchip, Manuel Traut, Krzysztof Kozlowski
This adds support for the BOE TH101MB31IG002 LCD Panel used in PineTab2 [1] and
PineTab-V [2] as well as the devictrees for the PineTab2 v0.1 and v2.0.
The BOE LCD Panel patch was retrieved from [3]. The function-name prefix has
been adapted and the LCD init section was simplified.
The PineTab2 devicetree patch was retrieved from [4]. Some renaming was needed
to pass the dtb-checks, the brightness-levels are specified as range and steps
instead of a list of values.
[5] and [6] was also used as source for this queue.
[1] https://wiki.pine64.org/wiki/PineTab2
[2] https://wiki.pine64.org/wiki/PineTab-V
[3] https://salsa.debian.org/Mobian-team/devices/kernels/rockchip-linux/-/blob/mobian-6.6/debian/patches/display/0018-drm-panel-add-BOE-TH101MB31IG002-28A-driver.patch?ref_type=heads
[4] https://salsa.debian.org/Mobian-team/devices/kernels/rockchip-linux/-/blob/mobian-6.6/debian/patches/device-tree/0134-arch-arm64-add-Pine64-PineTab2-device-trees.patch?ref_type=heads
[5] https://github.com/dreemurrs-embedded/linux-pinetab2/tree/v6.6.7-danctnix1
[6] https://xff.cz/git/linux?h=pt2-6.7
Signed-off-by: Manuel Traut <manut@mecka.net>
---
Changes in v3:
- PineTab2 dts:
* Remove useless regulator-state-mem nodes for fixed regulators
* Swap mmc0 and mmc1, so mmc0 is now the internal eMMC
- BOE TH101MB31IG002 LCD Panel:
* Remove enabled/prepared checks since they are done in core.
- Use consistent naming (PineTab2 and PineTab-V) in commit messages.
- Link to v2: https://lore.kernel.org/r/20231223-pinetab2-v2-0-ec1856d0030e@mecka.net
Changes in v2:
- Removed dtb-checker fixups, cause I am not sure if they are correct
- Applied review comments for dt bindings
- pinetab2 dts:
* Remove unverified WLAN entries, as in [5]
* Simplify flash LED definition, as in [5]
* Fix headphone detection and sound routing, as in [5]
* Fix CRU clock configuration
- BOE TH101MB31IG002 LCD Panel:
* Reworked prepare/enable unprepare/disable, as in [5]
- Replaced nicknames by realnames in author and signed-offs
- Link to v1: https://lore.kernel.org/r/20231222-pinetab2-v1-0-e148a7f61bd1@mecka.net
---
Alexander Warnecke (2):
drm/panel: Add driver for BOE TH101MB31IG002-28A panel
arm64: dts: rockchip: Add devicetree for Pine64 PineTab2
Manuel Traut (2):
dt-bindings: display: panel: Add BOE TH101MB31IG002-28A panel
dt-bindings: arm64: rockchip: Add Pine64 PineTab2
.../devicetree/bindings/arm/rockchip.yaml | 8 +
.../display/panel/boe,th101mb31ig002-28a.yaml | 58 ++
arch/arm64/boot/dts/rockchip/Makefile | 2 +
.../boot/dts/rockchip/rk3566-pinetab2-v0.1.dts | 26 +
.../boot/dts/rockchip/rk3566-pinetab2-v2.0.dts | 46 +
arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi | 959 +++++++++++++++++++++
drivers/gpu/drm/panel/Kconfig | 11 +
drivers/gpu/drm/panel/Makefile | 1 +
.../gpu/drm/panel/panel-boe-th101mb31ig002-28a.c | 322 +++++++
9 files changed, 1433 insertions(+)
---
base-commit: 610a9b8f49fbcf1100716370d3b5f6f884a2835a
change-id: 20231222-pinetab2-faa77e01db6f
Best regards,
--
Manuel Traut <manut@mecka.net>
^ permalink raw reply [flat|nested] 20+ messages in thread* [PATCH v3 1/4] dt-bindings: display: panel: Add BOE TH101MB31IG002-28A panel 2024-01-02 16:15 [PATCH v3 0/4] arm64: rockchip: Pine64 PineTab2 support Manuel Traut @ 2024-01-02 16:15 ` Manuel Traut 2024-01-02 16:15 ` [PATCH v3 2/4] drm/panel: Add driver for " Manuel Traut ` (3 subsequent siblings) 4 siblings, 0 replies; 20+ messages in thread From: Manuel Traut @ 2024-01-02 16:15 UTC (permalink / raw) To: Neil Armstrong, Jessica Zhang, Sam Ravnborg, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Sandy Huang, Mark Yao, Diederik de Haas, Segfault, Arnaud Ferraris, Danct12, Ondrej Jirman Cc: dri-devel, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip, Manuel Traut, Krzysztof Kozlowski Add bindings for the BOE TH101MB31IG002-28A LCD panel. It is used e.g. in the Pine64 PineTab2 and PineTab-V. Signed-off-by: Manuel Traut <manut@mecka.net> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- .../display/panel/boe,th101mb31ig002-28a.yaml | 58 ++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/boe,th101mb31ig002-28a.yaml b/Documentation/devicetree/bindings/display/panel/boe,th101mb31ig002-28a.yaml new file mode 100644 index 000000000000..32df26cbfeed --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/boe,th101mb31ig002-28a.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/boe,th101mb31ig002-28a.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: BOE TH101MB31IG002-28A WXGA DSI Display Panel + +maintainers: + - Manuel Traut <manut@mecka.net> + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + enum: + # BOE TH101MB31IG002-28A 10.1" WXGA TFT LCD panel + - boe,th101mb31ig002-28a + + reg: true + backlight: true + enable-gpios: true + power-supply: true + port: true + rotation: true + +required: + - compatible + - reg + - enable-gpios + - power-supply + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + dsi { + #address-cells = <1>; + #size-cells = <0>; + panel@0 { + compatible = "boe,th101mb31ig002-28a"; + reg = <0>; + backlight = <&backlight_lcd0>; + enable-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>; + rotation = <90>; + power-supply = <&vcc_3v3>; + port { + panel_in_dsi: endpoint { + remote-endpoint = <&dsi_out_con>; + }; + }; + }; + }; + +... -- 2.43.0 ^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v3 2/4] drm/panel: Add driver for BOE TH101MB31IG002-28A panel 2024-01-02 16:15 [PATCH v3 0/4] arm64: rockchip: Pine64 PineTab2 support Manuel Traut 2024-01-02 16:15 ` [PATCH v3 1/4] dt-bindings: display: panel: Add BOE TH101MB31IG002-28A panel Manuel Traut @ 2024-01-02 16:15 ` Manuel Traut 2024-01-08 18:24 ` Jessica Zhang 2024-01-02 16:15 ` [PATCH v3 3/4] dt-bindings: arm64: rockchip: Add Pine64 PineTab2 Manuel Traut ` (2 subsequent siblings) 4 siblings, 1 reply; 20+ messages in thread From: Manuel Traut @ 2024-01-02 16:15 UTC (permalink / raw) To: Neil Armstrong, Jessica Zhang, Sam Ravnborg, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Sandy Huang, Mark Yao, Diederik de Haas, Segfault, Arnaud Ferraris, Danct12, Ondrej Jirman Cc: dri-devel, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip, Manuel Traut From: Alexander Warnecke <awarnecke002@hotmail.com> The BOE TH101MB31IG002-28A panel is a WXGA panel. It is used in Pine64 PineTab2 and PineTab-V. Signed-off-by: Alexander Warnecke <awarnecke002@hotmail.com> Signed-off-by: Manuel Traut <manut@mecka.net> --- drivers/gpu/drm/panel/Kconfig | 11 + drivers/gpu/drm/panel/Makefile | 1 + .../gpu/drm/panel/panel-boe-th101mb31ig002-28a.c | 322 +++++++++++++++++++++ 3 files changed, 334 insertions(+) diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index 99e14dc212ec..927ddd10e688 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -67,6 +67,17 @@ config DRM_PANEL_BOE_HIMAX8279D 24 bit RGB per pixel. It provides a MIPI DSI interface to the host and has a built-in LED backlight. +config DRM_PANEL_BOE_TH101MB31UIG002_28A + tristate "Boe TH101MB31UIG002-28A panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to enable support for Boe + TH101MB31UIG002-28A TFT-LCD modules. The panel has a 800x1280 + resolution and uses 24 bit RGB per pixel. It provides a MIPI DSI + interface to the host and has a built-in LED backlight. + config DRM_PANEL_BOE_TV101WUM_NL6 tristate "BOE TV101WUM and AUO KD101N80 45NA 1200x1920 panel" depends on OF diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index d10c3de51c6d..dd6e1ac9d0a2 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596) += panel-asus-z00t-tm5p5-n35596. obj-$(CONFIG_DRM_PANEL_AUO_A030JTN01) += panel-auo-a030jtn01.o obj-$(CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0) += panel-boe-bf060y8m-aj0.o obj-$(CONFIG_DRM_PANEL_BOE_HIMAX8279D) += panel-boe-himax8279d.o +obj-$(CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A) += panel-boe-th101mb31ig002-28a.o obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_NL6) += panel-boe-tv101wum-nl6.o obj-$(CONFIG_DRM_PANEL_DSI_CM) += panel-dsi-cm.o obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o diff --git a/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c b/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c new file mode 100644 index 000000000000..763e9f8342d3 --- /dev/null +++ b/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c @@ -0,0 +1,322 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2023 Alexander Warnecke <awarnecke002@hotmail.com> + * Copyright (c) 2023 Manuel Traut <manut@mecka.net> + * Copyright (c) 2023 Dang Huynh <danct12@riseup.net> + */ + +#include <linux/delay.h> +#include <linux/gpio/consumer.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/regulator/consumer.h> + +#include <drm/drm_connector.h> +#include <drm/drm_mipi_dsi.h> +#include <drm/drm_modes.h> +#include <drm/drm_panel.h> + +struct boe_th101mb31ig002 { + struct drm_panel panel; + + struct mipi_dsi_device *dsi; + + struct regulator *power; + struct gpio_desc *enable; + struct gpio_desc *reset; + + enum drm_panel_orientation orientation; +}; + +static void boe_th101mb31ig002_reset(struct boe_th101mb31ig002 *ctx) +{ + gpiod_direction_output(ctx->reset, 0); + usleep_range(10, 100); + gpiod_direction_output(ctx->reset, 1); + usleep_range(10, 100); + gpiod_direction_output(ctx->reset, 0); + usleep_range(5000, 6000); +} + +static int boe_th101mb31ig002_enable(struct drm_panel *panel) +{ + struct boe_th101mb31ig002 *ctx = container_of(panel, + struct boe_th101mb31ig002, + panel); + struct mipi_dsi_device *dsi = ctx->dsi; + struct device *dev = &dsi->dev; + int ret; + + mipi_dsi_dcs_write_seq(dsi, 0xE0, 0xAB, 0xBA); + mipi_dsi_dcs_write_seq(dsi, 0xE1, 0xBA, 0xAB); + mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x10, 0x01, 0x47, 0xFF); + mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x0C, 0x14, 0x04, 0x50, 0x50, 0x14); + mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x56, 0x53, 0x00); + mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x33, 0x30, 0x04); + mipi_dsi_dcs_write_seq(dsi, 0xB6, 0xB0, 0x00, 0x00, 0x10, 0x00, 0x10, + 0x00); + mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x05, 0x12, 0x29, 0x49, 0x48, 0x00, + 0x00); + mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x7C, 0x65, 0x55, 0x49, 0x46, 0x36, + 0x3B, 0x24, 0x3D, 0x3C, 0x3D, 0x5C, 0x4C, + 0x55, 0x47, 0x46, 0x39, 0x26, 0x06, 0x7C, + 0x65, 0x55, 0x49, 0x46, 0x36, 0x3B, 0x24, + 0x3D, 0x3C, 0x3D, 0x5C, 0x4C, 0x55, 0x47, + 0x46, 0x39, 0x26, 0x06); + mipi_dsi_dcs_write_seq(dsi, 0x00, 0xFF, 0x87, 0x12, 0x34, 0x44, 0x44, + 0x44, 0x44, 0x98, 0x04, 0x98, 0x04, 0x0F, + 0x00, 0x00, 0xC1); + mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x54, 0x94, 0x02, 0x85, 0x9F, 0x00, + 0x7F, 0x00, 0x54, 0x00); + mipi_dsi_dcs_write_seq(dsi, 0xC2, 0x17, 0x09, 0x08, 0x89, 0x08, 0x11, + 0x22, 0x20, 0x44, 0xFF, 0x18, 0x00); + mipi_dsi_dcs_write_seq(dsi, 0xC3, 0x86, 0x46, 0x05, 0x05, 0x1C, 0x1C, + 0x1D, 0x1D, 0x02, 0x1F, 0x1F, 0x1E, 0x1E, + 0x0F, 0x0F, 0x0D, 0x0D, 0x13, 0x13, 0x11, + 0x11, 0x00); + mipi_dsi_dcs_write_seq(dsi, 0xC4, 0x07, 0x07, 0x04, 0x04, 0x1C, 0x1C, + 0x1D, 0x1D, 0x02, 0x1F, 0x1F, 0x1E, 0x1E, + 0x0E, 0x0E, 0x0C, 0x0C, 0x12, 0x12, 0x10, + 0x10, 0x00); + mipi_dsi_dcs_write_seq(dsi, 0xC6, 0x2A, 0x2A); + mipi_dsi_dcs_write_seq(dsi, 0xC8, 0x21, 0x00, 0x31, 0x42, 0x34, 0x16); + mipi_dsi_dcs_write_seq(dsi, 0xCA, 0xCB, 0x43); + mipi_dsi_dcs_write_seq(dsi, 0xCD, 0x0E, 0x4B, 0x4B, 0x20, 0x19, 0x6B, + 0x06, 0xB3); + mipi_dsi_dcs_write_seq(dsi, 0xD2, 0xE3, 0x2B, 0x38, 0x00); + mipi_dsi_dcs_write_seq(dsi, 0xD4, 0x00, 0x01, 0x00, 0x0E, 0x04, 0x44, + 0x08, 0x10, 0x00, 0x00, 0x00); + mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x80, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF); + mipi_dsi_dcs_write_seq(dsi, 0xF0, 0x12, 0x03, 0x20, 0x00, 0xFF); + mipi_dsi_dcs_write_seq(dsi, 0xF3, 0x00); + + ret = mipi_dsi_dcs_exit_sleep_mode(dsi); + if (ret < 0) { + dev_err(dev, "Failed to exit sleep mode: %d\n", ret); + return ret; + } + + msleep(120); + + ret = mipi_dsi_dcs_set_display_on(dsi); + if (ret < 0) { + dev_err(dev, "Failed to set panel on: %d\n", ret); + return ret; + } + + return 0; +} + +static int boe_th101mb31ig002_disable(struct drm_panel *panel) +{ + struct boe_th101mb31ig002 *ctx = container_of(panel, + struct boe_th101mb31ig002, + panel); + struct mipi_dsi_device *dsi = ctx->dsi; + struct device *dev = &dsi->dev; + int ret; + + ret = mipi_dsi_dcs_set_display_off(dsi); + if (ret < 0) + dev_err(dev, "Failed to set panel off: %d\n", ret); + + msleep(120); + + ret = mipi_dsi_dcs_enter_sleep_mode(dsi); + if (ret < 0) + dev_err(dev, "Failed to enter sleep mode: %d\n", ret); + + return 0; +} + +static int boe_th101mb31ig002_unprepare(struct drm_panel *panel) +{ + struct boe_th101mb31ig002 *ctx = container_of(panel, + struct boe_th101mb31ig002, + panel); + + gpiod_set_value_cansleep(ctx->reset, 1); + gpiod_set_value_cansleep(ctx->enable, 0); + regulator_disable(ctx->power); + + return 0; +} + +static int boe_th101mb31ig002_prepare(struct drm_panel *panel) +{ + struct boe_th101mb31ig002 *ctx = container_of(panel, + struct boe_th101mb31ig002, + panel); + struct device *dev = &ctx->dsi->dev; + int ret; + + ret = regulator_enable(ctx->power); + if (ret) { + dev_err(dev, "Failed to enable power supply: %d\n", ret); + return ret; + } + + gpiod_set_value_cansleep(ctx->enable, 1); + msleep(50); + boe_th101mb31ig002_reset(ctx); + boe_th101mb31ig002_enable(panel); + + return 0; +} + +static const struct drm_display_mode boe_th101mb31ig002_default_mode = { + .clock = 73500, + .hdisplay = 800, + .hsync_start = 800 + 64, + .hsync_end = 800 + 64 + 16, + .htotal = 800 + 64 + 16 + 64, + .vdisplay = 1280, + .vsync_start = 1280 + 2, + .vsync_end = 1280 + 2 + 4, + .vtotal = 1280 + 2 + 4 + 12, + .width_mm = 135, + .height_mm = 216, + .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, +}; + +static int boe_th101mb31ig002_get_modes(struct drm_panel *panel, + struct drm_connector *connector) +{ + struct boe_th101mb31ig002 *ctx = container_of(panel, + struct boe_th101mb31ig002, + panel); + struct drm_display_mode *mode; + + mode = drm_mode_duplicate(connector->dev, + &boe_th101mb31ig002_default_mode); + if (!mode) { + dev_err(panel->dev, "Failed to add mode %ux%u@%u\n", + boe_th101mb31ig002_default_mode.hdisplay, + boe_th101mb31ig002_default_mode.vdisplay, + drm_mode_vrefresh(&boe_th101mb31ig002_default_mode)); + return -ENOMEM; + } + + drm_mode_set_name(mode); + + connector->display_info.bpc = 8; + connector->display_info.width_mm = mode->width_mm; + connector->display_info.height_mm = mode->height_mm; + + /* + * TODO: Remove once all drm drivers call + * drm_connector_set_orientation_from_panel() + */ + drm_connector_set_panel_orientation(connector, ctx->orientation); + + drm_mode_probed_add(connector, mode); + + return 1; +} + +static enum drm_panel_orientation +boe_th101mb31ig002_get_orientation(struct drm_panel *panel) +{ + struct boe_th101mb31ig002 *ctx = container_of(panel, + struct boe_th101mb31ig002, + panel); + + return ctx->orientation; +} + +static const struct drm_panel_funcs boe_th101mb31ig002_funcs = { + .prepare = boe_th101mb31ig002_prepare, + .unprepare = boe_th101mb31ig002_unprepare, + .disable = boe_th101mb31ig002_disable, + .get_modes = boe_th101mb31ig002_get_modes, + .get_orientation = boe_th101mb31ig002_get_orientation, +}; + +static int boe_th101mb31ig002_dsi_probe(struct mipi_dsi_device *dsi) +{ + struct boe_th101mb31ig002 *ctx; + int ret; + + ctx = devm_kzalloc(&dsi->dev, sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return -ENOMEM; + + mipi_dsi_set_drvdata(dsi, ctx); + ctx->dsi = dsi; + + dsi->lanes = 4; + dsi->format = MIPI_DSI_FMT_RGB888; + dsi->mode_flags = MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_NO_EOT_PACKET | + MIPI_DSI_MODE_LPM; + + ctx->power = devm_regulator_get(&dsi->dev, "power"); + if (IS_ERR(ctx->power)) + return dev_err_probe(&dsi->dev, PTR_ERR(ctx->power), + "Failed to get power regulator\n"); + + ctx->enable = devm_gpiod_get(&dsi->dev, "enable", GPIOD_OUT_LOW); + if (IS_ERR(ctx->enable)) + return dev_err_probe(&dsi->dev, PTR_ERR(ctx->enable), + "Failed to get enable GPIO\n"); + + ctx->reset = devm_gpiod_get(&dsi->dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(ctx->reset)) + return dev_err_probe(&dsi->dev, PTR_ERR(ctx->reset), + "Failed to get reset GPIO\n"); + + ret = of_drm_get_panel_orientation(dsi->dev.of_node, + &ctx->orientation); + if (ret) + return dev_err_probe(&dsi->dev, ret, + "Failed to get orientation\n"); + + drm_panel_init(&ctx->panel, &dsi->dev, &boe_th101mb31ig002_funcs, + DRM_MODE_CONNECTOR_DSI); + + ret = drm_panel_of_backlight(&ctx->panel); + if (ret) + return ret; + + drm_panel_add(&ctx->panel); + + ret = mipi_dsi_attach(dsi); + if (ret < 0) { + dev_err_probe(&dsi->dev, ret, + "Failed to attach panel to DSI host\n"); + drm_panel_remove(&ctx->panel); + return ret; + } + + return 0; +} + +static void boe_th101mb31ig002_dsi_remove(struct mipi_dsi_device *dsi) +{ + struct boe_th101mb31ig002 *ctx = mipi_dsi_get_drvdata(dsi); + + mipi_dsi_detach(dsi); + drm_panel_remove(&ctx->panel); +} + +static const struct of_device_id boe_th101mb31ig002_of_match[] = { + { .compatible = "boe,th101mb31ig002-28a", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, boe_th101mb31ig002_of_match); + +static struct mipi_dsi_driver boe_th101mb31ig002_driver = { + .driver = { + .name = "boe-th101mb31ig002-28a", + .of_match_table = boe_th101mb31ig002_of_match, + }, + .probe = boe_th101mb31ig002_dsi_probe, + .remove = boe_th101mb31ig002_dsi_remove, +}; +module_mipi_dsi_driver(boe_th101mb31ig002_driver); + +MODULE_AUTHOR("Alexander Warnecke <awarnecke002@hotmail.com>"); +MODULE_DESCRIPTION("BOE TH101MB31IG002-28A MIPI-DSI LCD panel"); +MODULE_LICENSE("GPL"); -- 2.43.0 ^ permalink raw reply related [flat|nested] 20+ messages in thread
* Re: [PATCH v3 2/4] drm/panel: Add driver for BOE TH101MB31IG002-28A panel 2024-01-02 16:15 ` [PATCH v3 2/4] drm/panel: Add driver for " Manuel Traut @ 2024-01-08 18:24 ` Jessica Zhang 0 siblings, 0 replies; 20+ messages in thread From: Jessica Zhang @ 2024-01-08 18:24 UTC (permalink / raw) To: Manuel Traut, Neil Armstrong, Sam Ravnborg, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Sandy Huang, Mark Yao, Diederik de Haas, Segfault, Arnaud Ferraris, Danct12, Ondrej Jirman Cc: devicetree, linux-kernel, dri-devel, linux-rockchip, linux-arm-kernel On 1/2/2024 8:15 AM, Manuel Traut wrote: > From: Alexander Warnecke <awarnecke002@hotmail.com> > > The BOE TH101MB31IG002-28A panel is a WXGA panel. > It is used in Pine64 PineTab2 and PineTab-V. > > Signed-off-by: Alexander Warnecke <awarnecke002@hotmail.com> > Signed-off-by: Manuel Traut <manut@mecka.net> > --- > drivers/gpu/drm/panel/Kconfig | 11 + > drivers/gpu/drm/panel/Makefile | 1 + > .../gpu/drm/panel/panel-boe-th101mb31ig002-28a.c | 322 +++++++++++++++++++++ > 3 files changed, 334 insertions(+) > > diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig > index 99e14dc212ec..927ddd10e688 100644 > --- a/drivers/gpu/drm/panel/Kconfig > +++ b/drivers/gpu/drm/panel/Kconfig > @@ -67,6 +67,17 @@ config DRM_PANEL_BOE_HIMAX8279D > 24 bit RGB per pixel. It provides a MIPI DSI interface to > the host and has a built-in LED backlight. > > +config DRM_PANEL_BOE_TH101MB31UIG002_28A > + tristate "Boe TH101MB31UIG002-28A panel" > + depends on OF > + depends on DRM_MIPI_DSI > + depends on BACKLIGHT_CLASS_DEVICE > + help > + Say Y here if you want to enable support for Boe > + TH101MB31UIG002-28A TFT-LCD modules. The panel has a 800x1280 > + resolution and uses 24 bit RGB per pixel. It provides a MIPI DSI > + interface to the host and has a built-in LED backlight. > + > config DRM_PANEL_BOE_TV101WUM_NL6 > tristate "BOE TV101WUM and AUO KD101N80 45NA 1200x1920 panel" > depends on OF > diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile > index d10c3de51c6d..dd6e1ac9d0a2 100644 > --- a/drivers/gpu/drm/panel/Makefile > +++ b/drivers/gpu/drm/panel/Makefile > @@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596) += panel-asus-z00t-tm5p5-n35596. > obj-$(CONFIG_DRM_PANEL_AUO_A030JTN01) += panel-auo-a030jtn01.o > obj-$(CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0) += panel-boe-bf060y8m-aj0.o > obj-$(CONFIG_DRM_PANEL_BOE_HIMAX8279D) += panel-boe-himax8279d.o > +obj-$(CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A) += panel-boe-th101mb31ig002-28a.o > obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_NL6) += panel-boe-tv101wum-nl6.o > obj-$(CONFIG_DRM_PANEL_DSI_CM) += panel-dsi-cm.o > obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o > diff --git a/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c b/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c > new file mode 100644 > index 000000000000..763e9f8342d3 > --- /dev/null > +++ b/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c > @@ -0,0 +1,322 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Copyright (c) 2023 Alexander Warnecke <awarnecke002@hotmail.com> > + * Copyright (c) 2023 Manuel Traut <manut@mecka.net> > + * Copyright (c) 2023 Dang Huynh <danct12@riseup.net> > + */ > + > +#include <linux/delay.h> > +#include <linux/gpio/consumer.h> > +#include <linux/module.h> > +#include <linux/of.h> > +#include <linux/of_device.h> > +#include <linux/regulator/consumer.h> > + > +#include <drm/drm_connector.h> > +#include <drm/drm_mipi_dsi.h> > +#include <drm/drm_modes.h> > +#include <drm/drm_panel.h> > + > +struct boe_th101mb31ig002 { > + struct drm_panel panel; > + > + struct mipi_dsi_device *dsi; > + > + struct regulator *power; > + struct gpio_desc *enable; > + struct gpio_desc *reset; > + > + enum drm_panel_orientation orientation; > +}; > + > +static void boe_th101mb31ig002_reset(struct boe_th101mb31ig002 *ctx) > +{ > + gpiod_direction_output(ctx->reset, 0); > + usleep_range(10, 100); > + gpiod_direction_output(ctx->reset, 1); > + usleep_range(10, 100); > + gpiod_direction_output(ctx->reset, 0); > + usleep_range(5000, 6000); > +} > + > +static int boe_th101mb31ig002_enable(struct drm_panel *panel) > +{ > + struct boe_th101mb31ig002 *ctx = container_of(panel, > + struct boe_th101mb31ig002, > + panel); > + struct mipi_dsi_device *dsi = ctx->dsi; > + struct device *dev = &dsi->dev; > + int ret; > + > + mipi_dsi_dcs_write_seq(dsi, 0xE0, 0xAB, 0xBA); > + mipi_dsi_dcs_write_seq(dsi, 0xE1, 0xBA, 0xAB); > + mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x10, 0x01, 0x47, 0xFF); > + mipi_dsi_dcs_write_seq(dsi, 0xB2, 0x0C, 0x14, 0x04, 0x50, 0x50, 0x14); > + mipi_dsi_dcs_write_seq(dsi, 0xB3, 0x56, 0x53, 0x00); > + mipi_dsi_dcs_write_seq(dsi, 0xB4, 0x33, 0x30, 0x04); > + mipi_dsi_dcs_write_seq(dsi, 0xB6, 0xB0, 0x00, 0x00, 0x10, 0x00, 0x10, > + 0x00); > + mipi_dsi_dcs_write_seq(dsi, 0xB8, 0x05, 0x12, 0x29, 0x49, 0x48, 0x00, > + 0x00); > + mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x7C, 0x65, 0x55, 0x49, 0x46, 0x36, > + 0x3B, 0x24, 0x3D, 0x3C, 0x3D, 0x5C, 0x4C, > + 0x55, 0x47, 0x46, 0x39, 0x26, 0x06, 0x7C, > + 0x65, 0x55, 0x49, 0x46, 0x36, 0x3B, 0x24, > + 0x3D, 0x3C, 0x3D, 0x5C, 0x4C, 0x55, 0x47, > + 0x46, 0x39, 0x26, 0x06); > + mipi_dsi_dcs_write_seq(dsi, 0x00, 0xFF, 0x87, 0x12, 0x34, 0x44, 0x44, > + 0x44, 0x44, 0x98, 0x04, 0x98, 0x04, 0x0F, > + 0x00, 0x00, 0xC1); Hi Manuel, (I'm assuming the `0x00` here is not MIPI_DCS_NOP) Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com> Thanks, Jessica Zhang > + mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x54, 0x94, 0x02, 0x85, 0x9F, 0x00, > + 0x7F, 0x00, 0x54, 0x00); > + mipi_dsi_dcs_write_seq(dsi, 0xC2, 0x17, 0x09, 0x08, 0x89, 0x08, 0x11, > + 0x22, 0x20, 0x44, 0xFF, 0x18, 0x00); > + mipi_dsi_dcs_write_seq(dsi, 0xC3, 0x86, 0x46, 0x05, 0x05, 0x1C, 0x1C, > + 0x1D, 0x1D, 0x02, 0x1F, 0x1F, 0x1E, 0x1E, > + 0x0F, 0x0F, 0x0D, 0x0D, 0x13, 0x13, 0x11, > + 0x11, 0x00); > + mipi_dsi_dcs_write_seq(dsi, 0xC4, 0x07, 0x07, 0x04, 0x04, 0x1C, 0x1C, > + 0x1D, 0x1D, 0x02, 0x1F, 0x1F, 0x1E, 0x1E, > + 0x0E, 0x0E, 0x0C, 0x0C, 0x12, 0x12, 0x10, > + 0x10, 0x00); > + mipi_dsi_dcs_write_seq(dsi, 0xC6, 0x2A, 0x2A); > + mipi_dsi_dcs_write_seq(dsi, 0xC8, 0x21, 0x00, 0x31, 0x42, 0x34, 0x16); > + mipi_dsi_dcs_write_seq(dsi, 0xCA, 0xCB, 0x43); > + mipi_dsi_dcs_write_seq(dsi, 0xCD, 0x0E, 0x4B, 0x4B, 0x20, 0x19, 0x6B, > + 0x06, 0xB3); > + mipi_dsi_dcs_write_seq(dsi, 0xD2, 0xE3, 0x2B, 0x38, 0x00); > + mipi_dsi_dcs_write_seq(dsi, 0xD4, 0x00, 0x01, 0x00, 0x0E, 0x04, 0x44, > + 0x08, 0x10, 0x00, 0x00, 0x00); > + mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x80, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, > + 0xFF, 0xFF); > + mipi_dsi_dcs_write_seq(dsi, 0xF0, 0x12, 0x03, 0x20, 0x00, 0xFF); > + mipi_dsi_dcs_write_seq(dsi, 0xF3, 0x00); > + > + ret = mipi_dsi_dcs_exit_sleep_mode(dsi); > + if (ret < 0) { > + dev_err(dev, "Failed to exit sleep mode: %d\n", ret); > + return ret; > + } > + > + msleep(120); > + > + ret = mipi_dsi_dcs_set_display_on(dsi); > + if (ret < 0) { > + dev_err(dev, "Failed to set panel on: %d\n", ret); > + return ret; > + } > + > + return 0; > +} > + > +static int boe_th101mb31ig002_disable(struct drm_panel *panel) > +{ > + struct boe_th101mb31ig002 *ctx = container_of(panel, > + struct boe_th101mb31ig002, > + panel); > + struct mipi_dsi_device *dsi = ctx->dsi; > + struct device *dev = &dsi->dev; > + int ret; > + > + ret = mipi_dsi_dcs_set_display_off(dsi); > + if (ret < 0) > + dev_err(dev, "Failed to set panel off: %d\n", ret); > + > + msleep(120); > + > + ret = mipi_dsi_dcs_enter_sleep_mode(dsi); > + if (ret < 0) > + dev_err(dev, "Failed to enter sleep mode: %d\n", ret); > + > + return 0; > +} > + > +static int boe_th101mb31ig002_unprepare(struct drm_panel *panel) > +{ > + struct boe_th101mb31ig002 *ctx = container_of(panel, > + struct boe_th101mb31ig002, > + panel); > + > + gpiod_set_value_cansleep(ctx->reset, 1); > + gpiod_set_value_cansleep(ctx->enable, 0); > + regulator_disable(ctx->power); > + > + return 0; > +} > + > +static int boe_th101mb31ig002_prepare(struct drm_panel *panel) > +{ > + struct boe_th101mb31ig002 *ctx = container_of(panel, > + struct boe_th101mb31ig002, > + panel); > + struct device *dev = &ctx->dsi->dev; > + int ret; > + > + ret = regulator_enable(ctx->power); > + if (ret) { > + dev_err(dev, "Failed to enable power supply: %d\n", ret); > + return ret; > + } > + > + gpiod_set_value_cansleep(ctx->enable, 1); > + msleep(50); > + boe_th101mb31ig002_reset(ctx); > + boe_th101mb31ig002_enable(panel); > + > + return 0; > +} > + > +static const struct drm_display_mode boe_th101mb31ig002_default_mode = { > + .clock = 73500, > + .hdisplay = 800, > + .hsync_start = 800 + 64, > + .hsync_end = 800 + 64 + 16, > + .htotal = 800 + 64 + 16 + 64, > + .vdisplay = 1280, > + .vsync_start = 1280 + 2, > + .vsync_end = 1280 + 2 + 4, > + .vtotal = 1280 + 2 + 4 + 12, > + .width_mm = 135, > + .height_mm = 216, > + .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > +}; > + > +static int boe_th101mb31ig002_get_modes(struct drm_panel *panel, > + struct drm_connector *connector) > +{ > + struct boe_th101mb31ig002 *ctx = container_of(panel, > + struct boe_th101mb31ig002, > + panel); > + struct drm_display_mode *mode; > + > + mode = drm_mode_duplicate(connector->dev, > + &boe_th101mb31ig002_default_mode); > + if (!mode) { > + dev_err(panel->dev, "Failed to add mode %ux%u@%u\n", > + boe_th101mb31ig002_default_mode.hdisplay, > + boe_th101mb31ig002_default_mode.vdisplay, > + drm_mode_vrefresh(&boe_th101mb31ig002_default_mode)); > + return -ENOMEM; > + } > + > + drm_mode_set_name(mode); > + > + connector->display_info.bpc = 8; > + connector->display_info.width_mm = mode->width_mm; > + connector->display_info.height_mm = mode->height_mm; > + > + /* > + * TODO: Remove once all drm drivers call > + * drm_connector_set_orientation_from_panel() > + */ > + drm_connector_set_panel_orientation(connector, ctx->orientation); > + > + drm_mode_probed_add(connector, mode); > + > + return 1; > +} > + > +static enum drm_panel_orientation > +boe_th101mb31ig002_get_orientation(struct drm_panel *panel) > +{ > + struct boe_th101mb31ig002 *ctx = container_of(panel, > + struct boe_th101mb31ig002, > + panel); > + > + return ctx->orientation; > +} > + > +static const struct drm_panel_funcs boe_th101mb31ig002_funcs = { > + .prepare = boe_th101mb31ig002_prepare, > + .unprepare = boe_th101mb31ig002_unprepare, > + .disable = boe_th101mb31ig002_disable, > + .get_modes = boe_th101mb31ig002_get_modes, > + .get_orientation = boe_th101mb31ig002_get_orientation, > +}; > + > +static int boe_th101mb31ig002_dsi_probe(struct mipi_dsi_device *dsi) > +{ > + struct boe_th101mb31ig002 *ctx; > + int ret; > + > + ctx = devm_kzalloc(&dsi->dev, sizeof(*ctx), GFP_KERNEL); > + if (!ctx) > + return -ENOMEM; > + > + mipi_dsi_set_drvdata(dsi, ctx); > + ctx->dsi = dsi; > + > + dsi->lanes = 4; > + dsi->format = MIPI_DSI_FMT_RGB888; > + dsi->mode_flags = MIPI_DSI_MODE_VIDEO_BURST | > + MIPI_DSI_MODE_NO_EOT_PACKET | > + MIPI_DSI_MODE_LPM; > + > + ctx->power = devm_regulator_get(&dsi->dev, "power"); > + if (IS_ERR(ctx->power)) > + return dev_err_probe(&dsi->dev, PTR_ERR(ctx->power), > + "Failed to get power regulator\n"); > + > + ctx->enable = devm_gpiod_get(&dsi->dev, "enable", GPIOD_OUT_LOW); > + if (IS_ERR(ctx->enable)) > + return dev_err_probe(&dsi->dev, PTR_ERR(ctx->enable), > + "Failed to get enable GPIO\n"); > + > + ctx->reset = devm_gpiod_get(&dsi->dev, "reset", GPIOD_OUT_HIGH); > + if (IS_ERR(ctx->reset)) > + return dev_err_probe(&dsi->dev, PTR_ERR(ctx->reset), > + "Failed to get reset GPIO\n"); > + > + ret = of_drm_get_panel_orientation(dsi->dev.of_node, > + &ctx->orientation); > + if (ret) > + return dev_err_probe(&dsi->dev, ret, > + "Failed to get orientation\n"); > + > + drm_panel_init(&ctx->panel, &dsi->dev, &boe_th101mb31ig002_funcs, > + DRM_MODE_CONNECTOR_DSI); > + > + ret = drm_panel_of_backlight(&ctx->panel); > + if (ret) > + return ret; > + > + drm_panel_add(&ctx->panel); > + > + ret = mipi_dsi_attach(dsi); > + if (ret < 0) { > + dev_err_probe(&dsi->dev, ret, > + "Failed to attach panel to DSI host\n"); > + drm_panel_remove(&ctx->panel); > + return ret; > + } > + > + return 0; > +} > + > +static void boe_th101mb31ig002_dsi_remove(struct mipi_dsi_device *dsi) > +{ > + struct boe_th101mb31ig002 *ctx = mipi_dsi_get_drvdata(dsi); > + > + mipi_dsi_detach(dsi); > + drm_panel_remove(&ctx->panel); > +} > + > +static const struct of_device_id boe_th101mb31ig002_of_match[] = { > + { .compatible = "boe,th101mb31ig002-28a", }, > + { /* sentinel */ } > +}; > +MODULE_DEVICE_TABLE(of, boe_th101mb31ig002_of_match); > + > +static struct mipi_dsi_driver boe_th101mb31ig002_driver = { > + .driver = { > + .name = "boe-th101mb31ig002-28a", > + .of_match_table = boe_th101mb31ig002_of_match, > + }, > + .probe = boe_th101mb31ig002_dsi_probe, > + .remove = boe_th101mb31ig002_dsi_remove, > +}; > +module_mipi_dsi_driver(boe_th101mb31ig002_driver); > + > +MODULE_AUTHOR("Alexander Warnecke <awarnecke002@hotmail.com>"); > +MODULE_DESCRIPTION("BOE TH101MB31IG002-28A MIPI-DSI LCD panel"); > +MODULE_LICENSE("GPL"); > > -- > 2.43.0 > ^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v3 3/4] dt-bindings: arm64: rockchip: Add Pine64 PineTab2 2024-01-02 16:15 [PATCH v3 0/4] arm64: rockchip: Pine64 PineTab2 support Manuel Traut 2024-01-02 16:15 ` [PATCH v3 1/4] dt-bindings: display: panel: Add BOE TH101MB31IG002-28A panel Manuel Traut 2024-01-02 16:15 ` [PATCH v3 2/4] drm/panel: Add driver for " Manuel Traut @ 2024-01-02 16:15 ` Manuel Traut 2024-01-02 16:15 ` [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for " Manuel Traut 2024-01-12 9:25 ` (subset) [PATCH v3 0/4] arm64: rockchip: Pine64 PineTab2 support neil.armstrong 4 siblings, 0 replies; 20+ messages in thread From: Manuel Traut @ 2024-01-02 16:15 UTC (permalink / raw) To: Neil Armstrong, Jessica Zhang, Sam Ravnborg, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Sandy Huang, Mark Yao, Diederik de Haas, Segfault, Arnaud Ferraris, Danct12, Ondrej Jirman Cc: dri-devel, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip, Manuel Traut, Krzysztof Kozlowski Add devicvetree binding documentation for Pine64 PineTab2 which uses the Rockchip RK3566 SoC. Signed-off-by: Manuel Traut <manut@mecka.net> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- Documentation/devicetree/bindings/arm/rockchip.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 5f7c6c4aad8f..96d54b0587ab 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -635,6 +635,14 @@ properties: - const: pine64,pinenote - const: rockchip,rk3566 + - description: Pine64 PineTab2 + items: + - enum: + - pine64,pinetab2-v0.1 + - pine64,pinetab2-v2.0 + - const: pine64,pinetab2 + - const: rockchip,rk3566 + - description: Pine64 PinePhonePro items: - const: pine64,pinephone-pro -- 2.43.0 ^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2 2024-01-02 16:15 [PATCH v3 0/4] arm64: rockchip: Pine64 PineTab2 support Manuel Traut ` (2 preceding siblings ...) 2024-01-02 16:15 ` [PATCH v3 3/4] dt-bindings: arm64: rockchip: Add Pine64 PineTab2 Manuel Traut @ 2024-01-02 16:15 ` Manuel Traut 2024-01-02 18:07 ` Ondřej Jirman 2024-01-03 9:42 ` Ondřej Jirman 2024-01-12 9:25 ` (subset) [PATCH v3 0/4] arm64: rockchip: Pine64 PineTab2 support neil.armstrong 4 siblings, 2 replies; 20+ messages in thread From: Manuel Traut @ 2024-01-02 16:15 UTC (permalink / raw) To: Neil Armstrong, Jessica Zhang, Sam Ravnborg, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Sandy Huang, Mark Yao, Diederik de Haas, Segfault, Arnaud Ferraris, Danct12, Ondrej Jirman Cc: dri-devel, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip, Manuel Traut From: Alexander Warnecke <awarnecke002@hotmail.com> This includes support for both the v0.1 units that were sent to developers and the v2.0 units from production. v1.0 is not included as no units are known to exist. Working/Tested: - SDMMC - UART - Buttons - Charging/Battery/PMIC - Audio - USB - Display Signed-off-by: Alexander Warnecke <awarnecke002@hotmail.com> Signed-off-by: Manuel Traut <manut@mecka.net> Tested-By: Diederik de Haas <didi.debian@cknow.org> --- arch/arm64/boot/dts/rockchip/Makefile | 2 + .../boot/dts/rockchip/rk3566-pinetab2-v0.1.dts | 26 + .../boot/dts/rockchip/rk3566-pinetab2-v2.0.dts | 46 + arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi | 959 +++++++++++++++++++++ 4 files changed, 1033 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index a18f33bf0c0e..ef66c0937a9b 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -77,6 +77,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353vs.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinetab2-v0.1.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinetab2-v2.0.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-rgb30.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-b.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v0.1.dts b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v0.1.dts new file mode 100644 index 000000000000..8b110186a3eb --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v0.1.dts @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include "rk3566-pinetab2.dtsi" + +/ { + model = "Pine64 PineTab2 v0.1"; + compatible = "pine64,pinetab2-v0.1", "pine64,pinetab2", "rockchip,rk3566"; +}; + +&lcd { + reset-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>; +}; + +&pinctrl { + lcd0 { + lcd0_rst_l: lcd0-rst-l { + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&sdmmc1 { + vmmc-supply = <&vcc3v3_sys>; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v2.0.dts b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v2.0.dts new file mode 100644 index 000000000000..6f80446b5802 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2-v2.0.dts @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include "rk3566-pinetab2.dtsi" + +/ { + model = "Pine64 PineTab2 v2.0"; + compatible = "pine64,pinetab2-v2.0", "pine64,pinetab2", "rockchip,rk3566"; +}; + +&gpio_keys { + pinctrl-0 = <&kb_id_det>, <&hall_int_l>; + + event-hall-sensor { + debounce-interval = <20>; + gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>; + label = "Hall Sensor"; + linux,code = <SW_LID>; + linux,input-type = <EV_SW>; + wakeup-event-action = <EV_ACT_DEASSERTED>; + wakeup-source; + }; +}; + +&lcd { + reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>; +}; + +&pinctrl { + lcd0 { + lcd0_rst_l: lcd0-rst-l { + rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hall { + hall_int_l: hall-int-l { + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&sdmmc1 { + vmmc-supply = <&vcc_sys>; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi new file mode 100644 index 000000000000..5d895628406b --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi @@ -0,0 +1,959 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/gpio-keys.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/soc/rockchip,vop2.h> +#include <dt-bindings/usb/pd.h> +#include "rk3566.dtsi" + +/ { + chassis-type = "tablet"; + + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc0; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <25>; + + button-vol-up { + label = "Volume Up"; + linux,code = <KEY_VOLUMEUP>; + press-threshold-microvolt = <297500>; + }; + + button-vol-down { + label = "Volume Down"; + linux,code = <KEY_VOLUMEDOWN>; + press-threshold-microvolt = <1750>; + }; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm4 0 25000 0>; + brightness-levels = <20 220>; + num-interpolated-steps = <200>; + default-brightness-level = <100>; + power-supply = <&vcc_sys>; + }; + + battery: battery { + compatible = "simple-battery"; + charge-full-design-microamp-hours = <6000000>; + charge-term-current-microamp = <300000>; + constant-charge-current-max-microamp = <2000000>; + constant-charge-voltage-max-microvolt = <4300000>; + voltage-max-design-microvolt = <4350000>; + voltage-min-design-microvolt = <3400000>; + + ocv-capacity-celsius = <20>; + ocv-capacity-table-0 = <4322000 100>, <4250000 95>, <4192000 90>, <4136000 85>, + <4080000 80>, <4022000 75>, <3972000 70>, <3928000 65>, + <3885000 60>, <3833000 55>, <3798000 50>, <3780000 45>, + <3776000 40>, <3773000 35>, <3755000 30>, <3706000 25>, + <3640000 20>, <3589000 15>, <3535000 10>, <3492000 5>, + <3400000 0>; + }; + + gpio_keys: gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&kb_id_det>; + + tablet-mode-switch { + debounce-interval = <20>; + gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; + label = "Tablet Mode"; + linux,input-type = <EV_SW>; + linux,code = <SW_TABLET_MODE>; + }; + }; + + hdmi-con { + compatible = "hdmi-connector"; + type = "d"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + pinctrl-names = "default"; + pinctrl-0 = <&flash_led_en_h>; + + led-0 { + gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; + color = <LED_COLOR_ID_WHITE>; + function = LED_FUNCTION_FLASH; + }; + }; + + rk817-sound { + compatible = "simple-audio-card"; + pinctrl-names = "default"; + pinctrl-0 = <&hp_det_l>; + simple-audio-card,format = "i2s"; + simple-audio-card,name = "rk817_ext"; + simple-audio-card,mclk-fs = <256>; + + simple-audio-card,widgets = + "Microphone", "Mic Jack", + "Headphone", "Headphones", + "Speaker", "Internal Speakers"; + + simple-audio-card,routing = + "MICR", "Mic Jack", + "Headphones", "HPOL", + "Headphones", "HPOR", + "Internal Speakers", "Speaker Amplifier OUTL", + "Internal Speakers", "Speaker Amplifier OUTR", + "Speaker Amplifier INL", "HPOL", + "Speaker Amplifier INR", "HPOR"; + simple-audio-card,hp-det-gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>; + simple-audio-card,aux-devs = <&speaker_amp>; + simple-audio-card,pin-switches = "Internal Speakers"; + + simple-audio-card,cpu { + sound-dai = <&i2s1_8ch>; + }; + + simple-audio-card,codec { + sound-dai = <&rk817>; + }; + }; + + speaker_amp: speaker-amplifier { + compatible = "simple-audio-amplifier"; + pinctrl-names = "default"; + pinctrl-0 = <&spk_ctl>; + enable-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; + sound-name-prefix = "Speaker Amplifier"; + VCC-supply = <&vcc_bat>; + }; + + vcc_3v3: vcc-3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc3v3_sys>; + }; + + vcc3v3_minipcie: vcc3v3-minipcie { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pwren_h>; + regulator-name = "vcc3v3_minipcie"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_sys>; + }; + + vcc3v3_sd: vcc3v3-sd { + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_pwren_l>; + regulator-name = "vcc3v3_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc3v3_sys>; + }; + + vcc5v0_usb_host0: vcc5v0-usb-host0 { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&usb_host_pwren1_h>; + regulator-name = "vcc5v0_usb_host0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v_midu>; + }; + + vcc5v0_usb_host2: vcc5v0-usb-host2 { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&usb_host_pwren2_h>; + regulator-name = "vcc5v0_usb_host2"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v_midu>; + }; + + vcc_bat: vcc-bat { + compatible = "regulator-fixed"; + regulator-name = "vcc_bat"; + regulator-always-on; + regulator-boot-on; + }; + + vcc_sys: vcc-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc_bat>; + }; + + vdd1v2_dvp: vdd1v2-dvp { + compatible = "regulator-fixed"; + regulator-name = "vdd1v2_dvp"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + vin-supply = <&vcc_3v3>; + /*enable-supply = <&vcc2v8_dvp>;*/ + }; +}; + +&combphy1 { + status = "okay"; +}; + +&combphy2 { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + +&cru { + assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>, + <&pmucru PLL_PPLL>, <&cru PLL_VPLL>; + assigned-clock-rates = <32768>, <1200000000>, <200000000>, <500000000>; + assigned-clock-parents = <&pmucru CLK_RTC32K_FRAC>; +}; + +&csi_dphy { + status = "okay"; +}; + +&dsi0 { + status = "okay"; + clock-master; + #address-cells = <1>; + #size-cells = <0>; + + lcd: panel@0 { + compatible = "boe,th101mb31ig002-28a"; + reg = <0>; + backlight = <&backlight>; + enable-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&lcd_pwren_h &lcd0_rst_l>; + rotation = <90>; + power-supply = <&vcc_3v3>; + + port@0 { + panel_in_dsi: endpoint@0 { + remote-endpoint = <&dsi0_out_con>; + }; + }; + }; +}; + +&dsi0_in { + dsi0_in_vp1: endpoint { + remote-endpoint = <&vp1_out_dsi0>; + }; +}; + +&dsi0_out { + dsi0_out_con: endpoint { + remote-endpoint = <&panel_in_dsi>; + }; +}; + +&dsi_dphy0 { + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_gpu_npu>; + status = "okay"; +}; + +&hdmi { + avdd-0v9-supply = <&vdda_0v9_p>; + avdd-1v8-supply = <&vcc_1v8>; + status = "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + status = "okay"; + + vdd_cpu: regulator@1c { + compatible = "tcs,tcs4525"; + reg = <0x1c>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1150000>; + regulator-ramp-delay = <2300>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk817: pmic@20 { + compatible = "rockchip,rk817"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; + clock-names = "mclk"; + clocks = <&cru I2S1_MCLKOUT_TX>; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + #clock-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>; + rockchip,system-power-controller; + #sound-dai-cells = <0>; + wakeup-source; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc5-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc_sys>; + vcc9-supply = <&vcc5v_midu>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_logic"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu_npu: DCDC_REG2 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_gpu_npu"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + regulator-name = "vcc_ddr"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc3v3_sys: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = <0x2>; + regulator-name = "vcc3v3_sys"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca1v8_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdda_0v9_p: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda_0v9_p"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda0v9_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_acodec"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_1v8: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_dvp: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc1v8_dvp"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc2v8_dvp: LDO_REG9 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "vcc2v8_dvp"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc5v_midu: BOOST { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-name = "boost"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vbus: OTG_SWITCH { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-name = "otg_switch"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + charger { + monitored-battery = <&battery>; + rockchip,resistor-sense-micro-ohms = <10000>; + rockchip,sleep-enter-current-microamp = <300000>; + rockchip,sleep-filter-current-microamp = <100000>; + }; + }; +}; + +&i2c1 { + clock-frequency = <400000>; + status = "okay"; + + touchscreen@5d { + compatible = "goodix,gt911"; + reg = <0x5d>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PB0 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&tp_int_l_pmuio2>, <&tp_rst_l_pmuio2>; + AVDD28-supply = <&vcc3v3_pmu>; + VDDIO-supply = <&vcca1v8_pmu>; + irq-gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; + }; +}; + +&i2c2 { + clock-frequency = <400000>; + pinctrl-0 = <&i2c2m1_xfer>; + status = "okay"; + + vcm@c { + compatible = "dongwoon,dw9714"; + reg = <0x0c>; + vcc-supply = <&vcc1v8_dvp>; + }; + + camera@36 { + compatible = "ovti,ov5648"; + reg = <0x36>; + pinctrl-names = "default"; + pinctrl-0 = <&camerab_pdn_l &camerab_rst_l>; + + clocks = <&cru CLK_CIF_OUT>; + assigned-clocks = <&cru CLK_CIF_OUT>; + assigned-clock-rates = <24000000>; + + avdd-supply = <&vcc2v8_dvp>; + dvdd-supply = <&vdd1v2_dvp>; + dovdd-supply = <&vcc1v8_dvp>; + powerdown-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; + reset-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>; + + port { + endpoint { + data-lanes = <1 2>; + remote-endpoint = <0>; + link-frequencies = /bits/ 64 <210000000 168000000>; + }; + }; + }; +}; + +&i2c5 { + clock-frequency = <400000>; + status = "okay"; + + accelerometer@18 { + compatible = "silan,sc7a20"; + reg = <0x18>; + interrupt-parent = <&gpio3>; + interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&gsensor_int_l>; + st,drdy-int-pin = <1>; + vdd-supply = <&vcc_1v8>; + vddio-supply = <&vcc_1v8>; + mount-matrix = "1", "0", "0", + "0", "0", "1", + "0", "1", "0"; + }; +}; + +&i2s0_8ch { + status = "okay"; +}; + +&i2s1_8ch { + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m0_sclktx + &i2s1m0_lrcktx + &i2s1m0_sdi0 + &i2s1m0_sdo0>; + rockchip,trcm-sync-tx-only; + status = "okay"; +}; + +&pcie2x1 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_reset_h>; + reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_minipcie>; + status = "okay"; +}; + +&pinctrl { + bt { + bt_wake_host_h: bt-wake-host-h { + rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + camerab { + camerab_pdn_l: camerab-pdn-l { + rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + camerab_rst_l: camerab-rst-l { + rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + cameraf { + cameraf_pdn_l: cameraf-pdn-l { + rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + cameraf_rst_l: cameraf-rst-l { + rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + flash { + flash_led_en_h: flash-led-en-h { + rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + fspi { + fspi_dual_io_pins: fspi-dual-io-pins { + rockchip,pins = + /* fspi_clk */ + <1 RK_PD0 1 &pcfg_pull_none>, + /* fspi_cs0n */ + <1 RK_PD3 1 &pcfg_pull_none>, + /* fspi_d0 */ + <1 RK_PD1 1 &pcfg_pull_none>, + /* fspi_d1 */ + <1 RK_PD2 1 &pcfg_pull_none>; + }; + }; + + gsensor { + gsensor_int_l: gsensor-int-l { + rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + kb { + kb_id_det: kb-id-det { + rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + lcd { + lcd_pwren_h: lcd-pwren-h { + rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie { + pcie_pwren_h: pcie-pwren-h { + rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie_reset_h: pcie-reset-h { + rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdmmc { + sdmmc_pwren_l: sdmmc-pwren-l { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + sound { + hp_det_l: hp-det-l { + rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + spk_ctl: spk-ctl { + rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + tp { + tp_int_l_pmuio2: tp-int-l-pmuio2 { + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + tp_rst_l_pmuio2: tp-rst-l-pmuio2 { + rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + usbcc_int_l: usbcc-int-l { + rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usb_host_pwren1_h: usb-host-pwren1-h { + rockchip,pins = <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usb_host_pwren2_h: usb-host-pwren2-h { + rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wifi { + host_wake_wl: host-wake-wl { + rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + wifi_pwren: wifi-pwren { + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + wifi_wake_host_h: wifi-wake-host-h { + rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcca1v8_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio2-supply = <&vcc_1v8>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_1v8>; + vccio6-supply = <&vcc1v8_dvp>; + vccio7-supply = <&vcc_3v3>; + status = "okay"; +}; + +&pwm4 { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcc_1v8>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + no-sdio; + no-sd; + non-removable; + max-frequency = <200000000>; + mmc-hs200-1_8v; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_bus8 + &emmc_clk + &emmc_cmd + &emmc_datastrobe + &emmc_rstnout>; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc_1v8>; + status = "okay"; +}; + +&sdmmc0 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 + &sdmmc0_clk + &sdmmc0_cmd + &sdmmc0_det>; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&sdmmc1 { + bus-width = <4>; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc1_bus4 + &sdmmc1_cmd + &sdmmc1_clk>; + sd-uhs-sdr104; + vqmmc-supply = <&vcca1v8_pmu>; + status = "okay"; +}; + +&sfc { + pinctrl-names = "default"; + pinctrl-0 = <&fspi_dual_io_pins>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + spi-rx-bus-width = <2>; + spi-tx-bus-width = <1>; + }; +}; + +&tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1m0_xfer + &uart1m0_ctsn + &uart1m0_rtsn>; + status = "okay"; + uart-has-rtscts; +}; + +&uart2 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host0_xhci { + status = "okay"; +}; + +&usb_host1_xhci { + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy0_host { + phy-supply = <&vcc5v0_usb_host0>; + status = "okay"; +}; + +&usb2phy0_otg { + status = "okay"; +}; + +&usb2phy1 { + status = "okay"; +}; + +&usb2phy1_otg { + phy-supply = <&vcc5v0_usb_host2>; + status = "okay"; +}; + +&vop { + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = <ROCKCHIP_VOP2_EP_HDMI0>; + remote-endpoint = <&hdmi_in_vp0>; + }; +}; + +&vp1 { + vp1_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 { + reg = <ROCKCHIP_VOP2_EP_MIPI0>; + remote-endpoint = <&dsi0_in_vp1>; + }; +}; -- 2.43.0 ^ permalink raw reply related [flat|nested] 20+ messages in thread
* Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2 2024-01-02 16:15 ` [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for " Manuel Traut @ 2024-01-02 18:07 ` Ondřej Jirman 2024-01-02 20:56 ` Jonas Karlman ` (2 more replies) 2024-01-03 9:42 ` Ondřej Jirman 1 sibling, 3 replies; 20+ messages in thread From: Ondřej Jirman @ 2024-01-02 18:07 UTC (permalink / raw) To: Manuel Traut Cc: Neil Armstrong, Jessica Zhang, Sam Ravnborg, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Sandy Huang, Mark Yao, Diederik de Haas, Segfault, Arnaud Ferraris, Danct12, dri-devel, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip Hello Manuel, see below... On Tue, Jan 02, 2024 at 05:15:47PM +0100, Manuel Traut wrote: > From: Alexander Warnecke <awarnecke002@hotmail.com> > > [...] > > diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi > new file mode 100644 > index 000000000000..5d895628406b > --- /dev/null > +++ b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi > @@ -0,0 +1,959 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > + > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/input/gpio-keys.h> > +#include <dt-bindings/input/input.h> > +#include <dt-bindings/leds/common.h> > +#include <dt-bindings/pinctrl/rockchip.h> > +#include <dt-bindings/soc/rockchip,vop2.h> > +#include <dt-bindings/usb/pd.h> > +#include "rk3566.dtsi" > + > +/ { > + chassis-type = "tablet"; > + > + aliases { > + mmc0 = &sdhci; > + mmc1 = &sdmmc0; > + }; > + > + chosen { > + stdout-path = "serial2:1500000n8"; > + }; > + > + adc-keys { > + compatible = "adc-keys"; > + io-channels = <&saradc 0>; > + io-channel-names = "buttons"; > + keyup-threshold-microvolt = <1800000>; > + poll-interval = <25>; > + > + button-vol-up { > + label = "Volume Up"; > + linux,code = <KEY_VOLUMEUP>; > + press-threshold-microvolt = <297500>; > + }; > + > + button-vol-down { > + label = "Volume Down"; > + linux,code = <KEY_VOLUMEDOWN>; > + press-threshold-microvolt = <1750>; > + }; > + }; > + > + backlight: backlight { > + compatible = "pwm-backlight"; > + pwms = <&pwm4 0 25000 0>; > + brightness-levels = <20 220>; > + num-interpolated-steps = <200>; Does this linear brightness -> PWM duty cycle mapping lead to linear relationship between brighntess level and subjective brightness on this HW? I doubt it a bit... > + default-brightness-level = <100>; > + power-supply = <&vcc_sys>; > + }; > + > + battery: battery { > + compatible = "simple-battery"; > + charge-full-design-microamp-hours = <6000000>; > + charge-term-current-microamp = <300000>; > + constant-charge-current-max-microamp = <2000000>; > + constant-charge-voltage-max-microvolt = <4300000>; > + voltage-max-design-microvolt = <4350000>; > + voltage-min-design-microvolt = <3400000>; > + > + ocv-capacity-celsius = <20>; > + ocv-capacity-table-0 = <4322000 100>, <4250000 95>, <4192000 90>, <4136000 85>, > + <4080000 80>, <4022000 75>, <3972000 70>, <3928000 65>, > + <3885000 60>, <3833000 55>, <3798000 50>, <3780000 45>, > + <3776000 40>, <3773000 35>, <3755000 30>, <3706000 25>, > + <3640000 20>, <3589000 15>, <3535000 10>, <3492000 5>, > + <3400000 0>; > + }; > + > + gpio_keys: gpio-keys { > + compatible = "gpio-keys"; > + pinctrl-names = "default"; > + pinctrl-0 = <&kb_id_det>; > + > + tablet-mode-switch { > + debounce-interval = <20>; > + gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; > + label = "Tablet Mode"; > + linux,input-type = <EV_SW>; > + linux,code = <SW_TABLET_MODE>; > + }; > + }; > + > + hdmi-con { hdmi-connector > + compatible = "hdmi-connector"; > + type = "d"; > + > + port { > + hdmi_con_in: endpoint { > + remote-endpoint = <&hdmi_out_con>; > + }; > + }; > + }; > + > + leds { > + compatible = "gpio-leds"; > + Spurious newline ^ > + pinctrl-names = "default"; > + pinctrl-0 = <&flash_led_en_h>; > + > + led-0 { > + gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; > + color = <LED_COLOR_ID_WHITE>; > + function = LED_FUNCTION_FLASH; > + }; > + }; > + > + rk817-sound { > + compatible = "simple-audio-card"; > + pinctrl-names = "default"; > + pinctrl-0 = <&hp_det_l>; > + simple-audio-card,format = "i2s"; > + simple-audio-card,name = "rk817_ext"; > + simple-audio-card,mclk-fs = <256>; > + > + simple-audio-card,widgets = > + "Microphone", "Mic Jack", > + "Headphone", "Headphones", > + "Speaker", "Internal Speakers"; > + > + simple-audio-card,routing = > + "MICR", "Mic Jack", > + "Headphones", "HPOL", > + "Headphones", "HPOR", > + "Internal Speakers", "Speaker Amplifier OUTL", > + "Internal Speakers", "Speaker Amplifier OUTR", > + "Speaker Amplifier INL", "HPOL", > + "Speaker Amplifier INR", "HPOR"; > + simple-audio-card,hp-det-gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>; > + simple-audio-card,aux-devs = <&speaker_amp>; > + simple-audio-card,pin-switches = "Internal Speakers"; > + > + simple-audio-card,cpu { > + sound-dai = <&i2s1_8ch>; > + }; > + > + simple-audio-card,codec { > + sound-dai = <&rk817>; > + }; > + }; > + > + speaker_amp: speaker-amplifier { > + compatible = "simple-audio-amplifier"; > + pinctrl-names = "default"; > + pinctrl-0 = <&spk_ctl>; > + enable-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; > + sound-name-prefix = "Speaker Amplifier"; > + VCC-supply = <&vcc_bat>; > + }; > + > + vcc_3v3: vcc-3v3 { Regulator node names shoule end with -regulator suffix. The same applies for all of the below nodes. > + compatible = "regulator-fixed"; > + regulator-name = "vcc_3v3"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&vcc3v3_sys>; > + }; > + > + vcc3v3_minipcie: vcc3v3-minipcie { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pcie_pwren_h>; > + regulator-name = "vcc3v3_minipcie"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&vcc_sys>; > + }; > + > + vcc3v3_sd: vcc3v3-sd { > + compatible = "regulator-fixed"; > + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sdmmc_pwren_l>; > + regulator-name = "vcc3v3_sd"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&vcc3v3_sys>; > + }; > + > + vcc5v0_usb_host0: vcc5v0-usb-host0 { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&usb_host_pwren1_h>; > + regulator-name = "vcc5v0_usb_host0"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&vcc5v_midu>; > + }; > + > + vcc5v0_usb_host2: vcc5v0-usb-host2 { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&usb_host_pwren2_h>; > + regulator-name = "vcc5v0_usb_host2"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&vcc5v_midu>; > + }; > + > + vcc_bat: vcc-bat { > + compatible = "regulator-fixed"; > + regulator-name = "vcc_bat"; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + vcc_sys: vcc-sys { > + compatible = "regulator-fixed"; > + regulator-name = "vcc_sys"; > + regulator-always-on; > + regulator-boot-on; > + vin-supply = <&vcc_bat>; > + }; > + > + vdd1v2_dvp: vdd1v2-dvp { > + compatible = "regulator-fixed"; > + regulator-name = "vdd1v2_dvp"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1200000>; > + vin-supply = <&vcc_3v3>; > + /*enable-supply = <&vcc2v8_dvp>;*/ There's no such property. Delete this commented out line. > + }; > +}; > + > +&combphy1 { > + status = "okay"; > +}; > + > +&combphy2 { > + status = "okay"; > +}; > + > +&cpu0 { > + cpu-supply = <&vdd_cpu>; > +}; > + > +&cpu1 { > + cpu-supply = <&vdd_cpu>; > +}; > + > +&cpu2 { > + cpu-supply = <&vdd_cpu>; > +}; > + > +&cpu3 { > + cpu-supply = <&vdd_cpu>; > +}; > + > +&cru { > + assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>, > + <&pmucru PLL_PPLL>, <&cru PLL_VPLL>; > + assigned-clock-rates = <32768>, <1200000000>, <200000000>, <500000000>; > + assigned-clock-parents = <&pmucru CLK_RTC32K_FRAC>; > +}; > + > +&csi_dphy { > + status = "okay"; > +}; > + > +&dsi0 { > + status = "okay"; > + clock-master; > + #address-cells = <1>; > + #size-cells = <0>; > + > + lcd: panel@0 { > + compatible = "boe,th101mb31ig002-28a"; > + reg = <0>; > + backlight = <&backlight>; > + enable-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&lcd_pwren_h &lcd0_rst_l>; Re lcd0_rst_l: It's a bit weird conceptually to reference from dtsi something that's only declared in dts that includes the dtsi. Maybe move pinctrl-* properties to dts &lcd, too... > + rotation = <90>; > + power-supply = <&vcc_3v3>; > + > + port@0 { > + panel_in_dsi: endpoint@0 { > + remote-endpoint = <&dsi0_out_con>; > + }; > + }; > + }; > +}; > + > +&dsi0_in { > + dsi0_in_vp1: endpoint { > + remote-endpoint = <&vp1_out_dsi0>; > + }; > +}; > + > +&dsi0_out { > + dsi0_out_con: endpoint { > + remote-endpoint = <&panel_in_dsi>; > + }; > +}; > + > +&dsi_dphy0 { > + status = "okay"; > +}; > + > +&gpu { > + mali-supply = <&vdd_gpu_npu>; > + status = "okay"; > +}; > + > +&hdmi { > + avdd-0v9-supply = <&vdda_0v9_p>; > + avdd-1v8-supply = <&vcc_1v8>; > + status = "okay"; > +}; > + > +&hdmi_in { > + hdmi_in_vp0: endpoint { > + remote-endpoint = <&vp0_out_hdmi>; > + }; > +}; > + > +&hdmi_out { > + hdmi_out_con: endpoint { > + remote-endpoint = <&hdmi_con_in>; > + }; > +}; > + > +&hdmi_sound { > + status = "okay"; > +}; > + > +&i2c0 { > + clock-frequency = <400000>; > + status = "okay"; > + > + vdd_cpu: regulator@1c { > + compatible = "tcs,tcs4525"; > + reg = <0x1c>; > + fcs,suspend-voltage-selector = <1>; > + regulator-name = "vdd_cpu"; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1150000>; > + regulator-ramp-delay = <2300>; > + regulator-always-on; > + regulator-boot-on; > + vin-supply = <&vcc_sys>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + rk817: pmic@20 { > + compatible = "rockchip,rk817"; > + reg = <0x20>; > + interrupt-parent = <&gpio0>; > + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; > + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; > + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; > + clock-names = "mclk"; > + clocks = <&cru I2S1_MCLKOUT_TX>; > + clock-output-names = "rk808-clkout1", "rk808-clkout2"; > + #clock-cells = <1>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>; > + rockchip,system-power-controller; > + #sound-dai-cells = <0>; > + wakeup-source; > + > + vcc1-supply = <&vcc_sys>; > + vcc2-supply = <&vcc_sys>; > + vcc3-supply = <&vcc_sys>; > + vcc4-supply = <&vcc_sys>; > + vcc5-supply = <&vcc_sys>; > + vcc6-supply = <&vcc_sys>; > + vcc7-supply = <&vcc_sys>; > + vcc8-supply = <&vcc_sys>; > + vcc9-supply = <&vcc5v_midu>; > + > + regulators { > + vdd_logic: DCDC_REG1 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <500000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <6001>; > + regulator-initial-mode = <0x2>; > + regulator-name = "vdd_logic"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdd_gpu_npu: DCDC_REG2 { > + regulator-min-microvolt = <500000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <6001>; > + regulator-initial-mode = <0x2>; > + regulator-name = "vdd_gpu_npu"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_ddr: DCDC_REG3 { > + regulator-always-on; > + regulator-boot-on; > + regulator-initial-mode = <0x2>; > + regulator-name = "vcc_ddr"; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vcc3v3_sys: DCDC_REG4 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-initial-mode = <0x2>; > + regulator-name = "vcc3v3_sys"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcca1v8_pmu: LDO_REG1 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-name = "vcca1v8_pmu"; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vdda_0v9_p: LDO_REG2 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <900000>; > + regulator-name = "vdda_0v9_p"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdda0v9_pmu: LDO_REG3 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <900000>; > + regulator-name = "vdda0v9_pmu"; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vccio_acodec: LDO_REG4 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vccio_acodec"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vccio_sd: LDO_REG5 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vccio_sd"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc3v3_pmu: LDO_REG6 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vcc3v3_pmu"; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vcc_1v8: LDO_REG7 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-name = "vcc_1v8"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc1v8_dvp: LDO_REG8 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-name = "vcc1v8_dvp"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc2v8_dvp: LDO_REG9 { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <2800000>; > + regulator-max-microvolt = <2800000>; > + regulator-name = "vcc2v8_dvp"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc5v_midu: BOOST { > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + regulator-name = "boost"; > + regulator-state-mem { > + regulator-off-in-suspend; I guess this prevents remote USB wakeup by USB devices. Like wakeup via USB keyboard. Probably not a bad thing, though. > + }; > + }; > + > + vbus: OTG_SWITCH { > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + regulator-name = "otg_switch"; > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + }; > + > + charger { > + monitored-battery = <&battery>; > + rockchip,resistor-sense-micro-ohms = <10000>; > + rockchip,sleep-enter-current-microamp = <300000>; > + rockchip,sleep-filter-current-microamp = <100000>; > + }; > + }; > +}; > + > +&i2c1 { > + clock-frequency = <400000>; > + status = "okay"; > + > + touchscreen@5d { > + compatible = "goodix,gt911"; > + reg = <0x5d>; > + interrupt-parent = <&gpio0>; > + interrupts = <RK_PB0 IRQ_TYPE_EDGE_FALLING>; > + pinctrl-names = "default"; > + pinctrl-0 = <&tp_int_l_pmuio2>, <&tp_rst_l_pmuio2>; > + AVDD28-supply = <&vcc3v3_pmu>; > + VDDIO-supply = <&vcca1v8_pmu>; > + irq-gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; > + reset-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; > + }; > +}; > + > +&i2c2 { > + clock-frequency = <400000>; > + pinctrl-0 = <&i2c2m1_xfer>; > + status = "okay"; > + > + vcm@c { > + compatible = "dongwoon,dw9714"; > + reg = <0x0c>; > + vcc-supply = <&vcc1v8_dvp>; > + }; > + > + camera@36 { > + compatible = "ovti,ov5648"; > + reg = <0x36>; > + pinctrl-names = "default"; > + pinctrl-0 = <&camerab_pdn_l &camerab_rst_l>; > + > + clocks = <&cru CLK_CIF_OUT>; > + assigned-clocks = <&cru CLK_CIF_OUT>; > + assigned-clock-rates = <24000000>; > + > + avdd-supply = <&vcc2v8_dvp>; > + dvdd-supply = <&vdd1v2_dvp>; > + dovdd-supply = <&vcc1v8_dvp>; > + powerdown-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; > + reset-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>; > + > + port { > + endpoint { > + data-lanes = <1 2>; > + remote-endpoint = <0>; > + link-frequencies = /bits/ 64 <210000000 168000000>; > + }; > + }; > + }; > +}; > + > +&i2c5 { > + clock-frequency = <400000>; > + status = "okay"; > + > + accelerometer@18 { > + compatible = "silan,sc7a20"; > + reg = <0x18>; > + interrupt-parent = <&gpio3>; > + interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>; > + pinctrl-names = "default"; > + pinctrl-0 = <&gsensor_int_l>; > + st,drdy-int-pin = <1>; > + vdd-supply = <&vcc_1v8>; > + vddio-supply = <&vcc_1v8>; > + mount-matrix = "1", "0", "0", > + "0", "0", "1", > + "0", "1", "0"; > + }; > +}; > + > +&i2s0_8ch { > + status = "okay"; > +}; > + > +&i2s1_8ch { > + pinctrl-names = "default"; > + pinctrl-0 = <&i2s1m0_sclktx > + &i2s1m0_lrcktx > + &i2s1m0_sdi0 > + &i2s1m0_sdo0>; > + rockchip,trcm-sync-tx-only; > + status = "okay"; > +}; > + > +&pcie2x1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pcie_reset_h>; > + reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; > + vpcie3v3-supply = <&vcc3v3_minipcie>; > + status = "okay"; > +}; Does it make sense to enable this HW block by default, when it isn't used on actual HW? > +&pinctrl { > + bt { > + bt_wake_host_h: bt-wake-host-h { > + rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>; > + }; > + }; ^^^ unused > + > + camerab { > + camerab_pdn_l: camerab-pdn-l { > + rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > + camerab_rst_l: camerab-rst-l { > + rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + cameraf { > + cameraf_pdn_l: cameraf-pdn-l { > + rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > + cameraf_rst_l: cameraf-rst-l { > + rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; ^^^ unused > + > + flash { > + flash_led_en_h: flash-led-en-h { > + rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + fspi { > + fspi_dual_io_pins: fspi-dual-io-pins { > + rockchip,pins = > + /* fspi_clk */ > + <1 RK_PD0 1 &pcfg_pull_none>, > + /* fspi_cs0n */ > + <1 RK_PD3 1 &pcfg_pull_none>, > + /* fspi_d0 */ > + <1 RK_PD1 1 &pcfg_pull_none>, > + /* fspi_d1 */ > + <1 RK_PD2 1 &pcfg_pull_none>; > + }; > + }; > + > + gsensor { > + gsensor_int_l: gsensor-int-l { > + rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + }; > + > + kb { > + kb_id_det: kb-id-det { > + rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + lcd { > + lcd_pwren_h: lcd-pwren-h { > + rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + pcie { > + pcie_pwren_h: pcie-pwren-h { > + rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > + pcie_reset_h: pcie-reset-h { > + rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + pmic { > + pmic_int_l: pmic-int-l { > + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + }; > + > + sdmmc { > + sdmmc_pwren_l: sdmmc-pwren-l { > + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + sound { > + hp_det_l: hp-det-l { > + rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > + spk_ctl: spk-ctl { > + rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + tp { > + tp_int_l_pmuio2: tp-int-l-pmuio2 { > + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + > + tp_rst_l_pmuio2: tp-rst-l-pmuio2 { > + rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + usb { > + usbcc_int_l: usbcc-int-l { > + rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; > + }; ^^^ unused > + usb_host_pwren1_h: usb-host-pwren1-h { > + rockchip,pins = <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > + usb_host_pwren2_h: usb-host-pwren2-h { > + rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + wifi { > + host_wake_wl: host-wake-wl { > + rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > + wifi_pwren: wifi-pwren { > + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > + wifi_wake_host_h: wifi-wake-host-h { > + rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>; > + }; > + }; ^^^ all of this wifi stuff is unused Also wifi_pwren is not really useful on actual HW. W_VBAT is routed directly to wifi chip, with wifi_pwren_h signal having no effect: (short via R9664) https://megous.com/dl/tmp/b499859c1012f969.png > +}; > + > +&pmu_io_domains { > + pmuio1-supply = <&vcc3v3_pmu>; > + pmuio2-supply = <&vcca1v8_pmu>; > + vccio1-supply = <&vccio_acodec>; > + vccio2-supply = <&vcc_1v8>; > + vccio3-supply = <&vccio_sd>; > + vccio4-supply = <&vcc_1v8>; > + vccio5-supply = <&vcc_1v8>; > + vccio6-supply = <&vcc1v8_dvp>; > + vccio7-supply = <&vcc_3v3>; > + status = "okay"; > +}; > + > +&pwm4 { > + status = "okay"; > +}; > + > +&saradc { > + vref-supply = <&vcc_1v8>; > + status = "okay"; > +}; > + > +&sdhci { > + bus-width = <8>; > + no-sdio; > + no-sd; > + non-removable; > + max-frequency = <200000000>; > + mmc-hs200-1_8v; > + pinctrl-names = "default"; > + pinctrl-0 = <&emmc_bus8 > + &emmc_clk > + &emmc_cmd > + &emmc_datastrobe > + &emmc_rstnout>; > + vmmc-supply = <&vcc_3v3>; > + vqmmc-supply = <&vcc_1v8>; > + status = "okay"; > +}; > + > +&sdmmc0 { > + bus-width = <4>; > + cap-sd-highspeed; > + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; > + disable-wp; > + pinctrl-names = "default"; > + pinctrl-0 = <&sdmmc0_bus4 > + &sdmmc0_clk > + &sdmmc0_cmd > + &sdmmc0_det>; > + sd-uhs-sdr104; > + vmmc-supply = <&vcc3v3_sd>; > + vqmmc-supply = <&vccio_sd>; > + status = "okay"; > +}; > + > +&sdmmc1 { > + bus-width = <4>; > + cap-sd-highspeed; > + cap-sdio-irq; > + keep-power-in-suspend; > + non-removable; > + pinctrl-names = "default"; > + pinctrl-0 = <&sdmmc1_bus4 > + &sdmmc1_cmd > + &sdmmc1_clk>; > + sd-uhs-sdr104; > + vqmmc-supply = <&vcca1v8_pmu>; > + status = "okay"; > +}; > + > +&sfc { > + pinctrl-names = "default"; > + pinctrl-0 = <&fspi_dual_io_pins>; > + status = "okay"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + flash@0 { > + compatible = "jedec,spi-nor"; > + reg = <0>; > + spi-max-frequency = <24000000>; That's a bit on the low side. The flash chip should work for all commands up to 80MHz https://megous.com/dl/tmp/b428ad9b85ac4633.png and SGM3157YC6 switch for the FSPI-CLK should have high enough bandwidth, too. > + spi-rx-bus-width = <2>; GD25LQ128E supports quad I/O. Maybe try 4 if it will work. > + spi-tx-bus-width = <1>; > + }; > +}; > + > +&tsadc { > + rockchip,hw-tshut-mode = <1>; > + rockchip,hw-tshut-polarity = <0>; > + status = "okay"; > +}; > + > +&uart1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart1m0_xfer > + &uart1m0_ctsn > + &uart1m0_rtsn>; > + status = "okay"; > + uart-has-rtscts; > +}; Not sure about enabling UART for bluetooth, without having the bluetooth driver hooked in, somehow. UART will by default pull TX signal high, which may cause current leakage into gpio/uart pin of the bluetooth chip, if it's not powered up. Maybe just remove this, until bluetooth is figured out... kind regards, o. ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2 2024-01-02 18:07 ` Ondřej Jirman @ 2024-01-02 20:56 ` Jonas Karlman 2024-01-02 21:18 ` Ondřej Jirman 2024-01-03 13:40 ` Manuel Traut 2024-01-03 4:09 ` Dang Huynh 2024-01-03 13:22 ` Manuel Traut 2 siblings, 2 replies; 20+ messages in thread From: Jonas Karlman @ 2024-01-02 20:56 UTC (permalink / raw) To: Ondřej Jirman, Manuel Traut, Neil Armstrong, Jessica Zhang, Sam Ravnborg, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Sandy Huang, Mark Yao, Diederik de Haas, Segfault, Arnaud Ferraris, Danct12, dri-devel, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip Hi Manuel and Ondřej, On 2024-01-02 19:07, Ondřej Jirman wrote: > Hello Manuel, [...] >> + >> +&sfc { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&fspi_dual_io_pins>; >> + status = "okay"; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + flash@0 { >> + compatible = "jedec,spi-nor"; >> + reg = <0>; >> + spi-max-frequency = <24000000>; > > That's a bit on the low side. The flash chip should work for all commands up to > 80MHz https://megous.com/dl/tmp/b428ad9b85ac4633.png and SGM3157YC6 switch > for the FSPI-CLK should have high enough bandwidth, too. I agree that this is a little bit on the low side, it was a safe rate that I used for U-Boot. U-Boot required an exact rate of the supported sfc clk rates: 24, 50, 75, 100, 125 or 150 MHz. Please also note that the SPI NOR flash chip used in PineTab2 is not a GigaDevice GD25LQ128E, it should be a SiliconKaiser SK25LP128, same as found in the Pine64 PinePhone Pro. > >> + spi-rx-bus-width = <2>; > > GD25LQ128E supports quad I/O. Maybe try 4 if it will work. The schematic only shows fspi D0 and D1 connected, and use the D2 line for eMMC_RSTn, so spi-rx-bus-width = <2> should be correct. > >> + spi-tx-bus-width = <1>; >> + }; >> +}; >> + Regards, Jonas ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2 2024-01-02 20:56 ` Jonas Karlman @ 2024-01-02 21:18 ` Ondřej Jirman 2024-01-03 13:40 ` Manuel Traut 1 sibling, 0 replies; 20+ messages in thread From: Ondřej Jirman @ 2024-01-02 21:18 UTC (permalink / raw) To: Jonas Karlman Cc: Manuel Traut, Neil Armstrong, Jessica Zhang, Sam Ravnborg, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Sandy Huang, Mark Yao, Diederik de Haas, Segfault, Arnaud Ferraris, Danct12, dri-devel, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip On Tue, Jan 02, 2024 at 09:56:20PM +0100, Jonas Karlman wrote: > Hi Manuel and Ondřej, > > On 2024-01-02 19:07, Ondřej Jirman wrote: > > Hello Manuel, > > [...] > > >> + > >> +&sfc { > >> + pinctrl-names = "default"; > >> + pinctrl-0 = <&fspi_dual_io_pins>; > >> + status = "okay"; > >> + #address-cells = <1>; > >> + #size-cells = <0>; > >> + > >> + flash@0 { > >> + compatible = "jedec,spi-nor"; > >> + reg = <0>; > >> + spi-max-frequency = <24000000>; > > > > That's a bit on the low side. The flash chip should work for all commands up to > > 80MHz https://megous.com/dl/tmp/b428ad9b85ac4633.png and SGM3157YC6 switch > > for the FSPI-CLK should have high enough bandwidth, too. > > I agree that this is a little bit on the low side, it was a safe rate > that I used for U-Boot. U-Boot required an exact rate of the supported > sfc clk rates: 24, 50, 75, 100, 125 or 150 MHz. > > Please also note that the SPI NOR flash chip used in PineTab2 is not a > GigaDevice GD25LQ128E, it should be a SiliconKaiser SK25LP128, same as > found in the Pine64 PinePhone Pro. According to this http://en.siliconkaiser.com/pro/ it should maybe go up to 133MHz. No idea what's the difference between LP vs LE variant. So it may work with 100 MHz. On Pinephone Pro variants with nerfed SPI CLK signal integrity (any variant with RE instead of a RESET button - so all production batches), anything above 10 MHz has real trouble working. But this should not be the case here with PT2, looking at the schematic... Anyway, it's a nice to have. > > > >> + spi-rx-bus-width = <2>; > > > > GD25LQ128E supports quad I/O. Maybe try 4 if it will work. > > The schematic only shows fspi D0 and D1 connected, and use the D2 line > for eMMC_RSTn, so spi-rx-bus-width = <2> should be correct. Ah, I see. regards, o. > > > >> + spi-tx-bus-width = <1>; > >> + }; > >> +}; > >> + > > Regards, > Jonas ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2 2024-01-02 20:56 ` Jonas Karlman 2024-01-02 21:18 ` Ondřej Jirman @ 2024-01-03 13:40 ` Manuel Traut 2024-01-03 14:19 ` Jonas Karlman 1 sibling, 1 reply; 20+ messages in thread From: Manuel Traut @ 2024-01-03 13:40 UTC (permalink / raw) To: Jonas Karlman Cc: Ondřej Jirman, Neil Armstrong, Jessica Zhang, Sam Ravnborg, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Sandy Huang, Mark Yao, Diederik de Haas, Segfault, Arnaud Ferraris, Danct12, dri-devel, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip Hi Jonas and Ondřej, > >> +&sfc { > >> + pinctrl-names = "default"; > >> + pinctrl-0 = <&fspi_dual_io_pins>; > >> + status = "okay"; > >> + #address-cells = <1>; > >> + #size-cells = <0>; > >> + > >> + flash@0 { > >> + compatible = "jedec,spi-nor"; > >> + reg = <0>; > >> + spi-max-frequency = <24000000>; > > > > That's a bit on the low side. The flash chip should work for all commands up to > > 80MHz https://megous.com/dl/tmp/b428ad9b85ac4633.png and SGM3157YC6 switch > > for the FSPI-CLK should have high enough bandwidth, too. > > I agree that this is a little bit on the low side, it was a safe rate > that I used for U-Boot. U-Boot required an exact rate of the supported > sfc clk rates: 24, 50, 75, 100, 125 or 150 MHz. > > Please also note that the SPI NOR flash chip used in PineTab2 is not a > GigaDevice GD25LQ128E, it should be a SiliconKaiser SK25LP128, same as > found in the Pine64 PinePhone Pro. The schematics for v2.0 reference a GD25LQ128EWIGR. I never checked the jedec id. How did you retrieve this information, or is it maybe a difference in v0.1 and 2.0? > >> + spi-rx-bus-width = <2>; > > > > GD25LQ128E supports quad I/O. Maybe try 4 if it will work. > > The schematic only shows fspi D0 and D1 connected, and use the D2 line > for eMMC_RSTn, so spi-rx-bus-width = <2> should be correct. ack Since it is only needed for bootloader updates and environment its maybe better to stay on the safe side? But I can test faster frequency if you want me to do.. Regards Manuel ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2 2024-01-03 13:40 ` Manuel Traut @ 2024-01-03 14:19 ` Jonas Karlman 2024-01-05 16:46 ` Manuel Traut 2024-01-27 9:31 ` Manuel Traut 0 siblings, 2 replies; 20+ messages in thread From: Jonas Karlman @ 2024-01-03 14:19 UTC (permalink / raw) To: Manuel Traut Cc: Ondřej Jirman, Neil Armstrong, Jessica Zhang, Sam Ravnborg, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Sandy Huang, Mark Yao, Diederik de Haas, Segfault, Arnaud Ferraris, Danct12, dri-devel, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip Hi Manuel, On 2024-01-03 14:40, Manuel Traut wrote: > Hi Jonas and Ondřej, > >>>> +&sfc { >>>> + pinctrl-names = "default"; >>>> + pinctrl-0 = <&fspi_dual_io_pins>; >>>> + status = "okay"; >>>> + #address-cells = <1>; >>>> + #size-cells = <0>; >>>> + >>>> + flash@0 { >>>> + compatible = "jedec,spi-nor"; >>>> + reg = <0>; >>>> + spi-max-frequency = <24000000>; >>> >>> That's a bit on the low side. The flash chip should work for all commands up to >>> 80MHz https://megous.com/dl/tmp/b428ad9b85ac4633.png and SGM3157YC6 switch >>> for the FSPI-CLK should have high enough bandwidth, too. >> >> I agree that this is a little bit on the low side, it was a safe rate >> that I used for U-Boot. U-Boot required an exact rate of the supported >> sfc clk rates: 24, 50, 75, 100, 125 or 150 MHz. >> >> Please also note that the SPI NOR flash chip used in PineTab2 is not a >> GigaDevice GD25LQ128E, it should be a SiliconKaiser SK25LP128, same as >> found in the Pine64 PinePhone Pro. > > The schematics for v2.0 reference a GD25LQ128EWIGR. I never checked the jedec > id. How did you retrieve this information, or is it maybe a difference in v0.1 > and 2.0? This was when working on mainline U-Boot for the PineTab2 (and other rk356x devices). See [1] for a pending U-Boot patch that is waiting on a proper mainline linux devicetree for the PT2. The JEDEC ID is reported as 0x257018 on my v2.0 production unit, and does not match the JEDEC ID for GD25LQ128E (0xc86018) referenced in the schematics. I found that the JEDEC ID 0x257018 was referenced in prior patches related to the SK25LP128 SPI NOR flash chip used in Pine64 PinePhone Pro. I have only ever tested the 24 MHz rate, but I am expecting that e.g. 100 MHz also should work. Will not be able to test on my PT2 until at earliest next week. [1] https://github.com/Kwiboo/u-boot-rockchip/commit/66562d6eaf2c11a9f97fcdba379d3ceda8aa70ef Regards, Jonas > >>>> + spi-rx-bus-width = <2>; >>> >>> GD25LQ128E supports quad I/O. Maybe try 4 if it will work. >> >> The schematic only shows fspi D0 and D1 connected, and use the D2 line >> for eMMC_RSTn, so spi-rx-bus-width = <2> should be correct. > > ack > > Since it is only needed for bootloader updates and environment its maybe better > to stay on the safe side? > > But I can test faster frequency if you want me to do.. > > Regards > Manuel ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2 2024-01-03 14:19 ` Jonas Karlman @ 2024-01-05 16:46 ` Manuel Traut 2024-01-27 9:31 ` Manuel Traut 1 sibling, 0 replies; 20+ messages in thread From: Manuel Traut @ 2024-01-05 16:46 UTC (permalink / raw) To: Jonas Karlman Cc: Ondřej Jirman, Neil Armstrong, Jessica Zhang, Sam Ravnborg, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Sandy Huang, Mark Yao, Diederik de Haas, Segfault, Arnaud Ferraris, Danct12, dri-devel, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip Hi Jonas, On Wed, Jan 03, 2024 at 03:19:25PM +0100, Jonas Karlman wrote: > Hi Manuel, > > On 2024-01-03 14:40, Manuel Traut wrote: > > Hi Jonas and Ondřej, > > > >>>> +&sfc { > >>>> + pinctrl-names = "default"; > >>>> + pinctrl-0 = <&fspi_dual_io_pins>; > >>>> + status = "okay"; > >>>> + #address-cells = <1>; > >>>> + #size-cells = <0>; > >>>> + > >>>> + flash@0 { > >>>> + compatible = "jedec,spi-nor"; > >>>> + reg = <0>; > >>>> + spi-max-frequency = <24000000>; > >>> > >>> That's a bit on the low side. The flash chip should work for all commands up to > >>> 80MHz https://megous.com/dl/tmp/b428ad9b85ac4633.png and SGM3157YC6 switch > >>> for the FSPI-CLK should have high enough bandwidth, too. > >> > >> I agree that this is a little bit on the low side, it was a safe rate > >> that I used for U-Boot. U-Boot required an exact rate of the supported > >> sfc clk rates: 24, 50, 75, 100, 125 or 150 MHz. > >> > >> Please also note that the SPI NOR flash chip used in PineTab2 is not a > >> GigaDevice GD25LQ128E, it should be a SiliconKaiser SK25LP128, same as > >> found in the Pine64 PinePhone Pro. > > > > The schematics for v2.0 reference a GD25LQ128EWIGR. I never checked the jedec > > id. How did you retrieve this information, or is it maybe a difference in v0.1 > > and 2.0? > > This was when working on mainline U-Boot for the PineTab2 (and other > rk356x devices). See [1] for a pending U-Boot patch that is waiting on a > proper mainline linux devicetree for the PT2. > > The JEDEC ID is reported as 0x257018 on my v2.0 production unit, and > does not match the JEDEC ID for GD25LQ128E (0xc86018) referenced in > the schematics. > > I found that the JEDEC ID 0x257018 was referenced in prior patches > related to the SK25LP128 SPI NOR flash chip used in Pine64 PinePhone Pro. > > I have only ever tested the 24 MHz rate, but I am expecting that e.g. > 100 MHz also should work. Will not be able to test on my PT2 until at > earliest next week. > > [1] https://github.com/Kwiboo/u-boot-rockchip/commit/66562d6eaf2c11a9f97fcdba379d3ceda8aa70ef Thanks for the information. My v2.0 device also reports JEDEC ID 0x257018. I increased the clock-rate to 100 MHz and it is at least still detected. I will find out how to test more, currently hexdump /dev/mtd0 just reports 0xff on the hole flash, I expected to see u-boot there.. Regards Manuel > >>>> + spi-rx-bus-width = <2>; > >>> > >>> GD25LQ128E supports quad I/O. Maybe try 4 if it will work. > >> > >> The schematic only shows fspi D0 and D1 connected, and use the D2 line > >> for eMMC_RSTn, so spi-rx-bus-width = <2> should be correct. > > > > ack > > > > Since it is only needed for bootloader updates and environment its maybe better > > to stay on the safe side? > > > > But I can test faster frequency if you want me to do.. > > > > Regards > > Manuel > ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2 2024-01-03 14:19 ` Jonas Karlman 2024-01-05 16:46 ` Manuel Traut @ 2024-01-27 9:31 ` Manuel Traut 1 sibling, 0 replies; 20+ messages in thread From: Manuel Traut @ 2024-01-27 9:31 UTC (permalink / raw) To: Jonas Karlman Cc: Ondřej Jirman, Neil Armstrong, Jessica Zhang, Sam Ravnborg, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Sandy Huang, Mark Yao, Diederik de Haas, Segfault, Arnaud Ferraris, Danct12, dri-devel, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip Hi Jonas, On Wed, Jan 03, 2024 at 03:19:25PM +0100, Jonas Karlman wrote: > Hi Manuel, > > On 2024-01-03 14:40, Manuel Traut wrote: > > Hi Jonas and Ondřej, > > > >>>> +&sfc { > >>>> + pinctrl-names = "default"; > >>>> + pinctrl-0 = <&fspi_dual_io_pins>; > >>>> + status = "okay"; > >>>> + #address-cells = <1>; > >>>> + #size-cells = <0>; > >>>> + > >>>> + flash@0 { > >>>> + compatible = "jedec,spi-nor"; > >>>> + reg = <0>; > >>>> + spi-max-frequency = <24000000>; > >>> > >>> That's a bit on the low side. The flash chip should work for all commands up to > >>> 80MHz https://megous.com/dl/tmp/b428ad9b85ac4633.png and SGM3157YC6 switch > >>> for the FSPI-CLK should have high enough bandwidth, too. > >> > >> I agree that this is a little bit on the low side, it was a safe rate > >> that I used for U-Boot. U-Boot required an exact rate of the supported > >> sfc clk rates: 24, 50, 75, 100, 125 or 150 MHz. > >> > >> Please also note that the SPI NOR flash chip used in PineTab2 is not a > >> GigaDevice GD25LQ128E, it should be a SiliconKaiser SK25LP128, same as > >> found in the Pine64 PinePhone Pro. > > > > The schematics for v2.0 reference a GD25LQ128EWIGR. I never checked the jedec > > id. How did you retrieve this information, or is it maybe a difference in v0.1 > > and 2.0? > > This was when working on mainline U-Boot for the PineTab2 (and other > rk356x devices). See [1] for a pending U-Boot patch that is waiting on a > proper mainline linux devicetree for the PT2. > > The JEDEC ID is reported as 0x257018 on my v2.0 production unit, and > does not match the JEDEC ID for GD25LQ128E (0xc86018) referenced in > the schematics. > > I found that the JEDEC ID 0x257018 was referenced in prior patches > related to the SK25LP128 SPI NOR flash chip used in Pine64 PinePhone Pro. > > I have only ever tested the 24 MHz rate, but I am expecting that e.g. > 100 MHz also should work. Will not be able to test on my PT2 until at > earliest next week. > > [1] https://github.com/Kwiboo/u-boot-rockchip/commit/66562d6eaf2c11a9f97fcdba379d3ceda8aa70ef I found the time to verify that 100 MHz is also working. Will include this in v4 Thanks for your help Manuel ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2 2024-01-02 18:07 ` Ondřej Jirman 2024-01-02 20:56 ` Jonas Karlman @ 2024-01-03 4:09 ` Dang Huynh 2024-01-03 13:22 ` Manuel Traut 2 siblings, 0 replies; 20+ messages in thread From: Dang Huynh @ 2024-01-03 4:09 UTC (permalink / raw) To: Ondřej Jirman, Manuel Traut, Neil Armstrong, Jessica Zhang, Sam Ravnborg, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Sandy Huang, Mark Yao, Diederik de Haas, Segfault, Arnaud Ferraris, Danct12, dri-devel, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip On Tuesday, January 2, 2024 6:07:56 PM UTC Ondřej Jirman wrote: > On Tue, Jan 02, 2024 at 05:15:47PM +0100, Manuel Traut wrote: > > +&pcie2x1 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pcie_reset_h>; > > + reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; > > + vpcie3v3-supply = <&vcc3v3_minipcie>; > > + status = "okay"; > > +}; > > Does it make sense to enable this HW block by default, when it isn't used on > actual HW? > PCI-E is hooked up to a connector in the schematics, so I think it make sense to enable it when there's one available. ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2 2024-01-02 18:07 ` Ondřej Jirman 2024-01-02 20:56 ` Jonas Karlman 2024-01-03 4:09 ` Dang Huynh @ 2024-01-03 13:22 ` Manuel Traut 2 siblings, 0 replies; 20+ messages in thread From: Manuel Traut @ 2024-01-03 13:22 UTC (permalink / raw) To: Ondřej Jirman, Neil Armstrong, Jessica Zhang, Sam Ravnborg, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Sandy Huang, Mark Yao, Diederik de Haas, Segfault, Arnaud Ferraris, Danct12, dri-devel, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip On Tue, Jan 02, 2024 at 07:07:56PM +0100, Ondřej Jirman wrote: > Hello Manuel, Hello Ondřej, > On Tue, Jan 02, 2024 at 05:15:47PM +0100, Manuel Traut wrote: > > From: Alexander Warnecke <awarnecke002@hotmail.com> > > > > [...] > > > > + > > + backlight: backlight { > > + compatible = "pwm-backlight"; > > + pwms = <&pwm4 0 25000 0>; > > + brightness-levels = <20 220>; > > + num-interpolated-steps = <200>; > > Does this linear brightness -> PWM duty cycle mapping lead to linear > relationship between brighntess level and subjective brightness on this HW? > > I doubt it a bit... I tested it with the brightness slider in phosh, for me it looks good. > > + > > + hdmi-con { > > hdmi-connector ack, changed for v4 > > + compatible = "hdmi-connector"; > > + type = "d"; > > + > > + port { > > + hdmi_con_in: endpoint { > > + remote-endpoint = <&hdmi_out_con>; > > + }; > > + }; > > + }; > > + > > + leds { > > + compatible = "gpio-leds"; > > + > > Spurious newline ^ ack, changed for v4 > > + vcc_3v3: vcc-3v3 { > > Regulator node names shoule end with -regulator suffix. The same applies for > all of the below nodes. ack, changed for v4 > > + compatible = "regulator-fixed"; > > + regulator-name = "vcc_3v3"; > > + regulator-always-on; > > + regulator-boot-on; > > + regulator-min-microvolt = <3300000>; > > + regulator-max-microvolt = <3300000>; > > + vin-supply = <&vcc3v3_sys>; > > + }; > > + > > + vdd1v2_dvp: vdd1v2-dvp { > > + compatible = "regulator-fixed"; > > + regulator-name = "vdd1v2_dvp"; > > + regulator-min-microvolt = <1200000>; > > + regulator-max-microvolt = <1200000>; > > + vin-supply = <&vcc_3v3>; > > + /*enable-supply = <&vcc2v8_dvp>;*/ > > There's no such property. Delete this commented out line. ack, changed for v4 > > + lcd: panel@0 { > > + compatible = "boe,th101mb31ig002-28a"; > > + reg = <0>; > > + backlight = <&backlight>; > > + enable-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&lcd_pwren_h &lcd0_rst_l>; > > Re lcd0_rst_l: > > It's a bit weird conceptually to reference from dtsi something that's only > declared in dts that includes the dtsi. Maybe move pinctrl-* properties > to dts &lcd, too... Will be better I guess, changed for v4. > > + vcc5v_midu: BOOST { > > + regulator-always-on; > > + regulator-boot-on; > > + regulator-min-microvolt = <5000000>; > > + regulator-max-microvolt = <5000000>; > > + regulator-name = "boost"; > > + regulator-state-mem { > > + regulator-off-in-suspend; > > I guess this prevents remote USB wakeup by USB devices. Like wakeup via USB > keyboard. Probably not a bad thing, though. That is true. After 'echo mem > /sys/power/state' It is not possible to wakeup the device with a USB Keyboard or mouse. However if the surface like keyboard is used that is shipped with the device, wakeup works if the keyboard/tablet gets unfold. For me this behaviour is fine. Other opinions? > > +&pcie2x1 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pcie_reset_h>; > > + reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; > > + vpcie3v3-supply = <&vcc3v3_minipcie>; > > + status = "okay"; > > +}; > > Does it make sense to enable this HW block by default, when it isn't used on > actual HW? There is a flat ribbon connector, if someone wants to build sth. it might be helpful. However I am also fine with removing it for now. > > +&pinctrl { > > + bt { > > + bt_wake_host_h: bt-wake-host-h { > > + rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>; > > + }; > > + }; > > ^^^ unused I do not bother to removing unused pinctrls, however even if there is no user at the moment, if we look at a dtb as a machine parseable device description it is probably ok, that it is there? > > + > > + camerab { > > + camerab_pdn_l: camerab-pdn-l { > > + rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; > > + }; > > + > > + camerab_rst_l: camerab-rst-l { > > + rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; > > + }; > > + }; > > + > > + cameraf { > > + cameraf_pdn_l: cameraf-pdn-l { > > + rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; > > + }; > > + > > + cameraf_rst_l: cameraf-rst-l { > > + rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; > > + }; > > + }; > > ^^^ unused > > > + usb { > > + usbcc_int_l: usbcc-int-l { > > + rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; > > + }; > > ^^^ unused > > > + wifi { > > + host_wake_wl: host-wake-wl { > > + rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; > > + }; > > + > > + wifi_pwren: wifi-pwren { > > + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; > > + }; > > + > > + wifi_wake_host_h: wifi-wake-host-h { > > + rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>; > > + }; > > + }; > > ^^^ all of this wifi stuff is unused > > Also wifi_pwren is not really useful on actual HW. W_VBAT is routed directly > to wifi chip, with wifi_pwren_h signal having no effect: (short via R9664) > > https://megous.com/dl/tmp/b499859c1012f969.png ack, removed for v4 > > +&uart1 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&uart1m0_xfer > > + &uart1m0_ctsn > > + &uart1m0_rtsn>; > > + status = "okay"; > > + uart-has-rtscts; > > +}; > > Not sure about enabling UART for bluetooth, without having the bluetooth driver > hooked in, somehow. UART will by default pull TX signal high, which may cause > current leakage into gpio/uart pin of the bluetooth chip, if it's not powered up. > > Maybe just remove this, until bluetooth is figured out... Makes sense, removed for v4. Thanks for your feedback, Manuel ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2 2024-01-02 16:15 ` [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for " Manuel Traut 2024-01-02 18:07 ` Ondřej Jirman @ 2024-01-03 9:42 ` Ondřej Jirman 2024-01-05 16:11 ` Manuel Traut 1 sibling, 1 reply; 20+ messages in thread From: Ondřej Jirman @ 2024-01-03 9:42 UTC (permalink / raw) To: Manuel Traut Cc: Neil Armstrong, Jessica Zhang, Sam Ravnborg, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Sandy Huang, Mark Yao, Diederik de Haas, Segfault, Arnaud Ferraris, Danct12, dri-devel, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip Hello Manuel, a few more things I noticed: On Tue, Jan 02, 2024 at 05:15:47PM +0100, Manuel Traut wrote: > From: Alexander Warnecke <awarnecke002@hotmail.com> > > + leds { > + compatible = "gpio-leds"; > + > + pinctrl-names = "default"; > + pinctrl-0 = <&flash_led_en_h>; > + > + led-0 { > + gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; > + color = <LED_COLOR_ID_WHITE>; > + function = LED_FUNCTION_FLASH; > + }; This LED is supplied by VCC5V_MIDU, so maybe this should be a regulator-led supplied by gpio (FLASH_LED_EN_H) controlled regulator-fixed named f_led which is in turn supplied by VCC5V_MIDU. https://megous.com/dl/tmp/9bf0d85d78946b5e.png > + }; > + > [...] > > + > + speaker_amp: speaker-amplifier { > + compatible = "simple-audio-amplifier"; > + pinctrl-names = "default"; > + pinctrl-0 = <&spk_ctl>; > + enable-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; > + sound-name-prefix = "Speaker Amplifier"; > + VCC-supply = <&vcc_bat>; > + }; > + > + vcc_3v3: vcc-3v3 { > + compatible = "regulator-fixed"; > + regulator-name = "vcc_3v3"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&vcc3v3_sys>; > + }; > + > + vcc3v3_minipcie: vcc3v3-minipcie { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pcie_pwren_h>; > + regulator-name = "vcc3v3_minipcie"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&vcc_sys>; This regulator is supplied by vcc_bat: https://megous.com/dl/tmp/4ec71a4a2aea9498.png > + }; > + > + vcc3v3_sd: vcc3v3-sd { > + compatible = "regulator-fixed"; > + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sdmmc_pwren_l>; > + regulator-name = "vcc3v3_sd"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&vcc3v3_sys>; > + }; > + > + vcc5v0_usb_host0: vcc5v0-usb-host0 { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&usb_host_pwren1_h>; > + regulator-name = "vcc5v0_usb_host0"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&vcc5v_midu>; > + }; > + > + vcc5v0_usb_host2: vcc5v0-usb-host2 { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&usb_host_pwren2_h>; > + regulator-name = "vcc5v0_usb_host2"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&vcc5v_midu>; > + }; > + > + vcc_bat: vcc-bat { > + compatible = "regulator-fixed"; > + regulator-name = "vcc_bat"; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + vcc_sys: vcc-sys { > + compatible = "regulator-fixed"; > + regulator-name = "vcc_sys"; > + regulator-always-on; > + regulator-boot-on; > + vin-supply = <&vcc_bat>; > + }; > + > + vdd1v2_dvp: vdd1v2-dvp { > + compatible = "regulator-fixed"; > + regulator-name = "vdd1v2_dvp"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1200000>; > + vin-supply = <&vcc_3v3>; > + /*enable-supply = <&vcc2v8_dvp>;*/ > + }; There's no vdd1v2_dvp in the schematic on the camera sensor connector, or elsewhere: https://megous.com/dl/tmp/fd95f003d8f3fbfb.png So I guess, you can drop this, entirely. Maybe it's VDD1V5_DVP but I don't think it needs to be described in DT, since it's pretty local to this camera sensor, and nothing else uses it. https://megous.com/dl/tmp/7fc384e196c5428f.png regards, o. ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2 2024-01-03 9:42 ` Ondřej Jirman @ 2024-01-05 16:11 ` Manuel Traut 2024-01-05 16:48 ` Ondřej Jirman 0 siblings, 1 reply; 20+ messages in thread From: Manuel Traut @ 2024-01-05 16:11 UTC (permalink / raw) To: Ondřej Jirman, Neil Armstrong, Jessica Zhang, Sam Ravnborg, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Sandy Huang, Mark Yao, Diederik de Haas, Segfault, Arnaud Ferraris, Danct12, dri-devel, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip On Wed, Jan 03, 2024 at 10:42:54AM +0100, Ondřej Jirman wrote: > Hello Manuel, > > a few more things I noticed: > > On Tue, Jan 02, 2024 at 05:15:47PM +0100, Manuel Traut wrote: > > From: Alexander Warnecke <awarnecke002@hotmail.com> > > > > + leds { > > + compatible = "gpio-leds"; > > + > > + pinctrl-names = "default"; > > + pinctrl-0 = <&flash_led_en_h>; > > + > > + led-0 { > > + gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; > > + color = <LED_COLOR_ID_WHITE>; > > + function = LED_FUNCTION_FLASH; > > + }; > > This LED is supplied by VCC5V_MIDU, so maybe this should be a regulator-led > supplied by gpio (FLASH_LED_EN_H) controlled regulator-fixed named f_led which > is in turn supplied by VCC5V_MIDU. > > https://megous.com/dl/tmp/9bf0d85d78946b5e.png regulator-leds are controlled by turning on or off the regulator. However VCC5V_MIDU is also used by other devices (USB, HDMI, ..) so I guess this is not what we want. I would keep it as is. > > + }; > > + > > [...] > > > > + > > + speaker_amp: speaker-amplifier { > > + compatible = "simple-audio-amplifier"; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&spk_ctl>; > > + enable-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; > > + sound-name-prefix = "Speaker Amplifier"; > > + VCC-supply = <&vcc_bat>; > > + }; > > + > > + vcc_3v3: vcc-3v3 { > > + compatible = "regulator-fixed"; > > + regulator-name = "vcc_3v3"; > > + regulator-always-on; > > + regulator-boot-on; > > + regulator-min-microvolt = <3300000>; > > + regulator-max-microvolt = <3300000>; > > + vin-supply = <&vcc3v3_sys>; > > + }; > > + > > + vcc3v3_minipcie: vcc3v3-minipcie { > > + compatible = "regulator-fixed"; > > + enable-active-high; > > + gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_HIGH>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pcie_pwren_h>; > > + regulator-name = "vcc3v3_minipcie"; > > + regulator-min-microvolt = <3300000>; > > + regulator-max-microvolt = <3300000>; > > + vin-supply = <&vcc_sys>; > > This regulator is supplied by vcc_bat: https://megous.com/dl/tmp/4ec71a4a2aea9498.png correct, I will update this in v4. > > + }; > > + > > + vcc3v3_sd: vcc3v3-sd { > > + compatible = "regulator-fixed"; > > + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&sdmmc_pwren_l>; > > + regulator-name = "vcc3v3_sd"; > > + regulator-min-microvolt = <3300000>; > > + regulator-max-microvolt = <3300000>; > > + vin-supply = <&vcc3v3_sys>; > > + }; > > + > > + vcc5v0_usb_host0: vcc5v0-usb-host0 { > > + compatible = "regulator-fixed"; > > + enable-active-high; > > + gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&usb_host_pwren1_h>; > > + regulator-name = "vcc5v0_usb_host0"; > > + regulator-min-microvolt = <5000000>; > > + regulator-max-microvolt = <5000000>; > > + vin-supply = <&vcc5v_midu>; > > + }; > > + > > + vcc5v0_usb_host2: vcc5v0-usb-host2 { > > + compatible = "regulator-fixed"; > > + enable-active-high; > > + gpio = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&usb_host_pwren2_h>; > > + regulator-name = "vcc5v0_usb_host2"; > > + regulator-min-microvolt = <5000000>; > > + regulator-max-microvolt = <5000000>; > > + vin-supply = <&vcc5v_midu>; > > + }; > > + > > + vcc_bat: vcc-bat { > > + compatible = "regulator-fixed"; > > + regulator-name = "vcc_bat"; > > + regulator-always-on; > > + regulator-boot-on; > > + }; > > + > > + vcc_sys: vcc-sys { > > + compatible = "regulator-fixed"; > > + regulator-name = "vcc_sys"; > > + regulator-always-on; > > + regulator-boot-on; > > + vin-supply = <&vcc_bat>; > > + }; > > + > > + vdd1v2_dvp: vdd1v2-dvp { > > + compatible = "regulator-fixed"; > > + regulator-name = "vdd1v2_dvp"; > > + regulator-min-microvolt = <1200000>; > > + regulator-max-microvolt = <1200000>; > > + vin-supply = <&vcc_3v3>; > > + /*enable-supply = <&vcc2v8_dvp>;*/ > > + }; > > There's no vdd1v2_dvp in the schematic on the camera sensor connector, or elsewhere: > > https://megous.com/dl/tmp/fd95f003d8f3fbfb.png It is on page 5 in the power diagram on the right top. > So I guess, you can drop this, entirely. Maybe it's VDD1V5_DVP but I don't think > it needs to be described in DT, since it's pretty local to this camera sensor, > and nothing else uses it. > > https://megous.com/dl/tmp/7fc384e196c5428f.png dvdd-supply is a required property of the ov5648 camera, so I would tend to keep this. But us vcc_sys for vin-supply instead of vcc_3v3. Regards Manuel ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2 2024-01-05 16:11 ` Manuel Traut @ 2024-01-05 16:48 ` Ondřej Jirman 2024-01-26 20:30 ` Manuel Traut 0 siblings, 1 reply; 20+ messages in thread From: Ondřej Jirman @ 2024-01-05 16:48 UTC (permalink / raw) To: Manuel Traut Cc: Neil Armstrong, Jessica Zhang, Sam Ravnborg, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Sandy Huang, Mark Yao, Diederik de Haas, Segfault, Arnaud Ferraris, Danct12, dri-devel, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip On Fri, Jan 05, 2024 at 05:11:03PM +0100, Manuel Traut wrote: > On Wed, Jan 03, 2024 at 10:42:54AM +0100, Ondřej Jirman wrote: > > Hello Manuel, > > > > a few more things I noticed: > > > > On Tue, Jan 02, 2024 at 05:15:47PM +0100, Manuel Traut wrote: > > > From: Alexander Warnecke <awarnecke002@hotmail.com> > > > > > > + leds { > > > + compatible = "gpio-leds"; > > > + > > > + pinctrl-names = "default"; > > > + pinctrl-0 = <&flash_led_en_h>; > > > + > > > + led-0 { > > > + gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; > > > + color = <LED_COLOR_ID_WHITE>; > > > + function = LED_FUNCTION_FLASH; > > > + }; > > > > This LED is supplied by VCC5V_MIDU, so maybe this should be a regulator-led > > supplied by gpio (FLASH_LED_EN_H) controlled regulator-fixed named f_led which > > is in turn supplied by VCC5V_MIDU. > > > > https://megous.com/dl/tmp/9bf0d85d78946b5e.png > > regulator-leds are controlled by turning on or off the regulator. However > VCC5V_MIDU is also used by other devices (USB, HDMI, ..) so I guess this is > not what we want. I would keep it as is. It's used by the LED. gpio-leds will not ensure it's on when you enable the LED. In practice this may only come up if someone tries to save power by unloading dwc3 USB driver, when using PT2 outside of the keyboard case. Otherwise VCC5V_MIDU will be enabled by DWC3 driver's use of PHY API. In any case, I'm not saying you should use VCC5V_MIDU directly in regulator-led, but as a vin-supply to a new regulator-fixed node (which would be describing this "fixed voltage regulator" https://megous.com/dl/tmp/cc65ec81ab9af163.png ). > > > + }; > > > + > > > [...] > > > > > > + > > > + speaker_amp: speaker-amplifier { > > > + compatible = "simple-audio-amplifier"; > > > + pinctrl-names = "default"; > > > + pinctrl-0 = <&spk_ctl>; > > > + enable-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; > > > + sound-name-prefix = "Speaker Amplifier"; > > > + VCC-supply = <&vcc_bat>; > > > + }; > > > + > > > + vcc_3v3: vcc-3v3 { > > > + compatible = "regulator-fixed"; > > > + regulator-name = "vcc_3v3"; > > > + regulator-always-on; > > > + regulator-boot-on; > > > + regulator-min-microvolt = <3300000>; > > > + regulator-max-microvolt = <3300000>; > > > + vin-supply = <&vcc3v3_sys>; > > > + }; > > > + > > > + vcc3v3_minipcie: vcc3v3-minipcie { > > > + compatible = "regulator-fixed"; > > > + enable-active-high; > > > + gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_HIGH>; > > > + pinctrl-names = "default"; > > > + pinctrl-0 = <&pcie_pwren_h>; > > > + regulator-name = "vcc3v3_minipcie"; > > > + regulator-min-microvolt = <3300000>; > > > + regulator-max-microvolt = <3300000>; > > > + vin-supply = <&vcc_sys>; > > > > This regulator is supplied by vcc_bat: https://megous.com/dl/tmp/4ec71a4a2aea9498.png > > correct, I will update this in v4. > > > > + }; > > > + > > > + vcc3v3_sd: vcc3v3-sd { > > > + compatible = "regulator-fixed"; > > > + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; > > > + pinctrl-names = "default"; > > > + pinctrl-0 = <&sdmmc_pwren_l>; > > > + regulator-name = "vcc3v3_sd"; > > > + regulator-min-microvolt = <3300000>; > > > + regulator-max-microvolt = <3300000>; > > > + vin-supply = <&vcc3v3_sys>; > > > + }; > > > + > > > + vcc5v0_usb_host0: vcc5v0-usb-host0 { > > > + compatible = "regulator-fixed"; > > > + enable-active-high; > > > + gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>; > > > + pinctrl-names = "default"; > > > + pinctrl-0 = <&usb_host_pwren1_h>; > > > + regulator-name = "vcc5v0_usb_host0"; > > > + regulator-min-microvolt = <5000000>; > > > + regulator-max-microvolt = <5000000>; > > > + vin-supply = <&vcc5v_midu>; > > > + }; > > > + > > > + vcc5v0_usb_host2: vcc5v0-usb-host2 { > > > + compatible = "regulator-fixed"; > > > + enable-active-high; > > > + gpio = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; > > > + pinctrl-names = "default"; > > > + pinctrl-0 = <&usb_host_pwren2_h>; > > > + regulator-name = "vcc5v0_usb_host2"; > > > + regulator-min-microvolt = <5000000>; > > > + regulator-max-microvolt = <5000000>; > > > + vin-supply = <&vcc5v_midu>; > > > + }; > > > + > > > + vcc_bat: vcc-bat { > > > + compatible = "regulator-fixed"; > > > + regulator-name = "vcc_bat"; > > > + regulator-always-on; > > > + regulator-boot-on; > > > + }; > > > + > > > + vcc_sys: vcc-sys { > > > + compatible = "regulator-fixed"; > > > + regulator-name = "vcc_sys"; > > > + regulator-always-on; > > > + regulator-boot-on; > > > + vin-supply = <&vcc_bat>; > > > + }; > > > + > > > + vdd1v2_dvp: vdd1v2-dvp { > > > + compatible = "regulator-fixed"; > > > + regulator-name = "vdd1v2_dvp"; > > > + regulator-min-microvolt = <1200000>; > > > + regulator-max-microvolt = <1200000>; > > > + vin-supply = <&vcc_3v3>; > > > + /*enable-supply = <&vcc2v8_dvp>;*/ > > > + }; > > > > There's no vdd1v2_dvp in the schematic on the camera sensor connector, or elsewhere: > > > > https://megous.com/dl/tmp/fd95f003d8f3fbfb.png > > It is on page 5 in the power diagram on the right top. That (Power diagram overview) is irrelevant part of the schematic. Can be and often is wrong. You need to use actual detailed parts of the schematic, which is what is actually used to route the PCB traces. kind regards, o. > > So I guess, you can drop this, entirely. Maybe it's VDD1V5_DVP but I don't think > > it needs to be described in DT, since it's pretty local to this camera sensor, > > and nothing else uses it. > > > > https://megous.com/dl/tmp/7fc384e196c5428f.png > > dvdd-supply is a required property of the ov5648 camera, so I would tend to keep > this. But us vcc_sys for vin-supply instead of vcc_3v3. > > Regards > Manuel ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for Pine64 PineTab2 2024-01-05 16:48 ` Ondřej Jirman @ 2024-01-26 20:30 ` Manuel Traut 0 siblings, 0 replies; 20+ messages in thread From: Manuel Traut @ 2024-01-26 20:30 UTC (permalink / raw) To: Ondřej Jirman, Neil Armstrong, Jessica Zhang, Sam Ravnborg, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Sandy Huang, Mark Yao, Diederik de Haas, Segfault, Arnaud Ferraris, Danct12, dri-devel, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip Hello Ondřej, On Fri, Jan 05, 2024 at 05:48:46PM +0100, Ondřej Jirman wrote: > On Fri, Jan 05, 2024 at 05:11:03PM +0100, Manuel Traut wrote: > > On Wed, Jan 03, 2024 at 10:42:54AM +0100, Ondřej Jirman wrote: > > > Hello Manuel, > > > > > > a few more things I noticed: > > > > > > On Tue, Jan 02, 2024 at 05:15:47PM +0100, Manuel Traut wrote: > > > > From: Alexander Warnecke <awarnecke002@hotmail.com> > > > > > > > > + leds { > > > > + compatible = "gpio-leds"; > > > > + > > > > + pinctrl-names = "default"; > > > > + pinctrl-0 = <&flash_led_en_h>; > > > > + > > > > + led-0 { > > > > + gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; > > > > + color = <LED_COLOR_ID_WHITE>; > > > > + function = LED_FUNCTION_FLASH; > > > > + }; > > > > > > This LED is supplied by VCC5V_MIDU, so maybe this should be a regulator-led > > > supplied by gpio (FLASH_LED_EN_H) controlled regulator-fixed named f_led which > > > is in turn supplied by VCC5V_MIDU. > > > > > > https://megous.com/dl/tmp/9bf0d85d78946b5e.png > > > > regulator-leds are controlled by turning on or off the regulator. However > > VCC5V_MIDU is also used by other devices (USB, HDMI, ..) so I guess this is > > not what we want. I would keep it as is. > > It's used by the LED. gpio-leds will not ensure it's on when you enable the LED. > > In practice this may only come up if someone tries to save power by unloading > dwc3 USB driver, when using PT2 outside of the keyboard case. Otherwise > VCC5V_MIDU will be enabled by DWC3 driver's use of PHY API. > > In any case, I'm not saying you should use VCC5V_MIDU directly in regulator-led, > but as a vin-supply to a new regulator-fixed node (which would be describing > this "fixed voltage regulator" https://megous.com/dl/tmp/cc65ec81ab9af163.png ). Sorry for the late response, I was busy with other things in the last weeks. I changed it to be a regulator led and will post a v4 soon. ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: (subset) [PATCH v3 0/4] arm64: rockchip: Pine64 PineTab2 support 2024-01-02 16:15 [PATCH v3 0/4] arm64: rockchip: Pine64 PineTab2 support Manuel Traut ` (3 preceding siblings ...) 2024-01-02 16:15 ` [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for " Manuel Traut @ 2024-01-12 9:25 ` neil.armstrong 4 siblings, 0 replies; 20+ messages in thread From: neil.armstrong @ 2024-01-12 9:25 UTC (permalink / raw) To: Jessica Zhang, Sam Ravnborg, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Sandy Huang, Mark Yao, Diederik de Haas, Segfault, Arnaud Ferraris, Danct12, Ondrej Jirman, Manuel Traut Cc: Neil Armstrong, dri-devel, devicetree, linux-kernel, linux-arm-kernel, linux-rockchip, Krzysztof Kozlowski From: Neil Armstrong <neil.armstrong@linaro.org> Hi, On Tue, 02 Jan 2024 17:15:43 +0100, Manuel Traut wrote: > This adds support for the BOE TH101MB31IG002 LCD Panel used in PineTab2 [1] and > PineTab-V [2] as well as the devictrees for the PineTab2 v0.1 and v2.0. > > The BOE LCD Panel patch was retrieved from [3]. The function-name prefix has > been adapted and the LCD init section was simplified. > > The PineTab2 devicetree patch was retrieved from [4]. Some renaming was needed > to pass the dtb-checks, the brightness-levels are specified as range and steps > instead of a list of values. > > [...] Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next) [1/4] dt-bindings: display: panel: Add BOE TH101MB31IG002-28A panel https://cgit.freedesktop.org/drm/drm-misc/commit/?id=baae3a0b10c499d4228514a701602f6fd2a8d6b4 [2/4] drm/panel: Add driver for BOE TH101MB31IG002-28A panel https://cgit.freedesktop.org/drm/drm-misc/commit/?id=420186db1483da4e16cd5d5a472f511a35dbc1b7 -- Neil ^ permalink raw reply [flat|nested] 20+ messages in thread
end of thread, other threads:[~2024-01-27 9:31 UTC | newest] Thread overview: 20+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-01-02 16:15 [PATCH v3 0/4] arm64: rockchip: Pine64 PineTab2 support Manuel Traut 2024-01-02 16:15 ` [PATCH v3 1/4] dt-bindings: display: panel: Add BOE TH101MB31IG002-28A panel Manuel Traut 2024-01-02 16:15 ` [PATCH v3 2/4] drm/panel: Add driver for " Manuel Traut 2024-01-08 18:24 ` Jessica Zhang 2024-01-02 16:15 ` [PATCH v3 3/4] dt-bindings: arm64: rockchip: Add Pine64 PineTab2 Manuel Traut 2024-01-02 16:15 ` [PATCH v3 4/4] arm64: dts: rockchip: Add devicetree for " Manuel Traut 2024-01-02 18:07 ` Ondřej Jirman 2024-01-02 20:56 ` Jonas Karlman 2024-01-02 21:18 ` Ondřej Jirman 2024-01-03 13:40 ` Manuel Traut 2024-01-03 14:19 ` Jonas Karlman 2024-01-05 16:46 ` Manuel Traut 2024-01-27 9:31 ` Manuel Traut 2024-01-03 4:09 ` Dang Huynh 2024-01-03 13:22 ` Manuel Traut 2024-01-03 9:42 ` Ondřej Jirman 2024-01-05 16:11 ` Manuel Traut 2024-01-05 16:48 ` Ondřej Jirman 2024-01-26 20:30 ` Manuel Traut 2024-01-12 9:25 ` (subset) [PATCH v3 0/4] arm64: rockchip: Pine64 PineTab2 support neil.armstrong
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