[PATCH v2 0/3] arm64: dts: qcom: x1e80100-hp-x14: add usb-1-ss1-sbu-mux

[PATCH v2 0/3] arm64: dts: qcom: x1e80100-hp-x14: add usb-1-ss1-sbu-mux

[Jens Glathe via B4 Relay]

The usb_1_1 port doesn't have the PS8830 repeater, but apparently some
MUX for DP altmode control. After a suggestion from sgerhold on
'#aarch64-laptops' I added gpio-sbu-mux nodes from the x1e80100-QCP
tree, and this appears to work well. It is still guesswork, but
working guesswork.

Added and rewired for usb_1_1

Also, did some more changes as tested here:

- remove unused i2c buses
- amend order of nodes.

The series is based on [1] from Johan.

Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
---
Changes in v2:
- removed overlapping patches with [1] and [2] - thanks Johan
- EDITME: use bulletpoints and terse descriptions.
- Link to v1: https://lore.kernel.org/r/20250410-hp-x14-v1-0-b4e5ca253ec9@oldschoolsolutions.biz

[1] https://lore.kernel.org/lkml/20250328084154.16759-1-johan+linaro@kernel.org/
[2] https://lore.kernel.org/r/20250319160509.1812805-1-juerg.haefliger@canonical.com

---
Jens Glathe (3):
      arm64: dts: qcom: x1e80100-hp-x14: add usb-1-ss1-sbu-mux
      arm64: dts: qcom: x1e80100-hp-x14: remove unused i2c buses
      arm64: dts: qcom: x1e80100-hp-x14: amend order of nodes

 .../boot/dts/qcom/x1e80100-hp-omnibook-x14.dts     | 98 ++++++++++++++--------
 1 file changed, 62 insertions(+), 36 deletions(-)
---
base-commit: 2791023c72489c91f59cfe818776fc6cd164ddad
change-id: 20250409-hp-x14-0f1d86bcb699

Best regards,
-- 
Jens Glathe <jens.glathe@oldschoolsolutions.biz>

[PATCH v2 1/3] arm64: dts: qcom: x1e80100-hp-x14: add usb-1-ss1-sbu-mux

[Jens Glathe via B4 Relay]

From: Jens Glathe <jens.glathe@oldschoolsolutions.biz>

The usb_1_1 port doesn't have the PS8830 repeater, but apparently some
MUX for DP altmode control. After a suggestion from sgerhold on
'#aarch64-laptops' I added gpio-sbu-mux nodes from the x1e80100-QCP
tree, and this appears to work well. It is still guesswork, but
working guesswork.

Added and rewired for usb_1_1

Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
---
 .../boot/dts/qcom/x1e80100-hp-omnibook-x14.dts     | 51 ++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts b/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts
index 26ea1787e5ecfb727a4f890895b7d7fb7b3f005d..582d4326d5d527d20f99e716349ea0e9c0d35099 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts
@@ -153,6 +153,14 @@ pmic_glink_ss1_ss_in: endpoint {
 						remote-endpoint = <&usb_1_ss1_qmpphy_out>;
 					};
 				};
+
+				port@2 {
+					reg = <2>;
+
+					pmic_glink_ss1_sbu: endpoint {
+						remote-endpoint = <&usb_1_ss1_sbu_mux>;
+					};
+				};
 			};
 		};
 	};
@@ -477,6 +485,25 @@ vreg_pmu_rfa_1p7: ldo9 {
 			};
 		};
 	};
+
+	usb-1-ss1-sbu-mux {
+		compatible = "onnn,fsusb42", "gpio-sbu-mux";
+
+		enable-gpios = <&tlmm 179 GPIO_ACTIVE_LOW>;
+		select-gpios = <&tlmm 178 GPIO_ACTIVE_HIGH>;
+
+		pinctrl-0 = <&usb_1_ss1_sbu_default>;
+		pinctrl-names = "default";
+
+		mode-switch;
+		orientation-switch;
+
+		port {
+			usb_1_ss1_sbu_mux: endpoint {
+				remote-endpoint = <&pmic_glink_ss1_sbu>;
+			};
+		};
+	};
 };
 
 &apps_rsc {
@@ -1424,6 +1451,30 @@ reset-n-pins {
 		};
 	};
 
+	usb_1_ss1_sbu_default: usb-1-ss1-sbu-state {
+		mode-pins {
+			pins = "gpio177";
+			function = "gpio";
+			bias-disable;
+			drive-strength = <2>;
+			output-high;
+		};
+
+		oe-n-pins {
+			pins = "gpio179";
+			function = "gpio";
+			bias-disable;
+			drive-strength = <2>;
+		};
+
+		sel-pins {
+			pins = "gpio178";
+			function = "gpio";
+			bias-disable;
+			drive-strength = <2>;
+		};
+	};
+
 	wcd_default: wcd-reset-n-active-state {
 		pins = "gpio191";
 		function = "gpio";

-- 
2.48.1

Re: [PATCH v2 1/3] arm64: dts: qcom: x1e80100-hp-x14: add usb-1-ss1-sbu-mux

[Johan Hovold]

[ +CC: Stephan ]

On Thu, Apr 10, 2025 at 12:07:28PM +0200, Jens Glathe via B4 Relay wrote:
> From: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
> 
> The usb_1_1 port doesn't have the PS8830 repeater, but apparently some
> MUX for DP altmode control. After a suggestion from sgerhold on
> '#aarch64-laptops' I added gpio-sbu-mux nodes from the x1e80100-QCP
> tree, and this appears to work well. It is still guesswork, but
> working guesswork.

Did you confirm the three GPIOs experimentally, for example, by making
sure that inverting the enable signal polarity breaks USB?

> +	usb-1-ss1-sbu-mux {
> +		compatible = "onnn,fsusb42", "gpio-sbu-mux";
> +
> +		enable-gpios = <&tlmm 179 GPIO_ACTIVE_LOW>;
> +		select-gpios = <&tlmm 178 GPIO_ACTIVE_HIGH>;
> +
> +		pinctrl-0 = <&usb_1_ss1_sbu_default>;
> +		pinctrl-names = "default";

>  };
>  
>  &apps_rsc {
> @@ -1424,6 +1451,30 @@ reset-n-pins {
>  		};
>  	};
>  
> +	usb_1_ss1_sbu_default: usb-1-ss1-sbu-state {
> +		mode-pins {
> +			pins = "gpio177";
> +			function = "gpio";
> +			bias-disable;
> +			drive-strength = <2>;
> +			output-high;
> +		};

This is more of a question for Stephan who added this to QCP [1], but
why is this mode pin here and what does it do?

It's not part of the binding for the mux (which indeed only has two
control signals according to the datasheet) so it looks like something
is not modelled correctly.

> +
> +		oe-n-pins {
> +			pins = "gpio179";
> +			function = "gpio";
> +			bias-disable;
> +			drive-strength = <2>;
> +		};
> +
> +		sel-pins {
> +			pins = "gpio178";
> +			function = "gpio";
> +			bias-disable;
> +			drive-strength = <2>;
> +		};
> +	};

Johan

[1] https://lore.kernel.org/all/20241212-x1e80100-qcp-dp-v1-2-37cb362a0dfe@linaro.org/

Re: [PATCH v2 1/3] arm64: dts: qcom: x1e80100-hp-x14: add usb-1-ss1-sbu-mux

[Stephan Gerhold]

On Fri, Apr 11, 2025 at 01:25:39PM +0200, Johan Hovold wrote:
> [ +CC: Stephan ]
> 
> On Thu, Apr 10, 2025 at 12:07:28PM +0200, Jens Glathe via B4 Relay wrote:
> > From: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
> > 
> > The usb_1_1 port doesn't have the PS8830 repeater, but apparently some
> > MUX for DP altmode control. After a suggestion from sgerhold on
> > '#aarch64-laptops' I added gpio-sbu-mux nodes from the x1e80100-QCP
> > tree, and this appears to work well. It is still guesswork, but
> > working guesswork.
> [...]
> > @@ -1424,6 +1451,30 @@ reset-n-pins {
> >  		};
> >  	};
> >  
> > +	usb_1_ss1_sbu_default: usb-1-ss1-sbu-state {
> > +		mode-pins {
> > +			pins = "gpio177";
> > +			function = "gpio";
> > +			bias-disable;
> > +			drive-strength = <2>;
> > +			output-high;
> > +		};
> 
> This is more of a question for Stephan who added this to QCP [1], but
> why is this mode pin here and what does it do?
> 
> It's not part of the binding for the mux (which indeed only has two
> control signals according to the datasheet) so it looks like something
> is not modelled correctly.
> 

I'm afraid you have opened a "can of worms" here. :')

On the QCP, there are actually two of these muxes chained for each port.
One of them does the orientation switching that we are describing here,
the other selects between routing SBU to DP AUX or USB SBTX/SBRX. I'm
guessing this is meant for USB4. Given that:

 - We don't have any support for USB4 on QC platforms at the moment.
 - We're not modelling the USB4 stuff for the retimer either(?).
 - We have no clear overview of what/how to model for USB4.
 - The ports without retimer aren't advertised with USB4 support (I'm
   guessing the signal quality is not reliable enough without retimer).
 - The gpio-sbu-mux driver doesn't support shared enable-gpios.

... we just went with the tradeoff of forcing DP AUX mode here by
setting a fixed state for the second mux. I'm not sure if the other
configuration is even a valid use case for the ports without retimer.

A comment about this would have been nice, but I didn't think of that
anymore when cleaning up the patches. :-)

Thanks,
Stephan

Re: [PATCH v2 1/3] arm64: dts: qcom: x1e80100-hp-x14: add usb-1-ss1-sbu-mux

[Johan Hovold]

On Fri, Apr 11, 2025 at 01:52:38PM +0200, Stephan Gerhold wrote:
> On Fri, Apr 11, 2025 at 01:25:39PM +0200, Johan Hovold wrote:
 
> > > +	usb_1_ss1_sbu_default: usb-1-ss1-sbu-state {
> > > +		mode-pins {
> > > +			pins = "gpio177";
> > > +			function = "gpio";
> > > +			bias-disable;
> > > +			drive-strength = <2>;
> > > +			output-high;
> > > +		};
> > 
> > This is more of a question for Stephan who added this to QCP [1], but
> > why is this mode pin here and what does it do?
> > 
> > It's not part of the binding for the mux (which indeed only has two
> > control signals according to the datasheet) so it looks like something
> > is not modelled correctly.
> 
> I'm afraid you have opened a "can of worms" here. :')

Heh.

> On the QCP, there are actually two of these muxes chained for each port.
> One of them does the orientation switching that we are describing here,
> the other selects between routing SBU to DP AUX or USB SBTX/SBRX. I'm
> guessing this is meant for USB4. Given that:
> 
>  - We don't have any support for USB4 on QC platforms at the moment.
>  - We're not modelling the USB4 stuff for the retimer either(?).
>  - We have no clear overview of what/how to model for USB4.
>  - The ports without retimer aren't advertised with USB4 support (I'm
>    guessing the signal quality is not reliable enough without retimer).
>  - The gpio-sbu-mux driver doesn't support shared enable-gpios.
> 
> ... we just went with the tradeoff of forcing DP AUX mode here by
> setting a fixed state for the second mux. I'm not sure if the other
> configuration is even a valid use case for the ports without retimer.
> 
> A comment about this would have been nice, but I didn't think of that
> anymore when cleaning up the patches. :-)

Thanks for the explanation. Makes sense.

Johan

[PATCH v2 2/3] arm64: dts: qcom: x1e80100-hp-x14: remove unused i2c buses

[Jens Glathe via B4 Relay]

From: Jens Glathe <jens.glathe@oldschoolsolutions.biz>

At least from Linux, these buses are not in use. Remove them from the dt.

Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
---
 .../boot/dts/qcom/x1e80100-hp-omnibook-x14.dts     | 25 ----------------------
 1 file changed, 25 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts b/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts
index 582d4326d5d527d20f99e716349ea0e9c0d35099..6c0e56168eaf133b9500c32b98821fa1fc3e7a2d 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts
@@ -904,15 +904,6 @@ touchpad@15 {
 	};
 };
 
-&i2c1 {
-	clock-frequency = <400000>;
-
-	status = "okay";
-
-	/* type-c PS8830 Retimer #2 0x8 */
-	/* is active on Windows */
-};
-
 &i2c3 {
 	clock-frequency = <400000>;
 
@@ -970,14 +961,6 @@ retimer_ss0_con_sbu_out: endpoint {
 	};
 };
 
-&i2c4 {
-	clock-frequency = <400000>;
-
-	status = "okay";
-
-	/* is active on Windows */
-};
-
 &i2c5 {
 	clock-frequency = <400000>;
 	status = "okay";
@@ -1018,14 +1001,6 @@ touchscreen@10 {
 	};
 };
 
-&i2c9 {
-	clock-frequency = <400000>;
-
-	status = "okay";
-
-	/* is active on Windows */
-};
-
 &lpass_tlmm {
 	spkr_01_sd_n_active: spkr-01-sd-n-active-state {
 		pins = "gpio12";

-- 
2.48.1

[PATCH v2 3/3] arm64: dts: qcom: x1e80100-hp-x14: amend order of nodes

[Jens Glathe via B4 Relay]

From: Jens Glathe <jens.glathe@oldschoolsolutions.biz>

amend the order of pmk8550_* nodes afte pmc8380_*

Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
---
 .../boot/dts/qcom/x1e80100-hp-omnibook-x14.dts     | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts b/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts
index 6c0e56168eaf133b9500c32b98821fa1fc3e7a2d..b492901f2d8c610e955c95aea60eb6c3d80d4f65 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts
@@ -1196,17 +1196,6 @@ edp_bl_reg_en: edp-bl-reg-en-state {
 
 };
 
-&pmk8550_gpios {
-	edp_bl_pwm: edp-bl-pwm-state {
-		pins = "gpio5";
-		function = "func3";
-	};
-};
-
-&pmk8550_pwm {
-	status = "okay";
-};
-
 &pmc8380_5_gpios {
 	usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state {
 		pins = "gpio8";
@@ -1218,6 +1207,17 @@ usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state {
 	};
 };
 
+&pmk8550_gpios {
+	edp_bl_pwm: edp-bl-pwm-state {
+		pins = "gpio5";
+		function = "func3";
+	};
+};
+
+&pmk8550_pwm {
+	status = "okay";
+};
+
 &qupv3_0 {
 	status = "okay";
 };

-- 
2.48.1