Re: [PATCH v8 03/10] clk: eyeq5: add platform driver, and init routine at of_clk_init()

[Andy Shevchenko <andriy.shevchenko@intel.com>]

On Wed, Feb 28, 2024 at 03:33:29PM +0100, Théo Lebrun wrote:
> On Tue Feb 27, 2024 at 6:11 PM CET, Andy Shevchenko wrote:
> > On Tue, Feb 27, 2024 at 03:55:24PM +0100, Théo Lebrun wrote:

[...]

> > > +	depends on OF
> >
> > Since it's a functional dependency, why not allow compile test without OF
> > being enabled?
> 
> I'd do this then:
> 
> 	depends on OF || COMPILE_TEST
> 
> Which is better than removing the depend line. I wouldn't want the
> kernel to build fine with OF=n even though we need it. OK for you?

Yes!

[...]

> > > +	u32		reg;	/* next 8 bytes are r0 and r1 */
> >
> > Not sure this comments gives any clarification to a mere reader of the code.
> > Perhaps you want to name this as reg64 (at least it will show that you have
> > 8 bytes, but I have no clue what is the semantic relationship between r0 and
> > r1, it's quite cryptic to me). Or maybe it should be reg_0_1?
> 
> Clocks are defined by two 32-bit registers. We only store the first
> register offset because they always follow each other.

> I like the reg64 name and will remove the comment. This straight forward
> code is found in the rest of the code, I don't think it is anything
> hard to understand (ie does not need a comment):
> 
> 	u32 r0 = readl(base_plls + pll->reg);
> 	u32 r1 = readl(base_plls + pll->reg + sizeof(r0));

Btw, why readq()/writeq() (with probably the inclusion of io-64-nonatomic-lo-hi.h)
can be used in this case? It will be much better overall and be aligned with
reg64 name.

[...]

> > I didn't get. If eq5c_init() was finished successfully, why do you need to
> > seems repeat what it already done? What did I miss?
> 
> The key here is that eq5c_init() iterates on eq5c_early_plls[] while
> eq5c_probe() iterates on eq5c_plls[]. I've tried to hint at this in the
> commit message:
> 
> > Two PLLs are required early on and are therefore registered at
> > of_clk_init(). Those are pll-cpu for the GIC timer and pll-per for the
> > UARTs.
> 
> Doing everything in eq5c_init() is not clean because we expect all new
> clock provider drivers to be standard platform drivers. Doing
> everything from a platform driver probe doesn't work because some
> clocks are required earlier than platform bus init. We therefore do a
> mix.

Am I missing something or these two pieces are using the same IO resources?
This looks like a lot of code duplication without clear benefit. Perhaps
you can have a helper?

> This has been approved by Stephen Boyd in this email:
> https://lore.kernel.org/lkml/fa32e6fae168e10d42051b89197855e9.sboyd@kernel.org/

OK!

[...]

> > > +		eq5c_clk_data->hws[pll->index] = hw;
> > > +		if (IS_ERR(hw))
> >
> > > +			dev_err_probe(dev, PTR_ERR(hw), "failed registering %s\n",
> > > +				      pll->name);
> >
> > Missed return statement?
> 
> No, we still try to register all clocks even if one failed. I guess we
> can call this being optimistic.

But how critical these clocks are? I believe we should panic it we have no
critical calls be available. Otherwise, why '_err_'? Shouldn't be dev_warn()?

-- 
With Best Regards,
Andy Shevchenko