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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?7tnGlzB4pKYAIX0zpvxtSLEtC0w4jTkmk+GTdkwsSYqdMRYZHKA3tE0ubsg7?= =?us-ascii?Q?+vNlFjLCagERIwcBU60G+1VQNqbzsklUxDsBTdVrVIbfch/PlUpB8lY7xF6T?= =?us-ascii?Q?AP0F0SQpLs4utK2DnB7iNeg0+hbsg4WRnrcnlTU8BpHy6zKHUFl2tjyPOS4S?= =?us-ascii?Q?P21BdQ/rYHOWAbSe37TT+U4/C6ZboakOU9wNrm0FQ+peZ1HYt1fBYlngxXnY?= =?us-ascii?Q?fOlEQUt8Tn58N69Zw/Qv7MCZY4D4ov5uVVBLR+CBjPOdVJ1977QZcR/J4XJ0?= =?us-ascii?Q?DlU3oE4h6nievDnSBbdvI+ZfsL2E6I3Xaei9VH2+aAggWOahnzTcoSPRTZBQ?= =?us-ascii?Q?WXD6MRBS8oImYtmfHbff92sJJj5zab2OIHLiaUr1ZqlIRcEJRmDJ6T2cVdHb?= =?us-ascii?Q?/5qawqu5NRqm1g+wYukcAsGMJvwqoHfJfQMPgZo71dF73WF9paXKiQy1sIzS?= =?us-ascii?Q?Uf0375+iRKtp8FPG8HMk69ct9pTHc9tRfHfwKUzoc7icgeJPe1AIcMGnTL+o?= =?us-ascii?Q?afJJbSvdyTepB+204robfI6L29coXKtU77ia8reuPrJvSFP7aC9gfBLiWr57?= =?us-ascii?Q?nlvO0vXPFzL7JoNPlebBaJHGHX56koA8H5PVnUtsEfj9NCm9qeCNmABWFfTo?= =?us-ascii?Q?9BWF/SuvMdju1G5RoNqXecYgyDA28FAdDcpFnPXD5TzOyG4S9/SaVDTByK5Y?= =?us-ascii?Q?k0ztqVNKwD93OS/7ufuzPxFu9pgExCj3wKa0XQQRlBmt4jtKLbsw/ReNfgxp?= =?us-ascii?Q?N32A3lhjyVU0WJGGn1sBmEQbG0TAgnxJfqs6+kCqKaGTq1HvEysvtwaqRAIM?= =?us-ascii?Q?1RPL8kF6kc2MrEs75Dy2z77Do8A1tqHlIAixWWHJ8Xp3oM9h/tJigdpaHykU?= =?us-ascii?Q?2IyQcImjZ7qB5uDWaVyQrEfQVAZqyrS0iy3fWedmVqwxxeQ6v9IBcahv260L?= =?us-ascii?Q?s9XR/CYtIcbJdcKd74l57j4jrSTscKwHGg8n+XRHo3kUBrntF62JvdzTKP3D?= =?us-ascii?Q?rXA+OuyiahwDt8UIt09oiLlMGn/iMBq75pUZ6ZIRq6wmxRB37hd5mfjgYF3a?= =?us-ascii?Q?QLvWzU4jlfgaGucYvARlxb8I9U3822+IE8MDisoZMw/6T/y82gtGOAKS29t2?= =?us-ascii?Q?KvDlbO74+g8uL9ChGf5ufrqpZSBKpUjf0bKuQ+7bzZEjzd44cilPJMO+X/TF?= =?us-ascii?Q?i6HPH7v8RYY2Q0uCwZnRPTFF/0d6g9OfGzpaAAsW79jVAM6ymvkbAmDQEcn9?= =?us-ascii?Q?VATljYeDCIIfkcJRT8aXIQWWv78HgFIxviNxtVXglHPOvW5R00/7Ru15whKr?= =?us-ascii?Q?vox791R2jCofQRI9X+3DURV8FUErFvAzoGxqx+TlCVkiTHfJAg/kVvBxC5F5?= =?us-ascii?Q?3GAVacpEGddMAOsgRoEft/4lB2+MY8JFlLhunDTjpz9igvsZD7vEwOpniiKv?= =?us-ascii?Q?CD63uxRbCnDB98o9EuWAbJLXzvBSMtrbcuL6uawpLJxKHhyHqwwhm6+VsejP?= =?us-ascii?Q?U9ercH3ggIOuJrkkus/AhQt9/EEIXNqnd2rCG1FU8pov+2d6ZVWQ/l14dzsK?= =?us-ascii?Q?68E2RAWN1Qt3ArR63NEmwg34Ilsqo5pydisSPiTO?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: bb12f016-2b26-40d9-361f-08dc3c7ecfbe X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9642.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Mar 2024 19:10:53.0745 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: iEtlsCVAg/0Wpnpk2ySzBQDNVK7Fp32X8JfJC9JDT+6pWzk3KB9W+pEBbaSfgDtGU8Ao1W8Yq25CdteiTfPgtw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS1PR04MB9357 On Mon, Mar 04, 2024 at 12:17:58PM -0600, Rob Herring wrote: > On Fri, Mar 01, 2024 at 11:27:40AM -0500, Frank Li wrote: > > Add snps,dw-pcie.yaml reference. Clean up all context that already exist in > > snps,dw-pcie.yaml. Update interrupt-names requirement for difference > > compatible string. > > > > Set 'unevaluatedProperties' back to 'false'. > > > > Signed-off-by: Frank Li > > --- > > .../bindings/pci/fsl,layerscape-pcie.yaml | 104 +++++++++++++----- > > 1 file changed, 78 insertions(+), 26 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/pci/fsl,layerscape-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,layerscape-pcie.yaml > > index 3f2d058701d22..137cc17933a4b 100644 > > --- a/Documentation/devicetree/bindings/pci/fsl,layerscape-pcie.yaml > > +++ b/Documentation/devicetree/bindings/pci/fsl,layerscape-pcie.yaml > > @@ -11,7 +11,6 @@ maintainers: > > > > description: > > This PCIe RC controller is based on the Synopsys DesignWare PCIe IP > > - and thus inherits all the common properties defined in snps,dw-pcie.yaml. > > > > This controller derives its clocks from the Reset Configuration Word (RCW) > > which is used to describe the PLL settings at the time of chip-reset. > > @@ -36,31 +35,18 @@ properties: > > - fsl,lx2160a-pcie > > > > reg: > > - description: base addresses and lengths of the PCIe controller register blocks. > > + maxItems: 2 > > + > > + reg-names: > > + maxItems: 2 > > Need to define what the entries are. You change 'regs' to 'dbi' in the > example. Was that an error in the example or are you planning on > changing it in dts files? Besides the latter being an ABI change, I > don't think you want to change dts files for platforms which are pretty > stable. It is on my plan. https://lore.kernel.org/linux-pci/20240229194559.709182-1-Frank.Li@nxp.com/ Need change driver first, then change dts. It still need maintainance, even it is stable. Frank > > > interrupts: > > - description: A list of interrupt outputs of the controller. Must contain an > > - entry for each entry in the interrupt-names property. > > + minItems: 1 > > + maxItems: 3 > > > > interrupt-names: > > minItems: 1 > > maxItems: 3 > > - description: It could include the following entries. > > - items: > > - oneOf: > > - - description: > > - Used for interrupt line which reports AER events when > > - non MSI/MSI-X/INTx mode is used. > > - const: aer > > - - description: > > - Used for interrupt line which reports PME events when > > - non MSI/MSI-X/INTx mode is used. > > - const: pme > > - - description: > > - Used for SoCs(like ls2080a, lx2160a, ls2080a, ls2088a, ls1088a) > > - which has a single interrupt line for miscellaneous controller > > - events(could include AER and PME events). > > - const: intr > > > > fsl,pcie-scfg: > > $ref: /schemas/types.yaml#/definitions/phandle > > @@ -69,23 +55,88 @@ properties: > > The second entry is the physical PCIe controller index starting from '0'. > > This is used to get SCFG PEXN registers > > > > - dma-coherent: > > - description: Indicates that the hardware IP block can ensure the coherency > > - of the data transferred from/to the IP block. This can avoid the software > > - cache flush/invalid actions, and improve the performance significantly > > + dma-coherent: true > > No need to list. > > > + > > + msi-parent: true > > + > > + iommu-map: true > > > > big-endian: > > $ref: /schemas/types.yaml#/definitions/flag > > description: If the PEX_LUT and PF register block is in big-endian, specify > > this property. > > > > -unevaluatedProperties: true > > +unevaluatedProperties: false > > > > required: > > - compatible > > - reg > > - interrupt-names > > > > +allOf: > > + - $ref: /schemas/pci/pci-bus.yaml# > > That's already referenced in the common schema. > > > + - $ref: /schemas/pci/snps,dw-pcie.yaml# > > + - if: > > + properties: > > + compatible: > > + enum: > > + - fsl,lx2160a-pcie > > + then: > > + properties: > > + interrupts: > > + maxItems: 3 > > max is already 3. > > minItems: 3 > > > + interrupt-names: > > + items: > > + - const: pme > > + - const: aer > > + - const: intr > > I guess since you figured out the ordering here, you should keep them > despite what I said in the first patch. > > > + > > + - if: > > + properties: > > + compatible: > > + enum: > > + - fsl,ls1028a-pcie > > + - fsl,ls1046a-pcie > > + - fsl,ls1043a-pcie > > + - fsl,ls1012a-pcie > > + then: > > + properties: > > + interrupts: > > + maxItems: 2 > > minItems: 2 > maxItems: 2 > > > + interrupt-names: > > + items: > > + - const: pme > > + - const: aer > > + > > + - if: > > + properties: > > + compatible: > > + enum: > > + - fsl,ls2080a-pcie > > + - fsl,ls2085a-pcie > > + - fsl,ls2088a-pcie > > + - fsl,ls1021a-pcie > > + then: > > + properties: > > + interrupts: > > + maxItems: 1 > > + interrupt-names: > > + items: > > + - const: intr > > + > > + - if: > > + properties: > > + compatible: > > + enum: > > + - fsl,ls1088a-pcie > > + then: > > + properties: > > + interrupts: > > + maxItems: 1 > > + interrupt-names: > > + items: > > + - const: aer > > + > > examples: > > - | > > #include > > @@ -98,7 +149,7 @@ examples: > > compatible = "fsl,ls1088a-pcie"; > > reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */ > > <0x20 0x00000000 0x0 0x00002000>; /* configuration space */ > > - reg-names = "regs", "config"; > > + reg-names = "dbi", "config"; > > interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */ > > interrupt-names = "aer"; > > #address-cells = <3>; > > @@ -116,6 +167,7 @@ examples: > > <0000 0 0 3 &gic 0 0 0 111 IRQ_TYPE_LEVEL_HIGH>, > > <0000 0 0 4 &gic 0 0 0 112 IRQ_TYPE_LEVEL_HIGH>; > > iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */ > > + msi-map = <0 &its 0 1>; /* Fixed-up by bootloader */ > > }; > > }; > > ... > > -- > > 2.34.1 > >