From: Sudeep Holla <sudeep.holla@arm.com>
To: Nikunj Kela <quic_nkela@quicinc.com>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
Ulf Hansson <ulf.hansson@linaro.org>,
Sudeep Holla <sudeep.holla@arm.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
<krzysztof.kozlowski+dt@linaro.org>,
Vincent Guittot <vincent.guittot@linaro.org>,
<robh+dt@kernel.org>, <conor+dt@kernel.org>,
<devicetree@vger.kernel.org>,
"Prasad Sodagudi (QUIC)" <quic_psodagud@quicinc.com>,
"Trilok Soni (QUIC)" <quic_tsoni@quicinc.com>
Subject: Re: DT Query on "New Compatible vs New Property"
Date: Thu, 14 Mar 2024 15:38:28 +0000 [thread overview]
Message-ID: <ZfMZ9ATxuvONcGpz@bogus> (raw)
In-Reply-To: <487f91af-722f-44eb-a1a2-61dec586d686@quicinc.com>
On Thu, Mar 14, 2024 at 05:35:23AM -0700, Nikunj Kela wrote:
>
> On 3/14/2024 3:55 AM, Sudeep Holla wrote:
> > >
> > Nope, the point was will the presence of (available) scmi/rpmi device
> > node suffice if we are thinking of single board level property or
> > compatible. I was not mixing the discussion of whether adding such
> > a property to each needed device node in this discussion to keep it
> > simple. I have already expressed my opinion on that.
> >
> > I am sure qcom will go and do what they want which may work fine for
> > qcom specific drivers but it will not work for a generic IP driver
> > used by many vendors. Not sure if Qcom SoCs are just bundle of Qcom
> > specific IPs or they do have some generic non-Qcom IPs. Lets us take
> > SMMU as example. If the SCMI/RPMI controls the power to it, would you
> > go and add this new compatible in the generic SMMU bindings and add
> > support in the driver for that ? That is big NO as the driver would
> > just need to use std framework interface(doesn't matter Runtime PM/Clock/
> > Reset/genpd/PM OPP). That means they don't need any specific bindings
> > to inform SMMU driver that the power is f/w managed.
>
> For SMMU, we dont need to make any changes in the existing driver. Simple
> power-domain over SCMI will suffice since we don't need to do clock scaling
> etc. for SMMU. We will use this new property in Qualcomm emac, UFS, USB,
> QUPs(i2c,spi,uart) drivers.
Sure, as I mentioned in the beginning itself, it is all in the Qcom
specific drivers, well you can hack it in any ugly way you want to get
things working even in the upstream.
But just stop and think for a moment how would you solve this problem
if you had few Synopsys Designware IPs instead of all those Qcom specific
IPs. Will your suggested solution work or if it works will that even scale ?
As I said I will shut up and you can do whatever in your drivers, but I
just don't want this to set bad example for other vendors who may not have
all their own IPs and may use some generic ones which means they will now
follow your solution and go and change those drivers now.
The main point I am trying to make is the provide blocks/nodes should
have the information that it is firmware managed. The consumer nodes
have no business to know that information.
I will leave it to you now as I can't stop what you define as Qcom specific
and what changes you can make in those Qcom specific drivers.
--
Regards,
Sudeep
next prev parent reply other threads:[~2024-03-14 15:38 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-12 17:45 DT Query on "New Compatible vs New Property" Nikunj Kela
2023-12-12 19:01 ` Krzysztof Kozlowski
2023-12-12 19:06 ` Nikunj Kela
2023-12-14 6:17 ` Manivannan Sadhasivam
2023-12-14 7:49 ` Krzysztof Kozlowski
2023-12-14 15:18 ` Nikunj Kela
2024-01-23 16:12 ` Manivannan Sadhasivam
2024-01-24 8:02 ` Krzysztof Kozlowski
2024-01-24 8:39 ` Manivannan Sadhasivam
2024-01-24 8:45 ` Krzysztof Kozlowski
2024-01-24 8:53 ` Manivannan Sadhasivam
2024-01-24 9:01 ` Krzysztof Kozlowski
2024-01-24 9:27 ` Manivannan Sadhasivam
2024-01-24 9:40 ` Krzysztof Kozlowski
2024-01-24 10:36 ` Manivannan Sadhasivam
2024-01-24 10:23 ` Sudeep Holla
2024-01-24 10:45 ` Manivannan Sadhasivam
2024-01-24 11:02 ` Sudeep Holla
2024-01-24 12:27 ` Nikunj Kela
2024-01-24 12:48 ` Sudeep Holla
2024-01-24 13:17 ` Nikunj Kela
2024-01-24 13:38 ` Vincent Guittot
2024-01-24 14:04 ` Sudeep Holla
2024-01-24 14:28 ` Nikunj Kela
2024-01-24 17:24 ` Sudeep Holla
2024-01-24 17:33 ` Nikunj Kela
2024-02-26 14:22 ` Nikunj Kela
2024-02-28 13:27 ` Ulf Hansson
2024-02-28 14:02 ` Sudeep Holla
2024-02-28 14:20 ` Krzysztof Kozlowski
2024-02-28 16:09 ` Sudeep Holla
2024-02-28 16:22 ` Ulf Hansson
2024-02-28 17:11 ` Srinivas Kandagatla
2024-03-01 11:53 ` Ulf Hansson
2024-03-04 11:01 ` Sudeep Holla
2024-03-12 16:52 ` Nikunj Kela
2024-03-12 16:58 ` Trilok Soni
2024-03-12 17:08 ` Nikunj Kela
2024-03-12 17:21 ` Srinivas Kandagatla
2024-03-12 17:25 ` Trilok Soni
2024-03-13 9:19 ` Ulf Hansson
2024-03-13 9:31 ` Nikunj Kela
2024-03-13 11:21 ` Srinivas Kandagatla
2024-03-13 11:49 ` Srinivas Kandagatla
2024-03-13 22:40 ` Trilok Soni
2024-04-10 16:53 ` Nikunj Kela
2024-04-11 9:29 ` Sudeep Holla
2024-03-13 11:04 ` Sudeep Holla
2024-03-13 13:04 ` Srinivas Kandagatla
2024-03-14 10:55 ` Sudeep Holla
2024-03-14 12:35 ` Nikunj Kela
2024-03-14 15:38 ` Sudeep Holla [this message]
2024-03-16 19:30 ` Trilok Soni
2024-03-19 10:17 ` Srinivas Kandagatla
2024-03-19 12:00 ` Sudeep Holla
2024-03-19 14:40 ` Srinivas Kandagatla
2024-03-19 15:17 ` Sudeep Holla
2024-03-19 15:41 ` Srinivas Kandagatla
2024-03-19 16:13 ` Sudeep Holla
2024-04-10 16:55 ` Nikunj Kela
2024-04-10 17:13 ` Krzysztof Kozlowski
2024-04-10 17:24 ` Nikunj Kela
2024-04-11 15:44 ` Conor Dooley
2024-04-11 15:55 ` Nikunj Kela
2024-04-11 19:29 ` Krzysztof Kozlowski
2024-04-12 10:16 ` Sudeep Holla
2024-04-11 9:23 ` Sudeep Holla
2024-04-11 15:59 ` Nikunj Kela
2024-04-12 10:12 ` Sudeep Holla
2024-01-24 14:01 ` Sudeep Holla
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