Re: [RFC PATCH 2/2] net: phy: mxl-gpy: add new device tree property to disable SGMII autoneg

Stefan Eichenberger
2024-04-16T15:43:20Z

Hi Andrew,

Thanks a lot for the feedback.

On Tue, Apr 16, 2024 at 03:46:19PM +0200, Andrew Lunn wrote:
> On Tue, Apr 16, 2024 at 02:10:32PM +0200, Stefan Eichenberger wrote:
> > Add a new device tree property to disable SGMII autonegotiation and
> > instead use the option to match the SGMII speed to what was negotiated
> > on the twisted pair interface (tpi).
>
> Could you explain this is more detail.
>
> SGMII always runs its clocks at 1000Mbps. The MAC needs to duplicate
> the symbols 100 times when running at 10Mbs, and 10 times when running
> at 100Mbps.

Currently, the mxl-gpy driver uses SGMII autonegotiation for 10 Mbps,
100 Mbps, and 1000 Mbps. For our Ethernet controller, which is on an
Octeon TX2 SoC, this means that we have to enable "in-band-status" on
the controller. This will work for all three speed settings. However, if
we have a link partner that can do 2.5 Gbps, the mxl-gpy driver will
disable SGMII autonegotiation in gpy_update_interface. This is not
supported by this Ethernet controller because in-band-status is still
enabled. Therefore, we will not be able to transfer data at 2.5 Gbps,
the SGMII link will not go into a working state.

What this patch does is, if the maxlinear,sgmii-match-tpi-speed property
is set, it will always use the link speed negotiated on the twisted pair
interface and adjust the SGMII data rate accordingly. For the Octeon
controller, this means that we don't set the in-band-status mode because
we don't use the SGMII autnegotiation and all 4 speeds (10, 100, 1000,
2500 Mbps) are working.

Here the description from the datasheet (this patch forces the SGMII
speed to the TPI speed):
If bit 12 is set to a logic one, ANMODE field determines the Auto-
Negotiation protocol. If bit 12 is cleared to a logic zero, speed is set
to maximum in full duplex mode. Once the TPI link is up, the SGMII speed
is automatically forced to match the TPI speed. This bit has no effect
when SGMII_FIXED2G5 is ‘1’.

Best regards,
Stefan