From: Shawn Guo <shawnguo2@yeah.net>
To: Parthiban Nallathambi <parthiban@linumiz.com>
Cc: shawnguo@kernel.org, s.hauer@pengutronix.de, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, kernel@pengutronix.de,
festevam@gmail.com, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] arm64: phygate-tauri-l enable pcie phy
Date: Sun, 16 Jun 2024 10:28:02 +0800 [thread overview]
Message-ID: <Zm5NskGQrjQk5SSZ@dragon> (raw)
In-Reply-To: <20240525171854.2165241-1-parthiban@linumiz.com>
On Sat, May 25, 2024 at 10:48:53PM +0530, Parthiban Nallathambi wrote:
> I210 intel ethernet controller is connected to PCIe. Enable the PHY
> to use the ethernet controller.
>
> Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Subject prefix should be 'arm64: dts: phygate-tauri-l: ...'
Fixed it up and applied both, thanks!
prev parent reply other threads:[~2024-06-16 2:28 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-25 17:18 [PATCH 1/2] arm64: phygate-tauri-l enable pcie phy Parthiban Nallathambi
2024-05-25 17:18 ` [PATCH 2/2] arm64: phygate-tauri-l add overlays for RS232 and RS485 Parthiban Nallathambi
2024-06-16 2:28 ` Shawn Guo [this message]
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