* [PATCH v2] arm64: dts: qcom: x1e80100: Enable tsens and thermal zone nodes
@ 2024-06-14 10:50 Abel Vesa
2024-06-17 9:24 ` Johan Hovold
2024-06-18 11:06 ` Konrad Dybcio
0 siblings, 2 replies; 6+ messages in thread
From: Abel Vesa @ 2024-06-14 10:50 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Rajendra Nayak,
Abel Vesa
From: Rajendra Nayak <quic_rjendra@quicinc.com>
Add tsens and thermal zones nodes for x1e80100 SoC.
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---
Changes in v2:
- Dropped the thermal engine nodes.
- Dropped comments from tsens nodes.
- Droppd the polling-delay entirely and polling-delay-passive where not
necessary.
- Added top/bottom location to all sensors (where applicable).
- Fixed trip points with duplicate values for same temp.
- Marked as critical the 125°C throughout all trip points.
- Link to v1: https://lore.kernel.org/r/20240527-x1e80100-dts-thermal-v1-1-ea13b8fa6ffc@linaro.org
---
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 1176 ++++++++++++++++++++++++++++++++
1 file changed, 1176 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index 9944c654851e..df13df7967db 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -2505,6 +2505,66 @@ &config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS>,
};
};
+ tsens0: thermal-sensor@c271000 {
+ compatible = "qcom,x1e80100-tsens", "qcom,tsens-v2";
+ reg = <0 0x0c271000 0 0x1000>,
+ <0 0x0c222000 0 0x1000>;
+
+ interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow",
+ "critical";
+
+ #qcom,sensors = <16>;
+
+ #thermal-sensor-cells = <1>;
+ };
+
+ tsens1: thermal-sensor@c272000 {
+ compatible = "qcom,x1e80100-tsens", "qcom,tsens-v2";
+ reg = <0 0x0c272000 0 0x1000>,
+ <0 0x0c223000 0 0x1000>;
+
+ interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow",
+ "critical";
+
+ #qcom,sensors = <16>;
+
+ #thermal-sensor-cells = <1>;
+ };
+
+ tsens2: thermal-sensor@c273000 {
+ compatible = "qcom,x1e80100-tsens", "qcom,tsens-v2";
+ reg = <0 0x0c273000 0 0x1000>,
+ <0 0x0c224000 0 0x1000>;
+
+ interrupts = <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow",
+ "critical";
+
+ #qcom,sensors = <16>;
+
+ #thermal-sensor-cells = <1>;
+ };
+
+ tsens3: thermal-sensor@c274000 {
+ compatible = "qcom,x1e80100-tsens", "qcom,tsens-v2";
+ reg = <0 0x0c274000 0 0x1000>,
+ <0 0x0c225000 0 0x1000>;
+
+ interrupts = <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 770 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow",
+ "critical";
+
+ #qcom,sensors = <16>;
+
+ #thermal-sensor-cells = <1>;
+ };
+
usb_1_ss0_hsphy: phy@fd3000 {
compatible = "qcom,x1e80100-snps-eusb2-phy",
"qcom,sm8550-snps-eusb2-phy";
@@ -5469,4 +5529,1120 @@ timer {
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
};
+
+ thermal-zones {
+ aoss0-thermal {
+ thermal-sensors = <&tsens0 0>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
+ aoss0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu0-0-top-thermal {
+ thermal-sensors = <&tsens0 1>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu0-0-bottom-thermal {
+ thermal-sensors = <&tsens0 2>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu0-1-top-thermal {
+ thermal-sensors = <&tsens0 3>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu0-1-bottom-thermal {
+ thermal-sensors = <&tsens0 4>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu0-2-top-thermal {
+ thermal-sensors = <&tsens0 5>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu0-2-bottom-thermal {
+ thermal-sensors = <&tsens0 6>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu0-3-top-thermal {
+ thermal-sensors = <&tsens0 7>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu0-3-bottom-thermal {
+ thermal-sensors = <&tsens0 8>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpuss0-top-thermal {
+ thermal-sensors = <&tsens0 9>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
+ cpuss2-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpuss0-bottom-thermal {
+ thermal-sensors = <&tsens0 10>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
+ cpuss2-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ mem-thermal {
+ polling-delay-passive = <250>;
+
+ thermal-sensors = <&tsens0 11>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
+ mem-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ video-thermal {
+ polling-delay-passive = <250>;
+
+ thermal-sensors = <&tsens0 12>;
+
+ trips {
+ trip-point0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ aoss1-thermal {
+ thermal-sensors = <&tsens1 0>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
+ aoss0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu1-0-top-thermal {
+ thermal-sensors = <&tsens1 1>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu1-0-bottom-thermal {
+ thermal-sensors = <&tsens1 2>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu1-1-top-thermal {
+ thermal-sensors = <&tsens1 3>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu1-1-bottom-thermal {
+ thermal-sensors = <&tsens1 4>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu1-2-top-thermal {
+ thermal-sensors = <&tsens1 5>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu1-2-bottom-thermal {
+ thermal-sensors = <&tsens1 6>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu1-3-top-thermal {
+ thermal-sensors = <&tsens1 7>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu1-3-bottom-thermal {
+ thermal-sensors = <&tsens1 8>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpuss1-top-thermal {
+ thermal-sensors = <&tsens1 9>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
+ cpuss2-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpuss1-bottom-thermal {
+ thermal-sensors = <&tsens1 10>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
+ cpuss2-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ aoss2-thermal {
+ thermal-sensors = <&tsens2 0>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
+ aoss0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu2-0-top-thermal {
+ thermal-sensors = <&tsens2 1>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu2-0-bottom-thermal {
+ thermal-sensors = <&tsens2 2>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu2-1-top-thermal {
+ thermal-sensors = <&tsens2 3>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu2-1-bottom-thermal {
+ thermal-sensors = <&tsens2 4>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu2-2-top-thermal {
+ thermal-sensors = <&tsens2 5>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu2-2-bottom-thermal {
+ thermal-sensors = <&tsens2 6>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu2-3-top-thermal {
+ thermal-sensors = <&tsens2 7>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu2-3-bottom-thermal {
+ thermal-sensors = <&tsens2 8>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpuss2-top-thermal {
+ thermal-sensors = <&tsens2 9>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
+ cpuss2-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpuss2-bottom-thermal {
+ thermal-sensors = <&tsens2 10>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
+ cpuss2-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ aoss3-thermal {
+ thermal-sensors = <&tsens3 0>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
+ aoss0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ nsp0-thermal {
+ polling-delay-passive = <10>;
+
+ thermal-sensors = <&tsens3 1>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
+ nsp0-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ nsp1-thermal {
+ polling-delay-passive = <10>;
+
+ thermal-sensors = <&tsens3 2>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
+ nsp1-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ nsp2-thermal {
+ polling-delay-passive = <10>;
+
+ thermal-sensors = <&tsens3 3>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
+ nsp2-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ nsp3-thermal {
+ polling-delay-passive = <10>;
+
+ thermal-sensors = <&tsens3 4>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
+ nsp3-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpuss-0-thermal {
+ polling-delay-passive = <10>;
+
+ thermal-sensors = <&tsens3 5>;
+
+ trips {
+ trip-point0 {
+ temperature = <85000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <90000>;
+ hysteresis = <1000>;
+ type = "hot";
+ };
+
+ trip-point2 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpuss-1-thermal {
+ polling-delay-passive = <10>;
+
+ thermal-sensors = <&tsens3 6>;
+
+ trips {
+ trip-point0 {
+ temperature = <85000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <90000>;
+ hysteresis = <1000>;
+ type = "hot";
+ };
+
+ trip-point2 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpuss-2-thermal {
+ polling-delay-passive = <10>;
+
+ thermal-sensors = <&tsens3 7>;
+
+ trips {
+ trip-point0 {
+ temperature = <85000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <90000>;
+ hysteresis = <1000>;
+ type = "hot";
+ };
+
+ trip-point2 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpuss-3-thermal {
+ polling-delay-passive = <10>;
+
+ thermal-sensors = <&tsens3 8>;
+
+ trips {
+ trip-point0 {
+ temperature = <85000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <90000>;
+ hysteresis = <1000>;
+ type = "hot";
+ };
+
+ trip-point2 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpuss-4-thermal {
+ polling-delay-passive = <10>;
+
+ thermal-sensors = <&tsens3 9>;
+
+ trips {
+ trip-point0 {
+ temperature = <85000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <90000>;
+ hysteresis = <1000>;
+ type = "hot";
+ };
+
+ trip-point2 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpuss-5-thermal {
+ polling-delay-passive = <10>;
+
+ thermal-sensors = <&tsens3 10>;
+
+ trips {
+ trip-point0 {
+ temperature = <85000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <90000>;
+ hysteresis = <1000>;
+ type = "hot";
+ };
+
+ trip-point2 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpuss-6-thermal {
+ polling-delay-passive = <10>;
+
+ thermal-sensors = <&tsens3 11>;
+
+ trips {
+ trip-point0 {
+ temperature = <85000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <90000>;
+ hysteresis = <1000>;
+ type = "hot";
+ };
+
+ trip-point2 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpuss-7-thermal {
+ polling-delay-passive = <10>;
+
+ thermal-sensors = <&tsens3 12>;
+
+ trips {
+ trip-point0 {
+ temperature = <85000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <90000>;
+ hysteresis = <1000>;
+ type = "hot";
+ };
+
+ trip-point2 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ camera0-thermal {
+ thermal-sensors = <&tsens3 13>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
+ camera0-critical {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ camera1-thermal {
+ thermal-sensors = <&tsens3 14>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
+ camera0-critical {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+ };
};
---
base-commit: 6906a84c482f098d31486df8dc98cead21cce2d0
change-id: 20240109-x1e80100-dts-thermal-47db566a60bc
Best regards,
--
Abel Vesa <abel.vesa@linaro.org>
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2] arm64: dts: qcom: x1e80100: Enable tsens and thermal zone nodes
2024-06-14 10:50 [PATCH v2] arm64: dts: qcom: x1e80100: Enable tsens and thermal zone nodes Abel Vesa
@ 2024-06-17 9:24 ` Johan Hovold
2024-06-18 10:00 ` Abel Vesa
2024-06-18 11:06 ` Konrad Dybcio
1 sibling, 1 reply; 6+ messages in thread
From: Johan Hovold @ 2024-06-17 9:24 UTC (permalink / raw)
To: Abel Vesa
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-arm-msm, devicetree, linux-kernel,
Rajendra Nayak
On Fri, Jun 14, 2024 at 01:50:07PM +0300, Abel Vesa wrote:
> From: Rajendra Nayak <quic_rjendra@quicinc.com>
>
> Add tsens and thermal zones nodes for x1e80100 SoC.
>
> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
> Changes in v2:
> - Dropped the thermal engine nodes.
> - Dropped comments from tsens nodes.
> - Droppd the polling-delay entirely and polling-delay-passive where not
> necessary.
> - Added top/bottom location to all sensors (where applicable).
> - Fixed trip points with duplicate values for same temp.
> - Marked as critical the 125°C throughout all trip points.
> - Link to v1: https://lore.kernel.org/r/20240527-x1e80100-dts-thermal-v1-1-ea13b8fa6ffc@linaro.org
> ---
> arch/arm64/boot/dts/qcom/x1e80100.dtsi | 1176 ++++++++++++++++++++++++++++++++
> 1 file changed, 1176 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> index 9944c654851e..df13df7967db 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> + cpu0-0-bottom-thermal {
> + thermal-sensors = <&tsens0 2>;
> +
> + trips {
> + trip-point0 {
> + temperature = <90000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> +
> + trip-point1 {
> + temperature = <95000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> +
> + cpu-critical {
> + temperature = <110000>;
> + hysteresis = <1000>;
> + type = "critical";
> + };
> + };
> + };
The CPU bottom thermal zones fail to register with v2:
[ 0.146219] thermal_sys: Thermal zone name (cpu0-0-bottom-thermal) too long, should be under 20 chars
[ 0.146241] thermal_sys: Failed to register thermal zone cpu0-0-bottom-thermal: -22
[ 0.146474] thermal_sys: Thermal zone name (cpu0-1-bottom-thermal) too long, should be under 20 chars
[ 0.146495] thermal_sys: Failed to register thermal zone cpu0-1-bottom-thermal: -22
[ 0.146753] thermal_sys: Thermal zone name (cpu0-2-bottom-thermal) too long, should be under 20 chars
[ 0.146774] thermal_sys: Failed to register thermal zone cpu0-2-bottom-thermal: -22
[ 0.147024] thermal_sys: Thermal zone name (cpu0-3-bottom-thermal) too long, should be under 20 chars
[ 0.147045] thermal_sys: Failed to register thermal zone cpu0-3-bottom-thermal: -22
[ 0.147297] thermal_sys: Thermal zone name (cpuss0-bottom-thermal) too long, should be under 20 chars
[ 0.147319] thermal_sys: Failed to register thermal zone cpuss0-bottom-thermal: -22
[ 0.149401] thermal_sys: Thermal zone name (cpu1-0-bottom-thermal) too long, should be under 20 chars
[ 0.149423] thermal_sys: Failed to register thermal zone cpu1-0-bottom-thermal: -22
[ 0.149765] thermal_sys: Thermal zone name (cpu1-1-bottom-thermal) too long, should be under 20 chars
[ 0.149787] thermal_sys: Failed to register thermal zone cpu1-1-bottom-thermal: -22
[ 0.150098] thermal_sys: Thermal zone name (cpu1-2-bottom-thermal) too long, should be under 20 chars
[ 0.150119] thermal_sys: Failed to register thermal zone cpu1-2-bottom-thermal: -22
[ 0.150437] thermal_sys: Thermal zone name (cpu1-3-bottom-thermal) too long, should be under 20 chars
[ 0.150458] thermal_sys: Failed to register thermal zone cpu1-3-bottom-thermal: -22
[ 0.150775] thermal_sys: Thermal zone name (cpuss1-bottom-thermal) too long, should be under 20 chars
[ 0.150796] thermal_sys: Failed to register thermal zone cpuss1-bottom-thermal: -22
[ 0.152838] thermal_sys: Thermal zone name (cpu2-0-bottom-thermal) too long, should be under 20 chars
[ 0.152859] thermal_sys: Failed to register thermal zone cpu2-0-bottom-thermal: -22
[ 0.153211] thermal_sys: Thermal zone name (cpu2-1-bottom-thermal) too long, should be under 20 chars
[ 0.153232] thermal_sys: Failed to register thermal zone cpu2-1-bottom-thermal: -22
[ 0.153603] thermal_sys: Thermal zone name (cpu2-2-bottom-thermal) too long, should be under 20 chars
[ 0.153624] thermal_sys: Failed to register thermal zone cpu2-2-bottom-thermal: -22
[ 0.153994] thermal_sys: Thermal zone name (cpu2-3-bottom-thermal) too long, should be under 20 chars
[ 0.154015] thermal_sys: Failed to register thermal zone cpu2-3-bottom-thermal: -22
[ 0.154386] thermal_sys: Thermal zone name (cpuss2-bottom-thermal) too long, should be under 20 chars
[ 0.154407] thermal_sys: Failed to register thermal zone cpuss2-bottom-thermal: -22
Johan
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2] arm64: dts: qcom: x1e80100: Enable tsens and thermal zone nodes
2024-06-17 9:24 ` Johan Hovold
@ 2024-06-18 10:00 ` Abel Vesa
2024-06-18 11:40 ` Johan Hovold
0 siblings, 1 reply; 6+ messages in thread
From: Abel Vesa @ 2024-06-18 10:00 UTC (permalink / raw)
To: Johan Hovold
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-arm-msm, devicetree, linux-kernel,
Rajendra Nayak
On 24-06-17 11:24:22, Johan Hovold wrote:
> On Fri, Jun 14, 2024 at 01:50:07PM +0300, Abel Vesa wrote:
> > From: Rajendra Nayak <quic_rjendra@quicinc.com>
> >
> > Add tsens and thermal zones nodes for x1e80100 SoC.
> >
> > Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
> > Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> > ---
> > Changes in v2:
> > - Dropped the thermal engine nodes.
> > - Dropped comments from tsens nodes.
> > - Droppd the polling-delay entirely and polling-delay-passive where not
> > necessary.
> > - Added top/bottom location to all sensors (where applicable).
> > - Fixed trip points with duplicate values for same temp.
> > - Marked as critical the 125°C throughout all trip points.
> > - Link to v1: https://lore.kernel.org/r/20240527-x1e80100-dts-thermal-v1-1-ea13b8fa6ffc@linaro.org
> > ---
> > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 1176 ++++++++++++++++++++++++++++++++
> > 1 file changed, 1176 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> > index 9944c654851e..df13df7967db 100644
> > --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
>
> > + cpu0-0-bottom-thermal {
> > + thermal-sensors = <&tsens0 2>;
> > +
> > + trips {
> > + trip-point0 {
> > + temperature = <90000>;
> > + hysteresis = <2000>;
> > + type = "passive";
> > + };
> > +
> > + trip-point1 {
> > + temperature = <95000>;
> > + hysteresis = <2000>;
> > + type = "passive";
> > + };
> > +
> > + cpu-critical {
> > + temperature = <110000>;
> > + hysteresis = <1000>;
> > + type = "critical";
> > + };
> > + };
> > + };
>
> The CPU bottom thermal zones fail to register with v2:
>
> [ 0.146219] thermal_sys: Thermal zone name (cpu0-0-bottom-thermal) too long, should be under 20 chars
Urgh, did not test after renaming the zones.
Talking to Daniel Lezcano, he seems to suggest that the size can become
dynamic at some point. For now will switch back to
cpu0-0-0-bottom-thermal and cpuss0-0-thermal. So that's O for top and 1
for bottom. TBF, the positions are not really top and bottom on this
platform, but rather left top and right bottom.
>
> Johan
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2] arm64: dts: qcom: x1e80100: Enable tsens and thermal zone nodes
2024-06-14 10:50 [PATCH v2] arm64: dts: qcom: x1e80100: Enable tsens and thermal zone nodes Abel Vesa
2024-06-17 9:24 ` Johan Hovold
@ 2024-06-18 11:06 ` Konrad Dybcio
2024-06-20 12:52 ` Abel Vesa
1 sibling, 1 reply; 6+ messages in thread
From: Konrad Dybcio @ 2024-06-18 11:06 UTC (permalink / raw)
To: Abel Vesa, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Rajendra Nayak
On 6/14/24 12:50, Abel Vesa wrote:
> From: Rajendra Nayak <quic_rjendra@quicinc.com>
>
> Add tsens and thermal zones nodes for x1e80100 SoC.
>
> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
[...]
> + tsens0: thermal-sensor@c271000 {
> + compatible = "qcom,x1e80100-tsens", "qcom,tsens-v2";
> + reg = <0 0x0c271000 0 0x1000>,
> + <0 0x0c222000 0 0x1000>;
> +
> + interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>;
These are normally wired up through PDC so that the system can shut down
even if CPUSS is off
[...]
> + cpu0-0-top-thermal {
> + thermal-sensors = <&tsens0 1>;
Here you have passive trip points with no passive polling, this will
only report threshold crossing events (so e.g. cpufreq throttling will
be broken)
> +
> + trips {
> + trip-point0 {
> + temperature = <90000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> +
> + trip-point1 {
> + temperature = <95000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> +
> + cpu-critical {
> + temperature = <110000>;
> + hysteresis = <1000>;
> + type = "critical";
> + };
> + };
> + };
> +
[...]
> +
> + nsp1-thermal {
> + polling-delay-passive = <10>;
Here you have passive polling, but no passive trip point
> +
> + thermal-sensors = <&tsens3 2>;
> +
> + trips {
> + trip-point0 {
> + temperature = <90000>;
> + hysteresis = <2000>;
> + type = "hot";
> + };
> +
> + nsp1-critical {
> + temperature = <125000>;
> + hysteresis = <0>;
> + type = "critical";
> + };
> + };
> + };
The rest looks okayish
Konrad
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2] arm64: dts: qcom: x1e80100: Enable tsens and thermal zone nodes
2024-06-18 10:00 ` Abel Vesa
@ 2024-06-18 11:40 ` Johan Hovold
0 siblings, 0 replies; 6+ messages in thread
From: Johan Hovold @ 2024-06-18 11:40 UTC (permalink / raw)
To: Abel Vesa
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-arm-msm, devicetree, linux-kernel,
Rajendra Nayak
On Tue, Jun 18, 2024 at 01:00:06PM +0300, Abel Vesa wrote:
> On 24-06-17 11:24:22, Johan Hovold wrote:
> > The CPU bottom thermal zones fail to register with v2:
> >
> > [ 0.146219] thermal_sys: Thermal zone name (cpu0-0-bottom-thermal) too long, should be under 20 chars
>
> Urgh, did not test after renaming the zones.
>
> Talking to Daniel Lezcano, he seems to suggest that the size can become
> dynamic at some point. For now will switch back to
> cpu0-0-0-bottom-thermal and cpuss0-0-thermal. So that's O for top and 1
> for bottom.
Did you mean to say 'cpu0-0-0-thermal' and 'cpu0-0-1-thermal'?
Abbreviating 'bottom' (e.g. as 'btm') also works and may be preferred as
it's not very obvious what any of the zeroes in 'cpu0-0-0-thermal' stand
for.
Johan
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2] arm64: dts: qcom: x1e80100: Enable tsens and thermal zone nodes
2024-06-18 11:06 ` Konrad Dybcio
@ 2024-06-20 12:52 ` Abel Vesa
0 siblings, 0 replies; 6+ messages in thread
From: Abel Vesa @ 2024-06-20 12:52 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Bjorn Andersson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-msm, devicetree, linux-kernel, Rajendra Nayak
On 24-06-18 13:06:34, Konrad Dybcio wrote:
>
>
> On 6/14/24 12:50, Abel Vesa wrote:
> > From: Rajendra Nayak <quic_rjendra@quicinc.com>
> >
> > Add tsens and thermal zones nodes for x1e80100 SoC.
> >
> > Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
> > Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> > ---
>
> [...]
>
> > + tsens0: thermal-sensor@c271000 {
> > + compatible = "qcom,x1e80100-tsens", "qcom,tsens-v2";
> > + reg = <0 0x0c271000 0 0x1000>,
> > + <0 0x0c222000 0 0x1000>;
> > +
> > + interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>;
>
> These are normally wired up through PDC so that the system can shut down
> even if CPUSS is off
The upper-lower one is wired through PDC, but the critical doesn't seem
it is.
>
> [...]
>
> > + cpu0-0-top-thermal {
> > + thermal-sensors = <&tsens0 1>;
>
> Here you have passive trip points with no passive polling, this will
> only report threshold crossing events (so e.g. cpufreq throttling will
> be broken)
>
Sure, will add with 250 value for all cpu per-core sensors.
> > +
> > + trips {
> > + trip-point0 {
> > + temperature = <90000>;
> > + hysteresis = <2000>;
> > + type = "passive";
> > + };
> > +
> > + trip-point1 {
> > + temperature = <95000>;
> > + hysteresis = <2000>;
> > + type = "passive";
> > + };
> > +
> > + cpu-critical {
> > + temperature = <110000>;
> > + hysteresis = <1000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > +
>
> [...]
>
>
> > +
> > + nsp1-thermal {
> > + polling-delay-passive = <10>;
>
> Here you have passive polling, but no passive trip point
>
Will drop the passive polling delay..
> > +
> > + thermal-sensors = <&tsens3 2>;
> > +
> > + trips {
> > + trip-point0 {
> > + temperature = <90000>;
> > + hysteresis = <2000>;
> > + type = "hot";
> > + };
> > +
> > + nsp1-critical {
> > + temperature = <125000>;
> > + hysteresis = <0>;
> > + type = "critical";
> > + };
> > + };
> > + };
>
>
> The rest looks okayish
>
> Konrad
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2024-06-20 12:52 UTC | newest]
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2024-06-14 10:50 [PATCH v2] arm64: dts: qcom: x1e80100: Enable tsens and thermal zone nodes Abel Vesa
2024-06-17 9:24 ` Johan Hovold
2024-06-18 10:00 ` Abel Vesa
2024-06-18 11:40 ` Johan Hovold
2024-06-18 11:06 ` Konrad Dybcio
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