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charset=us-ascii Content-Disposition: inline In-Reply-To: On Thu, Jul 04, 2024 at 09:59:20AM -0700, Drew Fustini wrote: > On Wed, Jul 03, 2024 at 03:45:37PM +0100, Conor Dooley wrote: > > Kanak, Drew, > > > > On Mon, Jul 01, 2024 at 05:43:54PM +0530, Kanak Shilledar wrote: > > > created spi0 node with fixed clock. the spi0 node > > > uses synopsis designware driver and has the following > > > compatible "snps,dw-apb-ssi". the spi0 node is connected > > > to a SPI NOR flash pad which is left unpopulated on the back > > > side of the board. > > > > > > Signed-off-by: Kanak Shilledar > > > --- > > > Changes in v2: > > > - Separated from a single patch file > > > --- > > > .../boot/dts/thead/th1520-beaglev-ahead.dts | 9 +++++++++ > > > .../boot/dts/thead/th1520-lichee-module-4a.dtsi | 4 ++++ > > > .../riscv/boot/dts/thead/th1520-lichee-pi-4a.dts | 5 +++++ > > > > Didn't you say there was a flash on one of these two boards? > > > > > arch/riscv/boot/dts/thead/th1520.dtsi | 16 ++++++++++++++++ > > > 4 files changed, 34 insertions(+) > > > > > > diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts > > > index d9b4de9e4757..3103b74e0288 100644 > > > --- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts > > > +++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts > > > @@ -17,6 +17,7 @@ aliases { > > > gpio1 = &gpio1; > > > gpio2 = &gpio2; > > > gpio3 = &gpio3; > > > + spi0 = &spi0; > > > > "spi" would sort after "serial". > > > > > serial0 = &uart0; > > > serial1 = &uart1; > > > serial2 = &uart2; > > > @@ -52,6 +53,10 @@ &sdhci_clk { > > > clock-frequency = <198000000>; > > > }; > > > > > > +&spi_clk { > > > + clock-frequency = <396000000>; > > > +}; > > > > I'm pretty sceptical about adding more of these fixed clocks, rather > > than waiting for the clock driver. Drew, what do you think? Should we > > just add one more to your fixup list or would you rather delay? Guess it > > depends on how long more you think that clock driver is likely to take. > > I think the clk driver [1] is in good shape but it has not been reviewed > by the clk maintainer yet. Thus it is hard to predict any timeline for > it getting merged. > > SPI support doesn't require any driver changes so I'd be inclined to > allow the fixed clock in this case. It will be simple to change it over > to a real clock once the clk driver is upstream. > > Acked-by: Drew Fustini > > Thanks, > Drew Sorry, I meant to include the link to the most recent clk series: https://lore.kernel.org/linux-riscv/20240623-th1520-clk-v2-0-ad8d6432d9fb@tenstorrent.com/ -Drew