From: Sascha Hauer <s.hauer@pengutronix.de>
To: Pankaj Gupta <pankaj.gupta@nxp.com>
Cc: Jonathan Corbet <corbet@lwn.net>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Shawn Guo <shawnguo@kernel.org>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v6 4/5] firmware: imx: add driver for NXP EdgeLock Enclave
Date: Tue, 23 Jul 2024 16:28:26 +0200 [thread overview]
Message-ID: <Zp--Co8teXBO95QO@pengutronix.de> (raw)
In-Reply-To: <20240722-imx-se-if-v6-4-ee26a87b824a@nxp.com>
On Mon, Jul 22, 2024 at 10:21:39AM +0530, Pankaj Gupta wrote:
> NXP hardware IP(s) for secure-enclaves like Edgelock Enclave(ELE),
> are embedded in the SoC to support the features like HSM, SHE & V2X,
> using message based communication interface.
>
> The secure enclave FW communicates on a dedicated messaging unit(MU)
> based interface(s) with application core, where kernel is running.
> It exists on specific i.MX processors. e.g. i.MX8ULP, i.MX93.
>
> This patch adds the driver for communication interface to secure-enclave,
> for exchanging messages with NXP secure enclave HW IP(s) like EdgeLock
> Enclave (ELE) from Kernel-space, used by kernel management layers like
> - DM-Crypt.
>
> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> ---
> drivers/firmware/imx/Kconfig | 12 +
> drivers/firmware/imx/Makefile | 2 +
> drivers/firmware/imx/ele_base_msg.c | 274 +++++++++++++++++++
> drivers/firmware/imx/ele_base_msg.h | 95 +++++++
> drivers/firmware/imx/ele_common.c | 264 ++++++++++++++++++
> drivers/firmware/imx/ele_common.h | 44 +++
> drivers/firmware/imx/se_ctrl.c | 528 ++++++++++++++++++++++++++++++++++++
> drivers/firmware/imx/se_ctrl.h | 87 ++++++
> include/linux/firmware/imx/se_api.h | 14 +
> 9 files changed, 1320 insertions(+)
>
> diff --git a/drivers/firmware/imx/Kconfig b/drivers/firmware/imx/Kconfig
> index 183613f82a11..0f6877a24f0b 100644
> --- a/drivers/firmware/imx/Kconfig
> +++ b/drivers/firmware/imx/Kconfig
> @@ -22,3 +22,15 @@ config IMX_SCU
>
> This driver manages the IPC interface between host CPU and the
> SCU firmware running on M4.
> +
> +config IMX_SEC_ENCLAVE
> + tristate "i.MX Embedded Secure Enclave - EdgeLock Enclave Firmware driver."
> + depends on IMX_MBOX && ARCH_MXC && ARM64
> + default m if ARCH_MXC
> +
> + help
> + It is possible to use APIs exposed by the iMX Secure Enclave HW IP called:
> + - EdgeLock Enclave Firmware (for i.MX8ULP, i.MX93),
> + like base, HSM, V2X & SHE using the SAB protocol via the shared Messaging
> + Unit. This driver exposes these interfaces via a set of file descriptors
> + allowing to configure shared memory, send and receive messages.
> diff --git a/drivers/firmware/imx/Makefile b/drivers/firmware/imx/Makefile
> index 8f9f04a513a8..aa9033e0e9e3 100644
> --- a/drivers/firmware/imx/Makefile
> +++ b/drivers/firmware/imx/Makefile
> @@ -1,3 +1,5 @@
> # SPDX-License-Identifier: GPL-2.0
> obj-$(CONFIG_IMX_DSP) += imx-dsp.o
> obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o imx-scu-irq.o rm.o imx-scu-soc.o
> +sec_enclave-objs = se_ctrl.o ele_common.o ele_base_msg.o
> +obj-${CONFIG_IMX_SEC_ENCLAVE} += sec_enclave.o
> diff --git a/drivers/firmware/imx/ele_base_msg.c b/drivers/firmware/imx/ele_base_msg.c
> new file mode 100644
> index 000000000000..7f16184a8b10
> --- /dev/null
> +++ b/drivers/firmware/imx/ele_base_msg.c
> @@ -0,0 +1,274 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2024 NXP
> + */
> +
> +#include <linux/types.h>
> +
> +#include <linux/completion.h>
> +#include <linux/dma-mapping.h>
> +#include <linux/genalloc.h>
> +
> +#include "ele_base_msg.h"
> +#include "ele_common.h"
> +
> +int ele_get_info(struct device *dev, struct ele_dev_info *s_info)
I still think it's a bad idea to use some arbitrary struct device * as
context pointer here. Users will be confused which device is expected
here and bad things happen in case it's the wrong one.
You should rather implement some ele_get() function which returns some
pointer to be used as a context pointer here.
> +int ele_service_swap(struct device *dev,
> + phys_addr_t addr,
> + u32 addr_size, u16 flag)
> +{
> + struct se_if_priv *priv = dev_get_drvdata(dev);
> + struct se_api_msg *tx_msg __free(kfree) = NULL;
> + struct se_api_msg *rx_msg __free(kfree) = NULL;
> + int ret = 0;
> +
> + if (!priv) {
> + ret = -EINVAL;
> + goto exit;
> + }
> +
> + tx_msg = kzalloc(ELE_SERVICE_SWAP_REQ_MSG_SZ, GFP_KERNEL);
> + if (!tx_msg) {
> + ret = -ENOMEM;
> + goto exit;
> + }
> +
> + rx_msg = kzalloc(ELE_SERVICE_SWAP_RSP_MSG_SZ, GFP_KERNEL);
> + if (!rx_msg) {
> + ret = -ENOMEM;
> + goto exit;
> + }
> + priv->rx_msg_sz = ELE_SERVICE_SWAP_RSP_MSG_SZ;
> +
> + ret = se_fill_cmd_msg_hdr(priv,
> + (struct se_msg_hdr *)&tx_msg->header,
> + ELE_SERVICE_SWAP_REQ,
> + ELE_SERVICE_SWAP_REQ_MSG_SZ, true);
> + if (ret)
> + goto exit;
> +
> + tx_msg->data[0] = flag;
> + tx_msg->data[1] = addr_size;
> + tx_msg->data[2] = ELE_NONE_VAL;
> + tx_msg->data[3] = lower_32_bits(addr);
addr could be a 64bit address. Either handle this properly or return an
error when addr doesn't fit into 32bit.
> +int ele_fw_authenticate(struct device *dev, phys_addr_t addr)
> +{
> + struct se_if_priv *priv = dev_get_drvdata(dev);
> + struct se_api_msg *tx_msg __free(kfree) = NULL;
> + struct se_api_msg *rx_msg __free(kfree) = NULL;
> + int ret = 0;
> +
> + if (!priv) {
> + ret = -EINVAL;
> + goto exit;
> + }
> +
> + tx_msg = kzalloc(ELE_FW_AUTH_REQ_SZ, GFP_KERNEL);
> + if (!tx_msg) {
> + ret = -ENOMEM;
> + goto exit;
> + }
> +
> + rx_msg = kzalloc(ELE_FW_AUTH_RSP_MSG_SZ, GFP_KERNEL);
> + if (!rx_msg) {
> + ret = -ENOMEM;
> + goto exit;
> + }
> + priv->rx_msg_sz = ELE_FW_AUTH_RSP_MSG_SZ;
> +
> + ret = se_fill_cmd_msg_hdr(priv,
> + (struct se_msg_hdr *)&tx_msg->header,
> + ELE_FW_AUTH_REQ,
> + ELE_FW_AUTH_REQ_SZ,
> + true);
> + if (ret)
> + goto exit;
> +
> + tx_msg->data[1] = upper_32_bits(addr);
> + tx_msg->data[0] = lower_32_bits(addr);
> + tx_msg->data[2] = addr;
Same here.
Sascha
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next prev parent reply other threads:[~2024-07-23 14:28 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-22 4:51 [PATCH v6 0/5] v6: firmware: imx: driver for NXP secure-enclave Pankaj Gupta
2024-07-22 4:51 ` [PATCH v6 1/5] Documentation/firmware: add imx/se to other_interfaces Pankaj Gupta
2024-07-22 4:51 ` [PATCH v6 2/5] dt-bindings: arm: fsl: add imx-se-fw binding doc Pankaj Gupta
2024-07-22 16:50 ` Conor Dooley
2024-07-23 9:28 ` [EXT] " Pankaj Gupta
2024-07-23 14:08 ` Conor Dooley
2024-07-24 11:02 ` Pankaj Gupta
2024-07-24 15:30 ` Conor Dooley
2024-07-25 7:06 ` Pankaj Gupta
2024-07-25 14:39 ` Conor Dooley
2024-07-26 12:35 ` Pankaj Gupta
2024-08-01 8:52 ` Pankaj Gupta
2024-08-01 15:17 ` Conor Dooley
2024-07-22 4:51 ` [PATCH v6 3/5] arm64: dts: imx8ulp-evk: add nxp secure enclave firmware Pankaj Gupta
2024-07-22 4:51 ` [PATCH v6 4/5] firmware: imx: add driver for NXP EdgeLock Enclave Pankaj Gupta
2024-07-23 14:28 ` Sascha Hauer [this message]
2024-07-22 4:51 ` [PATCH v6 5/5] firmware: imx: adds miscdev Pankaj Gupta
2024-07-22 11:37 ` [EXTERNAL] " Amit Singh Tomar
2024-07-23 9:36 ` [EXT] " Pankaj Gupta
2024-07-23 14:20 ` Sascha Hauer
2024-08-08 10:49 ` [EXT] " Pankaj Gupta
2024-08-09 7:09 ` Sascha Hauer
[not found] ` <AM9PR04MB8604068373E25AAA99641F0895BA2@AM9PR04MB8604.eurprd04.prod.outlook.com>
2024-08-16 11:02 ` Pankaj Gupta
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