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charset=us-ascii Content-Disposition: inline In-Reply-To: <20240722095459.27437-2-johan+linaro@kernel.org> On 24-07-22 11:54:48, Johan Hovold wrote: > The PCIe4 PHY is powered by vreg_l3i (not vreg_l3j) on the CRD so assume > the same applies to the QCP. > > Fixes: f9a9c11471da ("arm64: dts: qcom: x1e80100-qcp: Enable more support") > Cc: stable@vger.kernel.org # 6.9 > Signed-off-by: Johan Hovold Reviewed-by: Abel Vesa > --- > arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts > index e7758f172d0d..212ed20b3369 100644 > --- a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts > +++ b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts > @@ -576,7 +576,7 @@ &pcie4 { > }; > > &pcie4_phy { > - vdda-phy-supply = <&vreg_l3j_0p8>; > + vdda-phy-supply = <&vreg_l3i_0p8>; > vdda-pll-supply = <&vreg_l3e_1p2>; > > status = "okay"; > -- > 2.44.2 >