* [PATCH v3 0/1] Add basic SPI support on TH1520 @ 2024-07-05 9:34 Kanak Shilledar 2024-07-05 9:34 ` [PATCH v3 1/1] riscv: dts: thead: add basic spi node Kanak Shilledar 2024-07-26 3:52 ` [PATCH v3 0/1] Add basic SPI support on TH1520 Drew Fustini 0 siblings, 2 replies; 9+ messages in thread From: Kanak Shilledar @ 2024-07-05 9:34 UTC (permalink / raw) Cc: Kanak Shilledar, Jisheng Zhang, Guo Ren, Fu Wei, Conor Dooley, Rob Herring, Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt, Albert Ou, linux-riscv, devicetree, linux-kernel Implemented basic SPI support for TH1520 SoC. There are two SPIs reserved on the LicheePi4A, one on the SPI Flash pads that are blanked out on the back, and one on the pins. I implemented the one connected to the pad. It is using a fixed clock of 396MHz. The address and clock frequency was referenced from the TH1520 System Reference Manual [1]. I have tested this on the LicheePi4A. [2] Driver Patch discussion [3] Devicetree binding discussion Changes made in v3: - Dropped the driver patch as the generic fallback compatible was working properly. [2] - Removed the devicetree binding patch as it got accepted and is already in the linux-next branch. [3] - Arranged the devicetree aliases alphabetically in the DTS files. Changes made in v2: - Changed from single patch file to a patchset by splitting the single commit into dt-bindings, driver and the devicetree. [1] https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf [2] https://lore.kernel.org/all/20240701121355.262259-4-kanakshilledar@gmail.com/ [3] https://lore.kernel.org/all/20240701121355.262259-3-kanakshilledar@gmail.com/ Kanak Shilledar (1): riscv: dts: thead: add basic spi node .../boot/dts/thead/th1520-beaglev-ahead.dts | 9 +++++++++ .../boot/dts/thead/th1520-lichee-module-4a.dtsi | 4 ++++ .../riscv/boot/dts/thead/th1520-lichee-pi-4a.dts | 5 +++++ arch/riscv/boot/dts/thead/th1520.dtsi | 16 ++++++++++++++++ 4 files changed, 34 insertions(+) base-commit: 22a40d14b572deb80c0648557f4bd502d7e83826 -- 2.45.2 ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v3 1/1] riscv: dts: thead: add basic spi node 2024-07-05 9:34 [PATCH v3 0/1] Add basic SPI support on TH1520 Kanak Shilledar @ 2024-07-05 9:34 ` Kanak Shilledar 2024-07-12 8:41 ` Kanak Shilledar 2024-07-26 3:52 ` [PATCH v3 0/1] Add basic SPI support on TH1520 Drew Fustini 1 sibling, 1 reply; 9+ messages in thread From: Kanak Shilledar @ 2024-07-05 9:34 UTC (permalink / raw) Cc: Kanak Shilledar, Jisheng Zhang, Guo Ren, Fu Wei, Conor Dooley, Rob Herring, Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt, Albert Ou, linux-riscv, devicetree, linux-kernel, Drew Fustini created spi0 node with fixed clock. the spi0 node uses synopsis designware driver and has the following compatible "snps,dw-apb-ssi". the spi0 node is connected to a SPI NOR flash pad which is left unpopulated on the back side of the board. Acked-by: Drew Fustini <drew@pdp7.com> Signed-off-by: Kanak Shilledar <kanakshilledar@gmail.com> --- Changes in v3: - Changed the position of "spi" to come after "serial" in aliases for both the boards. - Added Acked-by tag. Changes in v2: - Separated from a single patch file. --- .../boot/dts/thead/th1520-beaglev-ahead.dts | 9 +++++++++ .../boot/dts/thead/th1520-lichee-module-4a.dtsi | 4 ++++ .../riscv/boot/dts/thead/th1520-lichee-pi-4a.dts | 5 +++++ arch/riscv/boot/dts/thead/th1520.dtsi | 16 ++++++++++++++++ 4 files changed, 34 insertions(+) diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts index d9b4de9e4757..b4d2e1d69bdb 100644 --- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts +++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts @@ -23,6 +23,7 @@ aliases { serial3 = &uart3; serial4 = &uart4; serial5 = &uart5; + spi0 = &spi0; }; chosen { @@ -52,6 +53,10 @@ &sdhci_clk { clock-frequency = <198000000>; }; +&spi_clk { + clock-frequency = <396000000>; +}; + &uart_sclk { clock-frequency = <100000000>; }; @@ -79,3 +84,7 @@ &sdio0 { &uart0 { status = "okay"; }; + +&spi0 { + status = "okay"; +}; diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi index 1365d3a512a3..6939bd36560c 100644 --- a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi +++ b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi @@ -33,6 +33,10 @@ &sdhci_clk { clock-frequency = <198000000>; }; +&spi_clk { + clock-frequency = <396000000>; +}; + &uart_sclk { clock-frequency = <100000000>; }; diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts index 9a3884a73e13..7738d2895c5a 100644 --- a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts +++ b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts @@ -20,6 +20,7 @@ aliases { serial3 = &uart3; serial4 = &uart4; serial5 = &uart5; + spi0 = &spi0; }; chosen { @@ -30,3 +31,7 @@ chosen { &uart0 { status = "okay"; }; + +&spi0 { + status = "okay"; +}; diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi index d2fa25839012..f962de663e7e 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -140,6 +140,12 @@ apb_clk: apb-clk-clock { #clock-cells = <0>; }; + spi_clk: spi-clock { + compatible = "fixed-clock"; + clock-output-names = "spi_clk"; + #clock-cells = <0>; + }; + uart_sclk: uart-sclk-clock { compatible = "fixed-clock"; clock-output-names = "uart_sclk"; @@ -183,6 +189,16 @@ clint: timer@ffdc000000 { <&cpu3_intc 3>, <&cpu3_intc 7>; }; + spi0: spi@ffe700c000 { + compatible = "thead,th1520-spi", "snps,dw-apb-ssi"; + reg = <0xff 0xe700c000 0x0 0x1000>; + interrupts = <54 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&spi_clk>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + uart0: serial@ffe7014000 { compatible = "snps,dw-apb-uart"; reg = <0xff 0xe7014000 0x0 0x100>; -- 2.45.2 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v3 1/1] riscv: dts: thead: add basic spi node 2024-07-05 9:34 ` [PATCH v3 1/1] riscv: dts: thead: add basic spi node Kanak Shilledar @ 2024-07-12 8:41 ` Kanak Shilledar 2024-07-12 13:48 ` Conor Dooley 0 siblings, 1 reply; 9+ messages in thread From: Kanak Shilledar @ 2024-07-12 8:41 UTC (permalink / raw) Cc: Jisheng Zhang, Guo Ren, Fu Wei, Conor Dooley, Rob Herring, Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt, Albert Ou, linux-riscv, devicetree, linux-kernel, Drew Fustini Hi, Any updates on this patch? Thanks and Regards, Kanak Shilledar On Fri, Jul 5, 2024 at 3:05 PM Kanak Shilledar <kanakshilledar@gmail.com> wrote: > > created spi0 node with fixed clock. the spi0 node > uses synopsis designware driver and has the following > compatible "snps,dw-apb-ssi". the spi0 node is connected > to a SPI NOR flash pad which is left unpopulated on the back > side of the board. > > Acked-by: Drew Fustini <drew@pdp7.com> > Signed-off-by: Kanak Shilledar <kanakshilledar@gmail.com> > --- > Changes in v3: > - Changed the position of "spi" to come after "serial" in > aliases for both the boards. > - Added Acked-by tag. > Changes in v2: > - Separated from a single patch file. > --- > .../boot/dts/thead/th1520-beaglev-ahead.dts | 9 +++++++++ > .../boot/dts/thead/th1520-lichee-module-4a.dtsi | 4 ++++ > .../riscv/boot/dts/thead/th1520-lichee-pi-4a.dts | 5 +++++ > arch/riscv/boot/dts/thead/th1520.dtsi | 16 ++++++++++++++++ > 4 files changed, 34 insertions(+) > > diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts > index d9b4de9e4757..b4d2e1d69bdb 100644 > --- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts > +++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts > @@ -23,6 +23,7 @@ aliases { > serial3 = &uart3; > serial4 = &uart4; > serial5 = &uart5; > + spi0 = &spi0; > }; > > chosen { > @@ -52,6 +53,10 @@ &sdhci_clk { > clock-frequency = <198000000>; > }; > > +&spi_clk { > + clock-frequency = <396000000>; > +}; > + > &uart_sclk { > clock-frequency = <100000000>; > }; > @@ -79,3 +84,7 @@ &sdio0 { > &uart0 { > status = "okay"; > }; > + > +&spi0 { > + status = "okay"; > +}; > diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi > index 1365d3a512a3..6939bd36560c 100644 > --- a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi > +++ b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi > @@ -33,6 +33,10 @@ &sdhci_clk { > clock-frequency = <198000000>; > }; > > +&spi_clk { > + clock-frequency = <396000000>; > +}; > + > &uart_sclk { > clock-frequency = <100000000>; > }; > diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts > index 9a3884a73e13..7738d2895c5a 100644 > --- a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts > +++ b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts > @@ -20,6 +20,7 @@ aliases { > serial3 = &uart3; > serial4 = &uart4; > serial5 = &uart5; > + spi0 = &spi0; > }; > > chosen { > @@ -30,3 +31,7 @@ chosen { > &uart0 { > status = "okay"; > }; > + > +&spi0 { > + status = "okay"; > +}; > diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi > index d2fa25839012..f962de663e7e 100644 > --- a/arch/riscv/boot/dts/thead/th1520.dtsi > +++ b/arch/riscv/boot/dts/thead/th1520.dtsi > @@ -140,6 +140,12 @@ apb_clk: apb-clk-clock { > #clock-cells = <0>; > }; > > + spi_clk: spi-clock { > + compatible = "fixed-clock"; > + clock-output-names = "spi_clk"; > + #clock-cells = <0>; > + }; > + > uart_sclk: uart-sclk-clock { > compatible = "fixed-clock"; > clock-output-names = "uart_sclk"; > @@ -183,6 +189,16 @@ clint: timer@ffdc000000 { > <&cpu3_intc 3>, <&cpu3_intc 7>; > }; > > + spi0: spi@ffe700c000 { > + compatible = "thead,th1520-spi", "snps,dw-apb-ssi"; > + reg = <0xff 0xe700c000 0x0 0x1000>; > + interrupts = <54 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&spi_clk>; > + #address-cells = <1>; > + #size-cells = <0>; > + status = "disabled"; > + }; > + > uart0: serial@ffe7014000 { > compatible = "snps,dw-apb-uart"; > reg = <0xff 0xe7014000 0x0 0x100>; > -- > 2.45.2 > ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v3 1/1] riscv: dts: thead: add basic spi node 2024-07-12 8:41 ` Kanak Shilledar @ 2024-07-12 13:48 ` Conor Dooley 2024-07-12 16:05 ` Drew Fustini 0 siblings, 1 reply; 9+ messages in thread From: Conor Dooley @ 2024-07-12 13:48 UTC (permalink / raw) To: Kanak Shilledar Cc: Jisheng Zhang, Guo Ren, Fu Wei, Rob Herring, Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt, Albert Ou, linux-riscv, devicetree, linux-kernel, Drew Fustini [-- Attachment #1: Type: text/plain, Size: 235 bytes --] On Fri, Jul 12, 2024 at 02:11:18PM +0530, Kanak Shilledar wrote: > Hi, > Any updates on this patch? It's too late for 6.11, it'll have to wait until 6.12. If Drew has his tree set up already, he can at least queue it. Cheers, Conor. [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v3 1/1] riscv: dts: thead: add basic spi node 2024-07-12 13:48 ` Conor Dooley @ 2024-07-12 16:05 ` Drew Fustini 2024-07-14 7:11 ` Kanak Shilledar 0 siblings, 1 reply; 9+ messages in thread From: Drew Fustini @ 2024-07-12 16:05 UTC (permalink / raw) To: Conor Dooley Cc: Kanak Shilledar, Jisheng Zhang, Guo Ren, Fu Wei, Rob Herring, Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt, Albert Ou, linux-riscv, devicetree, linux-kernel On Fri, Jul 12, 2024 at 02:48:46PM +0100, Conor Dooley wrote: > On Fri, Jul 12, 2024 at 02:11:18PM +0530, Kanak Shilledar wrote: > > Hi, > > Any updates on this patch? > > It's too late for 6.11, it'll have to wait until 6.12. If Drew has his > tree set up already, he can at least queue it. > > Cheers, > Conor. Yes, I'm in the process of setting up the appropriate branches in my tree [1] and then I can send an applied to for-next email. The plan is that I will send PR to Arnd starting with the 6.12 merge window. Thanks, Drew [1] https://github.com/pdp7/linux ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v3 1/1] riscv: dts: thead: add basic spi node 2024-07-12 16:05 ` Drew Fustini @ 2024-07-14 7:11 ` Kanak Shilledar 0 siblings, 0 replies; 9+ messages in thread From: Kanak Shilledar @ 2024-07-14 7:11 UTC (permalink / raw) To: Drew Fustini Cc: Conor Dooley, Jisheng Zhang, Guo Ren, Fu Wei, Rob Herring, Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt, Albert Ou, linux-riscv, devicetree, linux-kernel Hi, Thanks for the updates on this patch. Cheers, Kanak Shilledar On Fri, Jul 12, 2024 at 9:35 PM Drew Fustini <drew@pdp7.com> wrote: > > On Fri, Jul 12, 2024 at 02:48:46PM +0100, Conor Dooley wrote: > > On Fri, Jul 12, 2024 at 02:11:18PM +0530, Kanak Shilledar wrote: > > > Hi, > > > Any updates on this patch? > > > > It's too late for 6.11, it'll have to wait until 6.12. If Drew has his > > tree set up already, he can at least queue it. > > > > Cheers, > > Conor. > > Yes, I'm in the process of setting up the appropriate branches in my > tree [1] and then I can send an applied to for-next email. The plan is > that I will send PR to Arnd starting with the 6.12 merge window. > > Thanks, > Drew > > [1] https://github.com/pdp7/linux ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v3 0/1] Add basic SPI support on TH1520 2024-07-05 9:34 [PATCH v3 0/1] Add basic SPI support on TH1520 Kanak Shilledar 2024-07-05 9:34 ` [PATCH v3 1/1] riscv: dts: thead: add basic spi node Kanak Shilledar @ 2024-07-26 3:52 ` Drew Fustini 2024-07-26 8:19 ` Emil Renner Berthing 1 sibling, 1 reply; 9+ messages in thread From: Drew Fustini @ 2024-07-26 3:52 UTC (permalink / raw) To: Kanak Shilledar Cc: Jisheng Zhang, Guo Ren, Fu Wei, Conor Dooley, Rob Herring, Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt, Albert Ou, linux-riscv, devicetree, linux-kernel On Fri, Jul 05, 2024 at 03:04:58PM +0530, Kanak Shilledar wrote: > Implemented basic SPI support for TH1520 SoC. There are two SPIs reserved > on the LicheePi4A, one on the SPI Flash pads that are blanked out on the > back, and one on the pins. I implemented the one connected to the pad. > > It is using a fixed clock of 396MHz. The address and clock frequency was > referenced from the TH1520 System Reference Manual [1]. > > [...] Applied to thead-dt-for-next, thanks! [1/1] riscv: dts: thead: add basic spi node commit: 0f351f8c4f4ee87b729cc366917e67e3eee2d3db Best regards, -- Drew Fustini <drew@pdp7.com> Link: https://github.com/pdp7/linux/commit/0f351f8c4f4ee87b729cc366917e67e3eee2d3db ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v3 0/1] Add basic SPI support on TH1520 2024-07-26 3:52 ` [PATCH v3 0/1] Add basic SPI support on TH1520 Drew Fustini @ 2024-07-26 8:19 ` Emil Renner Berthing 2024-07-26 16:05 ` Drew Fustini 0 siblings, 1 reply; 9+ messages in thread From: Emil Renner Berthing @ 2024-07-26 8:19 UTC (permalink / raw) To: Drew Fustini, Kanak Shilledar Cc: Jisheng Zhang, Guo Ren, Fu Wei, Conor Dooley, Rob Herring, Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt, Albert Ou, linux-riscv, devicetree, linux-kernel Drew Fustini wrote: > On Fri, Jul 05, 2024 at 03:04:58PM +0530, Kanak Shilledar wrote: > > Implemented basic SPI support for TH1520 SoC. There are two SPIs reserved > > on the LicheePi4A, one on the SPI Flash pads that are blanked out on the > > back, and one on the pins. I implemented the one connected to the pad. > > > > It is using a fixed clock of 396MHz. The address and clock frequency was > > referenced from the TH1520 System Reference Manual [1]. > > > > [...] > > Applied to thead-dt-for-next, thanks! Hi Drew, Are you sure you want to merge this patch? It adds another dummy clock for the SPI, but the next kernel should have your clock driver that actually models the SPI clock. Also the clock driver says the SPI clock has a frequency of 792MHz, eg. double of what this dummy clock is set to. /Emil ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v3 0/1] Add basic SPI support on TH1520 2024-07-26 8:19 ` Emil Renner Berthing @ 2024-07-26 16:05 ` Drew Fustini 0 siblings, 0 replies; 9+ messages in thread From: Drew Fustini @ 2024-07-26 16:05 UTC (permalink / raw) To: Emil Renner Berthing Cc: Kanak Shilledar, Jisheng Zhang, Guo Ren, Fu Wei, Conor Dooley, Rob Herring, Krzysztof Kozlowski, Paul Walmsley, Palmer Dabbelt, Albert Ou, linux-riscv, devicetree, linux-kernel On Fri, Jul 26, 2024 at 04:19:51AM -0400, Emil Renner Berthing wrote: > Drew Fustini wrote: > > On Fri, Jul 05, 2024 at 03:04:58PM +0530, Kanak Shilledar wrote: > > > Implemented basic SPI support for TH1520 SoC. There are two SPIs reserved > > > on the LicheePi4A, one on the SPI Flash pads that are blanked out on the > > > back, and one on the pins. I implemented the one connected to the pad. > > > > > > It is using a fixed clock of 396MHz. The address and clock frequency was > > > referenced from the TH1520 System Reference Manual [1]. > > > > > > [...] > > > > Applied to thead-dt-for-next, thanks! > > Hi Drew, > > Are you sure you want to merge this patch? It adds another dummy clock for the > SPI, but the next kernel should have your clock driver that actually models the > SPI clock. > Also the clock driver says the SPI clock has a frequency of 792MHz, eg. double > of what this dummy clock is set to. > > /Emil I am planning send updated dts patches for thead,th1520-clk-ap support that addresses your recent comment [1]. I'll include a patch to convert the SPI clock similar to the other dts patches in that series. Assuming there are no issues with that new series, I will apply them to thead-dt-for-next with enough testing time for them to be included in the 6.12 pull request to Arnd. Thanks, Drew [1] https://lore.kernel.org/linux-riscv/CAJM55Z8uo-Z_9ruyqygK1pbBCTkCxMBVoF8GD2dajhTKOYrAfA@mail.gmail.com/ ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2024-07-26 16:05 UTC | newest] Thread overview: 9+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-07-05 9:34 [PATCH v3 0/1] Add basic SPI support on TH1520 Kanak Shilledar 2024-07-05 9:34 ` [PATCH v3 1/1] riscv: dts: thead: add basic spi node Kanak Shilledar 2024-07-12 8:41 ` Kanak Shilledar 2024-07-12 13:48 ` Conor Dooley 2024-07-12 16:05 ` Drew Fustini 2024-07-14 7:11 ` Kanak Shilledar 2024-07-26 3:52 ` [PATCH v3 0/1] Add basic SPI support on TH1520 Drew Fustini 2024-07-26 8:19 ` Emil Renner Berthing 2024-07-26 16:05 ` Drew Fustini
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