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From: Frank Li <Frank.li@nxp.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Bjorn Andersson" <andersson@kernel.org>,
	"Konrad Dybcio" <konradybcio@kernel.org>,
	linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v4 05/12] PCI: endpoint: Assign PCI domain number for endpoint controllers
Date: Wed, 28 Aug 2024 14:30:13 -0400	[thread overview]
Message-ID: <Zs9stQDfpUcpIxt9@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <20240828-pci-qcom-hotplug-v4-5-263a385fbbcb@linaro.org>

On Wed, Aug 28, 2024 at 09:16:15PM +0530, Manivannan Sadhasivam wrote:
> Right now, PCI endpoint subsystem doesn't assign PCI domain number for the
> PCI endpoint controllers. But this domain number could be useful to the EPC
> drivers to uniquely identify each controller based on the hardware instance
> when there are multiple ones present in an SoC (even multiple RC/EP).
>
> So let's make use of the existing pci_bus_find_domain_nr() API to allocate
> domain numbers based on either Devicetree (linux,pci-domain) property or
> dynamic domain number allocation scheme.
>
> It should be noted that the domain number allocated by this API will be
> based on both RC and EP controllers in a SoC. If the 'linux,pci-domain' DT
> property is present, then the domain number represents the actual hardware
> instance of the PCI endpoint controller. If not, then the domain number
> will be allocated based on the PCI EP/RC controller probe order.
>
> If the architecture doesn't support CONFIG_PCI_DOMAINS_GENERIC (rare), then
> currently a warning is thrown to indicate that the architecture specific
> implementation is needed.
>

Reviewed-by: Frank Li <Frank.Li@nxp.com>

> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
>  drivers/pci/endpoint/pci-epc-core.c | 14 ++++++++++++++
>  include/linux/pci-epc.h             |  2 ++
>  2 files changed, 16 insertions(+)
>
> diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c
> index 84309dfe0c68..085a2de8b923 100644
> --- a/drivers/pci/endpoint/pci-epc-core.c
> +++ b/drivers/pci/endpoint/pci-epc-core.c
> @@ -838,6 +838,10 @@ void pci_epc_destroy(struct pci_epc *epc)
>  {
>  	pci_ep_cfs_remove_epc_group(epc->group);
>  	device_unregister(&epc->dev);
> +
> +#ifdef CONFIG_PCI_DOMAINS_GENERIC
> +	pci_bus_release_domain_nr(NULL, &epc->dev);
> +#endif
>  }
>  EXPORT_SYMBOL_GPL(pci_epc_destroy);
>
> @@ -900,6 +904,16 @@ __pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
>  	epc->dev.release = pci_epc_release;
>  	epc->ops = ops;
>
> +#ifdef CONFIG_PCI_DOMAINS_GENERIC
> +	epc->domain_nr = pci_bus_find_domain_nr(NULL, dev);
> +#else
> +	/*
> +	 * TODO: If the architecture doesn't support generic PCI
> +	 * domains, then a custom implementation has to be used.
> +	 */
> +	WARN_ONCE(1, "This architecture doesn't support generic PCI domains\n");
> +#endif
> +
>  	ret = dev_set_name(&epc->dev, "%s", dev_name(dev));
>  	if (ret)
>  		goto put_dev;
> diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h
> index 85bdf2adb760..8e3dcac55dcd 100644
> --- a/include/linux/pci-epc.h
> +++ b/include/linux/pci-epc.h
> @@ -128,6 +128,7 @@ struct pci_epc_mem {
>   * @group: configfs group representing the PCI EPC device
>   * @lock: mutex to protect pci_epc ops
>   * @function_num_map: bitmap to manage physical function number
> + * @domain_nr: PCI domain number of the endpoint controller
>   * @init_complete: flag to indicate whether the EPC initialization is complete
>   *                 or not
>   */
> @@ -145,6 +146,7 @@ struct pci_epc {
>  	/* mutex to protect against concurrent access of EP controller */
>  	struct mutex			lock;
>  	unsigned long			function_num_map;
> +	int				domain_nr;
>  	bool				init_complete;
>  };
>
>
> --
> 2.25.1
>

  reply	other threads:[~2024-08-28 18:30 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-28 15:46 [PATCH v4 00/12] PCI: qcom: Enumerate endpoints based on Link up event in 'global_irq' interrupt Manivannan Sadhasivam via B4 Relay
2024-08-28 15:46 ` [PATCH v4 01/12] PCI: qcom-ep: Drop the redundant masking of global IRQ events Manivannan Sadhasivam via B4 Relay
2024-08-28 15:46 ` [PATCH v4 02/12] PCI: qcom-ep: Reword the error message for receiving unknown global IRQ event Manivannan Sadhasivam via B4 Relay
2024-08-28 15:46 ` [PATCH v4 03/12] dt-bindings: PCI: pci-ep: Update Maintainers Manivannan Sadhasivam via B4 Relay
2024-08-28 18:31   ` Frank Li
2024-08-28 15:46 ` [PATCH v4 04/12] dt-bindings: PCI: pci-ep: Document 'linux,pci-domain' property Manivannan Sadhasivam via B4 Relay
2024-08-28 15:46 ` [PATCH v4 05/12] PCI: endpoint: Assign PCI domain number for endpoint controllers Manivannan Sadhasivam via B4 Relay
2024-08-28 18:30   ` Frank Li [this message]
2024-08-28 15:46 ` [PATCH v4 06/12] PCI: qcom-ep: Modify 'global_irq' and 'perst_irq' IRQ device names Manivannan Sadhasivam via B4 Relay
2024-08-28 15:46 ` [PATCH v4 07/12] ARM: dts: qcom: sdx55: Add 'linux,pci-domain' to PCIe EP controller node Manivannan Sadhasivam via B4 Relay
2024-08-28 15:46 ` [PATCH v4 08/12] ARM: dts: qcom: sdx65: " Manivannan Sadhasivam via B4 Relay
2024-08-28 15:46 ` [PATCH v4 09/12] arm64: dts: qcom: sa8775p: Add 'linux,pci-domain' to PCIe EP controller nodes Manivannan Sadhasivam via B4 Relay
2024-08-28 15:46 ` [PATCH v4 10/12] dt-bindings: PCI: qcom,pcie-sm8450: Add 'global' interrupt Manivannan Sadhasivam via B4 Relay
2024-08-28 15:46 ` [PATCH v4 11/12] PCI: qcom: Enumerate endpoints based on Link up event in 'global_irq' interrupt Manivannan Sadhasivam via B4 Relay
2024-08-28 15:46 ` [PATCH v4 12/12] arm64: dts: qcom: sm8450: Add 'global' interrupt to the PCIe RC node Manivannan Sadhasivam via B4 Relay
2024-09-01 17:47 ` [PATCH v4 00/12] PCI: qcom: Enumerate endpoints based on Link up event in 'global_irq' interrupt Krzysztof Wilczyński
2024-10-23  4:15 ` (subset) " Bjorn Andersson

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