* [PATCH 2/2] ARM: dts: imx6ull-seeed-npi: fix fsl,pins property in tscgrp pinctrl
2024-08-31 10:11 [PATCH 1/2] ARM: dts: imx6ul-geam: fix fsl,pins property in tscgrp pinctrl Krzysztof Kozlowski
@ 2024-08-31 10:11 ` Krzysztof Kozlowski
2024-09-01 10:49 ` Parthiban
2024-08-31 10:15 ` [PATCH 1/2] ARM: dts: imx6ul-geam: " Michael Nazzareno Trimarchi
2024-09-02 0:55 ` Shawn Guo
2 siblings, 1 reply; 5+ messages in thread
From: Krzysztof Kozlowski @ 2024-08-31 10:11 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Michael Trimarchi, Matteo Lisi, Jagan Teki, Parthiban Nallathambi,
devicetree, imx, linux-arm-kernel, linux-kernel
Cc: Krzysztof Kozlowski, stable
The property is "fsl,pins", not "fsl,pin". Wrong property means the pin
configuration was not applied. Fixes dtbs_check warnings:
imx6ull-seeed-npi-dev-board-emmc.dtb: pinctrl@20e0000: uart1grp: 'fsl,pins' is a required property
imx6ull-seeed-npi-dev-board-emmc.dtb: pinctrl@20e0000: uart1grp: 'fsl,pin' does not match any of the regexes: 'pinctrl-[0-9]+'
Cc: <stable@vger.kernel.org>
Fixes: e3b5697195c8 ("ARM: dts: imx6ull: add seeed studio NPi dev board")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../dts/nxp/imx/imx6ull-seeed-npi-dev-board.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board.dtsi
index 6bb12e0bbc7e..50654dbf62e0 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board.dtsi
@@ -339,14 +339,14 @@ MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x120b0
};
pinctrl_uart1: uart1grp {
- fsl,pin = <
+ fsl,pins = <
MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
>;
};
pinctrl_uart2: uart2grp {
- fsl,pin = <
+ fsl,pins = <
MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS 0x1b0b1
@@ -355,7 +355,7 @@ MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS 0x1b0b1
};
pinctrl_uart3: uart3grp {
- fsl,pin = <
+ fsl,pins = <
MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1
MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b1
@@ -364,21 +364,21 @@ MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1
};
pinctrl_uart4: uart4grp {
- fsl,pin = <
+ fsl,pins = <
MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1
MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1
>;
};
pinctrl_uart5: uart5grp {
- fsl,pin = <
+ fsl,pins = <
MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX 0x1b0b1
MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x1b0b1
>;
};
pinctrl_usb_otg1_id: usbotg1idgrp {
- fsl,pin = <
+ fsl,pins = <
MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059
>;
};
--
2.43.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH 2/2] ARM: dts: imx6ull-seeed-npi: fix fsl,pins property in tscgrp pinctrl
2024-08-31 10:11 ` [PATCH 2/2] ARM: dts: imx6ull-seeed-npi: " Krzysztof Kozlowski
@ 2024-09-01 10:49 ` Parthiban
0 siblings, 0 replies; 5+ messages in thread
From: Parthiban @ 2024-09-01 10:49 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Michael Trimarchi, Matteo Lisi, Jagan Teki,
devicetree, imx, linux-arm-kernel, linux-kernel
Cc: parthiban, stable
Thanks.
On 8/31/24 3:41 PM, Krzysztof Kozlowski wrote:
> The property is "fsl,pins", not "fsl,pin". Wrong property means the pin
> configuration was not applied. Fixes dtbs_check warnings:
>
> imx6ull-seeed-npi-dev-board-emmc.dtb: pinctrl@20e0000: uart1grp: 'fsl,pins' is a required property
> imx6ull-seeed-npi-dev-board-emmc.dtb: pinctrl@20e0000: uart1grp: 'fsl,pin' does not match any of the regexes: 'pinctrl-[0-9]+'
>
> Cc: <stable@vger.kernel.org>
> Fixes: e3b5697195c8 ("ARM: dts: imx6ull: add seeed studio NPi dev board")
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Parthiban Nallathambi <parthiban@linumiz.com>
Thanks,
Parthiban
> ---
> .../dts/nxp/imx/imx6ull-seeed-npi-dev-board.dtsi | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board.dtsi
> index 6bb12e0bbc7e..50654dbf62e0 100644
> --- a/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board.dtsi
> +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-seeed-npi-dev-board.dtsi
> @@ -339,14 +339,14 @@ MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x120b0
> };
>
> pinctrl_uart1: uart1grp {
> - fsl,pin = <
> + fsl,pins = <
> MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
> MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
> >;
> };
>
> pinctrl_uart2: uart2grp {
> - fsl,pin = <
> + fsl,pins = <
> MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
> MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
> MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS 0x1b0b1
> @@ -355,7 +355,7 @@ MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS 0x1b0b1
> };
>
> pinctrl_uart3: uart3grp {
> - fsl,pin = <
> + fsl,pins = <
> MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
> MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1
> MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b1
> @@ -364,21 +364,21 @@ MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1
> };
>
> pinctrl_uart4: uart4grp {
> - fsl,pin = <
> + fsl,pins = <
> MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1
> MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1
> >;
> };
>
> pinctrl_uart5: uart5grp {
> - fsl,pin = <
> + fsl,pins = <
> MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX 0x1b0b1
> MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x1b0b1
> >;
> };
>
> pinctrl_usb_otg1_id: usbotg1idgrp {
> - fsl,pin = <
> + fsl,pins = <
> MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059
> >;
> };
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] ARM: dts: imx6ul-geam: fix fsl,pins property in tscgrp pinctrl
2024-08-31 10:11 [PATCH 1/2] ARM: dts: imx6ul-geam: fix fsl,pins property in tscgrp pinctrl Krzysztof Kozlowski
2024-08-31 10:11 ` [PATCH 2/2] ARM: dts: imx6ull-seeed-npi: " Krzysztof Kozlowski
@ 2024-08-31 10:15 ` Michael Nazzareno Trimarchi
2024-09-02 0:55 ` Shawn Guo
2 siblings, 0 replies; 5+ messages in thread
From: Michael Nazzareno Trimarchi @ 2024-08-31 10:15 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Matteo Lisi,
Jagan Teki, Parthiban Nallathambi, devicetree, imx,
linux-arm-kernel, linux-kernel, stable
HI
On Sat, Aug 31, 2024 at 12:11 PM Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> The property is "fsl,pins", not "fsl,pin". Wrong property means the pin
> configuration was not applied. Fixes dtbs_check warnings:
>
> imx6ul-geam.dtb: pinctrl@20e0000: tscgrp: 'fsl,pins' is a required property
> imx6ul-geam.dtb: pinctrl@20e0000: tscgrp: 'fsl,pin' does not match any of the regexes: 'pinctrl-[0-9]+'
>
> Cc: <stable@vger.kernel.org>
> Fixes: a58e4e608bc8 ("ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support")
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
> arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts
> index cdbb8c435cd6..601d89b904cd 100644
> --- a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts
> +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts
> @@ -365,7 +365,7 @@ MX6UL_PAD_ENET1_RX_ER__PWM8_OUT 0x110b0
> };
>
> pinctrl_tsc: tscgrp {
> - fsl,pin = <
> + fsl,pins = <
> MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
> MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
> MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
> --
> 2.43.0
>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Thank you
Michael
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH 1/2] ARM: dts: imx6ul-geam: fix fsl,pins property in tscgrp pinctrl
2024-08-31 10:11 [PATCH 1/2] ARM: dts: imx6ul-geam: fix fsl,pins property in tscgrp pinctrl Krzysztof Kozlowski
2024-08-31 10:11 ` [PATCH 2/2] ARM: dts: imx6ull-seeed-npi: " Krzysztof Kozlowski
2024-08-31 10:15 ` [PATCH 1/2] ARM: dts: imx6ul-geam: " Michael Nazzareno Trimarchi
@ 2024-09-02 0:55 ` Shawn Guo
2 siblings, 0 replies; 5+ messages in thread
From: Shawn Guo @ 2024-09-02 0:55 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Michael Trimarchi, Matteo Lisi, Jagan Teki, Parthiban Nallathambi,
devicetree, imx, linux-arm-kernel, linux-kernel, stable
On Sat, Aug 31, 2024 at 12:11:28PM +0200, Krzysztof Kozlowski wrote:
> The property is "fsl,pins", not "fsl,pin". Wrong property means the pin
> configuration was not applied. Fixes dtbs_check warnings:
>
> imx6ul-geam.dtb: pinctrl@20e0000: tscgrp: 'fsl,pins' is a required property
> imx6ul-geam.dtb: pinctrl@20e0000: tscgrp: 'fsl,pin' does not match any of the regexes: 'pinctrl-[0-9]+'
>
> Cc: <stable@vger.kernel.org>
> Fixes: a58e4e608bc8 ("ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support")
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Applied both, thanks!
^ permalink raw reply [flat|nested] 5+ messages in thread