[PATCH 0/3] dmaengine: sh: rz-dmac: add r7s72100 support

[PATCH 0/3] dmaengine: sh: rz-dmac: add r7s72100 support

[Wolfram Sang]

When activating good old Genmai board for regression testing, I found
out that not much is needed to activate the DMA controller for A1L.
Which makes sense, because the driver was initially written for this
SoC. Let it come home ;)

Patch 1 is a generic fix. The other patches are the actual enablement.
A branch with DTS additions for MMCIF can be found here:

git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git renesas/genmai-upstreaming

These will be upstreamed once the driver parts are in next. Adding SDHI
is still WIP because RZ/A1L usage exposes a SDHI driver bug. So much for
the value of regression testing...

Wolfram Sang (3):
  dmaengine: sh: rz-dmac: handle configs where one address is zero
  dt-bindings: dma: rz-dmac: Document RZ/A1L SoC
  dmaengine: sh: rz-dmac: add r7s72100 support

 .../bindings/dma/renesas,rz-dmac.yaml         | 27 +++++++++++++------
 drivers/dma/sh/Kconfig                        |  6 ++---
 drivers/dma/sh/rz-dmac.c                      | 27 ++++++++++---------
 3 files changed, 37 insertions(+), 23 deletions(-)

-- 
2.45.2

[PATCH 2/3] dt-bindings: dma: rz-dmac: Document RZ/A1L SoC

[Wolfram Sang]

Document the Renesas RZ/A1L DMAC block. This one does not require clocks
and resets, so update the bindings accordingly.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 .../bindings/dma/renesas,rz-dmac.yaml         | 27 +++++++++++++------
 1 file changed, 19 insertions(+), 8 deletions(-)

diff --git a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml
index ca24cf48769f..e05aaf24eb64 100644
--- a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml
+++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml
@@ -4,18 +4,16 @@
 $id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Renesas RZ/{G2L,G2UL,V2L} DMA Controller
+title: Renesas RZ/{A1L,G2L,G2UL,V2L} DMA Controller
 
 maintainers:
   - Biju Das <biju.das.jz@bp.renesas.com>
 
-allOf:
-  - $ref: dma-controller.yaml#
-
 properties:
   compatible:
     items:
       - enum:
+          - renesas,r7s72100-dmac # RZ/A1L
           - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five
           - renesas,r9a07g044-dmac # RZ/G2{L,LC}
           - renesas,r9a07g054-dmac # RZ/V2L
@@ -93,13 +91,26 @@ required:
   - reg
   - interrupts
   - interrupt-names
-  - clocks
-  - clock-names
   - '#dma-cells'
   - dma-channels
   - power-domains
-  - resets
-  - reset-names
+
+allOf:
+  - $ref: dma-controller.yaml#
+
+  - if:
+      not:
+        properties:
+          compatible:
+            contains:
+              enum:
+                - renesas,r7s72100-dmac
+    then:
+      required:
+        - clocks
+        - clock-names
+        - resets
+        - reset-names
 
 additionalProperties: false
 
-- 
2.45.2

Re: [PATCH 2/3] dt-bindings: dma: rz-dmac: Document RZ/A1L SoC

[Geert Uytterhoeven]

Hi Wolfram,

Thanks for your patch!

On Mon, Sep 30, 2024 at 5:00 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Document the Renesas RZ/A1L DMAC block. This one does not require clocks

RZ/A1H

> and resets, so update the bindings accordingly.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

> --- a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml
> +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml
> @@ -4,18 +4,16 @@
>  $id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml#
>  $schema: http://devicetree.org/meta-schemas/core.yaml#
>
> -title: Renesas RZ/{G2L,G2UL,V2L} DMA Controller
> +title: Renesas RZ/{A1L,G2L,G2UL,V2L} DMA Controller

"A1H", or perhaps just "RZ-series"?

>
>  maintainers:
>    - Biju Das <biju.das.jz@bp.renesas.com>
>
> -allOf:
> -  - $ref: dma-controller.yaml#
> -
>  properties:
>    compatible:
>      items:
>        - enum:
> +          - renesas,r7s72100-dmac # RZ/A1L

RZ/A1H

The rest LGTM.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 2/3] dt-bindings: dma: rz-dmac: Document RZ/A1L SoC

[Wolfram Sang]

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> > Document the Renesas RZ/A1L DMAC block. This one does not require clocks
> 
> RZ/A1H

Argh, I managed to mix it up again. Thanks!

> > -title: Renesas RZ/{G2L,G2UL,V2L} DMA Controller
> > +title: Renesas RZ/{A1L,G2L,G2UL,V2L} DMA Controller

I'd vote for your suggestion. Biju?


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RE: [PATCH 2/3] dt-bindings: dma: rz-dmac: Document RZ/A1L SoC

[Biju Das]

Hi Wolfram,

> -----Original Message-----
> From: Wolfram Sang <wsa+renesas@sang-engineering.com>
> Sent: Monday, September 30, 2024 8:26 PM
> Subject: Re: [PATCH 2/3] dt-bindings: dma: rz-dmac: Document RZ/A1L SoC
> 
> 
> > > Document the Renesas RZ/A1L DMAC block. This one does not require clocks
> >
> > RZ/A1H
> 
> Argh, I managed to mix it up again. Thanks!
> 
> > > -title: Renesas RZ/{G2L,G2UL,V2L} DMA Controller
> > > +title: Renesas RZ/{A1L,G2L,G2UL,V2L} DMA Controller
> 
> I'd vote for your suggestion. Biju?

This list is going to grow like RZ/A1, RZ/A2, RZ/G2L, RZ/G2LC, RZ/G2UL, RZ/V2L,
RZ/Five, RZ/G3 devices, RZ/V2H and future generation SoCs.

So maybe some thing generic should fit here.

On RZ family, majority of devices, except RZ/G1 and RZ/G2{H,M,N,E} uses this DMA.

Maybe we can mention this as "RZ DMA controller" and on commit message mention about
"RZ/G1 and RZ/G2{H,M,N,E} devices".

Cheers,
Biju