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From: Marcus Folkesson <marcus.folkesson@gmail.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v5 2/2] dt-bindings: mtd: davinci: convert to yaml
Date: Mon, 14 Oct 2024 14:04:23 +0200	[thread overview]
Message-ID: <Zw0Ixx9Qu9tgGXGP@gmail.com> (raw)
In-Reply-To: <4u5iv24enpz46funfvbo2aggx6yiqxy7beaa3ldt5ai5wf65kl@bnlm4eyuwkui>

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Krzysztof,

I'm sorry for all these iterations, it wouldn't have been necessary if I had
done my homework better. I'm not too familiar with writing these and I do
often find the descriptions unclear and not obvious.
Anyway, thank you for your patience, reviews and help.


On Tue, Oct 08, 2024 at 03:28:33PM +0200, Krzysztof Kozlowski wrote:
> On Tue, Oct 08, 2024 at 09:02:45AM +0200, Marcus Folkesson wrote:
> > Convert the bindings to yaml format.
> > 
> > Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
> > ---
> >  .../devicetree/bindings/mtd/davinci-nand.txt       |  94 -----------------
> >  .../devicetree/bindings/mtd/ti,davinci-nand.yaml   | 115 +++++++++++++++++++++
> >  2 files changed, 115 insertions(+), 94 deletions(-)
> > 
> 
> 
> > diff --git a/Documentation/devicetree/bindings/mtd/ti,davinci-nand.yaml b/Documentation/devicetree/bindings/mtd/ti,davinci-nand.yaml
> > new file mode 100644
> > index 0000000000000000000000000000000000000000..1263616593532e8483d556b4242b004a16620ddf
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mtd/ti,davinci-nand.yaml
> > @@ -0,0 +1,115 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/mtd/ti,davinci-nand.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: TI DaVinci NAND controller
> > +
> > +maintainers:
> > +  - Marcus Folkesson <marcus.folkesson@gmail.com>
> > +
> > +allOf:
> > +  - $ref: nand-controller.yaml#
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - ti,davinci-nand
> > +      - ti,keystone-nand
> > +
> > +  reg:
> > +    maxItems: 1
> 
> This was different in original binding and commit msg does not explain
> changes.  Be sure any change from pure conversion is explained in the
> commit msg.

Hm. Another misinterpretation from my side.
Should I use items instead? E.g.

  reg:
    items:
      - description: |
        Contains 2 offset/length values:
        - offset and length for the access window.
        - offset and length for accessing the AEMIF
        control registers.

> 
> > +
> > +  partitions:
> > +    $ref: /schemas/mtd/partitions/partitions.yaml
> > +
> > +  ti,davinci-chipselect:
> > +    description:
> > +      Number of chipselect. Indicate on the davinci_nand driver which
> > +      chipselect is used for accessing the nand.
> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    enum: [0, 1, 2, 3]
> > +
> > +  ti,davinci-mask-ale:
> > +    description:
> > +      Mask for ALE. Needed for executing address phase. These offset will be
> > +      added to the base address for the chip select space the NAND Flash
> > +      device is connected to.
> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    default: 0x08
> > +
> > +  ti,davinci-mask-cle:
> > +    description:
> > +      Mask for CLE. Needed for executing command phase. These offset will be
> > +      added to the base address for the chip select space the NAND Flash device
> > +      is connected to.
> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    default: 0x10
> > +
> > +  ti,davinci-mask-chipsel:
> > +    description:
> > +      Mask for chipselect address. Needed to mask addresses for given
> > +      chipselect.
> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    default: 0
> > +
> > +  ti,davinci-ecc-bits:
> > +    description: Used ECC bits.
> > +    enum: [1, 4]
> > +
> > +  ti,davinci-ecc-mode:
> > +    description: Operation mode of the NAND ECC mode.
> > +    $ref: /schemas/types.yaml#/definitions/string
> > +    enum: [none, soft, hw, on-die]
> > +    deprecated: true
> > +
> > +  ti,davinci-nand-buswidth:
> > +    description: Bus width to the NAND chip
> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    enum: [8, 16]
> > +    default: 8
> > +    deprecated: true
> > +
> > +  ti,davinci-nand-use-bbt:
> > +    type: boolean
> > +    description:
> > +      Use flash based bad block table support. OOB identifier is saved in OOB
> > +      area.
> > +    deprecated: true
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - ti,davinci-chipselect
> > +
> > +unevaluatedProperties: false
> > +
> > +examples:
> > +  - |
> > +    nand-controller@2000000 {
> > +      compatible = "ti,davinci-nand";
> > +      #address-cells = <1>;
> > +      #size-cells = <0>;
> 
> I did not notice it last time.... but what is this? How could you have
> no sizes?
> 
> > +
> > +      reg = <0 0x02000000>;
> 
> This is odd. Address is not 0... and size should be 0.
> 
> I don't get how it even works. For sure it is not correct.

Outch. It slipped through when I was laborating.

This was the example I wanted to get working:


```
examples:
  - |
    nand-controller@2000000,0 {
      compatible = "ti,davinci-nand";
      #address-cells = <1>;
      #size-cells = <1>;
      reg = <0 0x02000000 0x02000000
      1 0x00000000 0x00008000>;

      ti,davinci-chipselect = <1>;
      ti,davinci-mask-ale = <0>;
      ti,davinci-mask-cle = <0>;
      ti,davinci-mask-chipsel = <0>;

      ti,davinci-nand-buswidth = <16>;
      ti,davinci-ecc-mode = "hw";
      ti,davinci-ecc-bits = <4>;
      ti,davinci-nand-use-bbt;

      partitions {
        compatible = "fixed-partitions";
        #address-cells = <1>;
        #size-cells = <1>;

        partition@0 {
          label = "u-boot env";
          reg = <0 0x020000>;
        };
      };
    };
```


But I'm getting the following errors:

```
.../ti,davinci-nand.example.dtb: nand-controller@2000000,0: #size-cells: 0 was expected
        from schema $id: http://devicetree.org/schemas/mtd/ti,davinci-nand.yaml#
.../ti,davinci-nand.example.dtb: nand-controller@2000000,0: reg: [[0, 33554432], [33554432, 1], [0, 32768]] is too long
        from schema $id: http://devicetree.org/schemas/mtd/ti,davinci-nand.yaml#
.../ti,davinci-nand.example.dtb: nand-controller@2000000,0: Unevaluated properties are not allowed ('reg' was unexpected)
        from schema $id: http://devicetree.org/schemas/mtd/ti,davinci-nand.yaml#
```

The resuling 'ti,davinci-nand.example.dts' contains the following:

```
    example-0 {
        #address-cells = <1>;
        #size-cells = <1>;

        nand-controller@2000000,0 {
          compatible = "ti,davinci-nand";
          #address-cells = <1>;
          #size-cells = <1>;
          reg = <0 0x02000000 0x02000000
          1 0x00000000 0x00008000>;
```
        

How do I set #address-cells in example-0 to 2?
I guess that is the problem.
> 
> Best regards,
> Krzysztof

Thanks,
Marcus

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  reply	other threads:[~2024-10-14 12:04 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-08  7:02 [PATCH v5 0/2] Add support for "on-die" ECC on Davinci Marcus Folkesson
2024-10-08  7:02 ` [PATCH v5 1/2] mtd: nand: davinci: add support for on-die ECC engine type Marcus Folkesson
2024-10-08  7:02 ` [PATCH v5 2/2] dt-bindings: mtd: davinci: convert to yaml Marcus Folkesson
2024-10-08  8:10   ` Miquel Raynal
2024-10-08 13:28   ` Krzysztof Kozlowski
2024-10-14 12:04     ` Marcus Folkesson [this message]
2024-10-14 18:08       ` Krzysztof Kozlowski
2024-10-18  9:12         ` Marcus Folkesson
2024-10-26 18:16           ` Krzysztof Kozlowski

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