* [PATCH 2/3] dt-bindings: arm: fsl: Document the Comvetia LXR board
2024-09-13 20:09 [PATCH 1/3] dt-bindings: vendor-prefixes: Add an entry for ComVetia AG Fabio Estevam
@ 2024-09-13 20:09 ` Fabio Estevam
2024-09-16 16:17 ` Conor Dooley
2024-09-13 20:09 ` [PATCH 3/3] ARM: dts: imx6q-lxr: Add board support Fabio Estevam
` (2 subsequent siblings)
3 siblings, 1 reply; 6+ messages in thread
From: Fabio Estevam @ 2024-09-13 20:09 UTC (permalink / raw)
To: shawnguo
Cc: robh, krzk+dt, conor+dt, linux-arm-kernel, devicetree,
Fabio Estevam
From: Fabio Estevam <festevam@denx.de>
The Comvetia LXR board is based on a i.MX6Q phyFLEX-i.MX6 Quad SoM
from Phytec.
Add an entry for this board.
Signed-off-by: Fabio Estevam <festevam@denx.de>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index b39a7e031177..63b744c13f37 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -379,7 +379,9 @@ properties:
- description: i.MX6Q PHYTEC phyFLEX-i.MX6
items:
- - const: phytec,imx6q-pbab01 # PHYTEC phyFLEX carrier board
+ - enum:
+ - comvetia,imx6q-lxr # Comvetia LXR board
+ - phytec,imx6q-pbab01 # PHYTEC phyFLEX carrier board
- const: phytec,imx6q-pfla02 # PHYTEC phyFLEX-i.MX6 Quad
- const: fsl,imx6q
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH 2/3] dt-bindings: arm: fsl: Document the Comvetia LXR board
2024-09-13 20:09 ` [PATCH 2/3] dt-bindings: arm: fsl: Document the Comvetia LXR board Fabio Estevam
@ 2024-09-16 16:17 ` Conor Dooley
0 siblings, 0 replies; 6+ messages in thread
From: Conor Dooley @ 2024-09-16 16:17 UTC (permalink / raw)
To: Fabio Estevam
Cc: shawnguo, robh, krzk+dt, conor+dt, linux-arm-kernel, devicetree,
Fabio Estevam
[-- Attachment #1: Type: text/plain, Size: 342 bytes --]
On Fri, Sep 13, 2024 at 05:09:05PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <festevam@denx.de>
>
> The Comvetia LXR board is based on a i.MX6Q phyFLEX-i.MX6 Quad SoM
> from Phytec.
>
> Add an entry for this board.
>
> Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 3/3] ARM: dts: imx6q-lxr: Add board support
2024-09-13 20:09 [PATCH 1/3] dt-bindings: vendor-prefixes: Add an entry for ComVetia AG Fabio Estevam
2024-09-13 20:09 ` [PATCH 2/3] dt-bindings: arm: fsl: Document the Comvetia LXR board Fabio Estevam
@ 2024-09-13 20:09 ` Fabio Estevam
2024-09-16 16:17 ` [PATCH 1/3] dt-bindings: vendor-prefixes: Add an entry for ComVetia AG Conor Dooley
2024-10-16 8:39 ` Shawn Guo
3 siblings, 0 replies; 6+ messages in thread
From: Fabio Estevam @ 2024-09-13 20:09 UTC (permalink / raw)
To: shawnguo
Cc: robh, krzk+dt, conor+dt, linux-arm-kernel, devicetree,
Fabio Estevam
From: Fabio Estevam <festevam@denx.de>
The Comvetia LXR board is based on a i.MX6Q phyFLEX-i.MX6 Quad SoM
from Phytec.
Add a devicetree description for this board.
Signed-off-by: Fabio Estevam <festevam@denx.de>
---
arch/arm/boot/dts/nxp/imx/Makefile | 1 +
arch/arm/boot/dts/nxp/imx/imx6q-lxr.dts | 87 +++++++++++++++++++++++++
2 files changed, 88 insertions(+)
create mode 100644 arch/arm/boot/dts/nxp/imx/imx6q-lxr.dts
diff --git a/arch/arm/boot/dts/nxp/imx/Makefile b/arch/arm/boot/dts/nxp/imx/Makefile
index 92e291603ea1..8acd3a6d1e12 100644
--- a/arch/arm/boot/dts/nxp/imx/Makefile
+++ b/arch/arm/boot/dts/nxp/imx/Makefile
@@ -211,6 +211,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-kontron-samx6i-ads2.dtb \
imx6q-kp-tpc.dtb \
imx6q-logicpd.dtb \
+ imx6q-lxr.dtb \
imx6q-marsboard.dtb \
imx6q-mba6a.dtb \
imx6q-mba6b.dtb \
diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-lxr.dts b/arch/arm/boot/dts/nxp/imx/imx6q-lxr.dts
new file mode 100644
index 000000000000..a49d6f623410
--- /dev/null
+++ b/arch/arm/boot/dts/nxp/imx/imx6q-lxr.dts
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+//
+// Copyright 2024 Comvetia AG
+
+/dts-v1/;
+#include "imx6q-phytec-pfla02.dtsi"
+
+/ {
+ model = "COMVETIA QSoIP LXR-2";
+ compatible = "comvetia,imx6q-lxr", "phytec,imx6q-pfla02", "fsl,imx6q";
+
+ chosen {
+ stdout-path = &uart4;
+ };
+
+ spi {
+ compatible = "spi-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi_gpio>;
+ sck-gpios = <&gpio5 8 GPIO_ACTIVE_HIGH>;
+ mosi-gpios = <&gpio5 7 GPIO_ACTIVE_HIGH>;
+ num-chipselects = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fpga@0 {
+ compatible = "altr,fpga-passive-serial";
+ reg = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fpga>;
+ nconfig-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
+ nstat-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
+ confd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&ecspi3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi3>;
+ cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ };
+};
+
+&fec {
+ status = "okay";
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&uart3 {
+ status = "okay";
+};
+
+&uart4 {
+ status = "okay";
+};
+
+&usdhc3 {
+ no-1-8-v;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_fpga: fpgagrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0
+ MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
+ MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0
+ >;
+ };
+
+ pinctrl_spi_gpio: spigpiogrp {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 0x1b0b0
+ MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07 0x1b0b0
+ >;
+ };
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH 1/3] dt-bindings: vendor-prefixes: Add an entry for ComVetia AG
2024-09-13 20:09 [PATCH 1/3] dt-bindings: vendor-prefixes: Add an entry for ComVetia AG Fabio Estevam
2024-09-13 20:09 ` [PATCH 2/3] dt-bindings: arm: fsl: Document the Comvetia LXR board Fabio Estevam
2024-09-13 20:09 ` [PATCH 3/3] ARM: dts: imx6q-lxr: Add board support Fabio Estevam
@ 2024-09-16 16:17 ` Conor Dooley
2024-10-16 8:39 ` Shawn Guo
3 siblings, 0 replies; 6+ messages in thread
From: Conor Dooley @ 2024-09-16 16:17 UTC (permalink / raw)
To: Fabio Estevam
Cc: shawnguo, robh, krzk+dt, conor+dt, linux-arm-kernel, devicetree,
Fabio Estevam
[-- Attachment #1: Type: text/plain, Size: 370 bytes --]
On Fri, Sep 13, 2024 at 05:09:04PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <festevam@denx.de>
>
> ComVetia AG is a professional radio communication platforms
> manufacturer:
>
> https://comvetia.com/
>
> Add a vendor prefix entry for it.
>
> Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/3] dt-bindings: vendor-prefixes: Add an entry for ComVetia AG
2024-09-13 20:09 [PATCH 1/3] dt-bindings: vendor-prefixes: Add an entry for ComVetia AG Fabio Estevam
` (2 preceding siblings ...)
2024-09-16 16:17 ` [PATCH 1/3] dt-bindings: vendor-prefixes: Add an entry for ComVetia AG Conor Dooley
@ 2024-10-16 8:39 ` Shawn Guo
3 siblings, 0 replies; 6+ messages in thread
From: Shawn Guo @ 2024-10-16 8:39 UTC (permalink / raw)
To: Fabio Estevam
Cc: shawnguo, robh, krzk+dt, conor+dt, linux-arm-kernel, devicetree,
Fabio Estevam
On Fri, Sep 13, 2024 at 05:09:04PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <festevam@denx.de>
>
> ComVetia AG is a professional radio communication platforms
> manufacturer:
>
> https://comvetia.com/
>
> Add a vendor prefix entry for it.
>
> Signed-off-by: Fabio Estevam <festevam@denx.de>
Applied all, thanks!
^ permalink raw reply [flat|nested] 6+ messages in thread