* [PATCH v2] arm64: dts: imx8m*-venice-gw75xx: add Accelerometer device
@ 2024-09-09 21:50 Tim Harvey
2024-10-16 7:10 ` Shawn Guo
0 siblings, 1 reply; 2+ messages in thread
From: Tim Harvey @ 2024-09-09 21:50 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Li Yang,
devicetree, linux-kernel, imx, linux-arm-kernel
Cc: Tim Harvey
The GW75xx has a LIS2DE12TR 3-axis accelerometer on the I2C bus with an
interrupt pin. Add it to the device-tree.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
----
v2:
- make sure compatible is on top and vendor specific props are at the end per:
https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
- fix typo in commit message
---
.../boot/dts/freescale/imx8mm-venice-gw75xx.dtsi | 16 ++++++++++++++++
.../boot/dts/freescale/imx8mp-venice-gw75xx.dtsi | 16 ++++++++++++++++
2 files changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
index 5eb92005195c..d17e1f375be4 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
@@ -116,6 +116,16 @@ &i2c2 {
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
+ accelerometer@19 {
+ compatible = "st,lis2de12";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_accel>;
+ reg = <0x19>;
+ interrupt-parent = <&gpio5>;
+ interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
+ st,drdy-int-pin = <1>;
+ };
+
eeprom@52 {
compatible = "atmel,24c32";
reg = <0x52>;
@@ -198,6 +208,12 @@ MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x40000040 /* GPIOC */
>;
};
+ pinctrl_accel: accelgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_ECSPI1_MISO_GPIO5_IO8 0x159
+ >;
+ };
+
pinctrl_gpio_leds: gpioledgrp {
fsl,pins = <
MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x6 /* LEDG */
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
index 0d40cb0f05f6..c9934cf98942 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
@@ -104,6 +104,16 @@ &i2c2 {
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
+ accelerometer@19 {
+ compatible = "st,lis2de12";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_accel>;
+ reg = <0x19>;
+ interrupt-parent = <&gpio5>;
+ interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
+ st,drdy-int-pin = <1>;
+ };
+
eeprom@52 {
compatible = "atmel,24c32";
reg = <0x52>;
@@ -204,6 +214,12 @@ MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x40000106 /* PCI_WDIS# */
>;
};
+ pinctrl_accel: accelgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08 0x159
+ >;
+ };
+
pinctrl_gpio_leds: gpioledgrp {
fsl,pins = <
MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x6 /* LEDG */
--
2.25.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8m*-venice-gw75xx: add Accelerometer device
2024-09-09 21:50 [PATCH v2] arm64: dts: imx8m*-venice-gw75xx: add Accelerometer device Tim Harvey
@ 2024-10-16 7:10 ` Shawn Guo
0 siblings, 0 replies; 2+ messages in thread
From: Shawn Guo @ 2024-10-16 7:10 UTC (permalink / raw)
To: Tim Harvey
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Li Yang,
devicetree, linux-kernel, imx, linux-arm-kernel
On Mon, Sep 09, 2024 at 02:50:09PM -0700, Tim Harvey wrote:
> The GW75xx has a LIS2DE12TR 3-axis accelerometer on the I2C bus with an
> interrupt pin. Add it to the device-tree.
>
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ----
> v2:
> - make sure compatible is on top and vendor specific props are at the end per:
> https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
> - fix typo in commit message
> ---
> .../boot/dts/freescale/imx8mm-venice-gw75xx.dtsi | 16 ++++++++++++++++
> .../boot/dts/freescale/imx8mp-venice-gw75xx.dtsi | 16 ++++++++++++++++
> 2 files changed, 32 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
> index 5eb92005195c..d17e1f375be4 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
> @@ -116,6 +116,16 @@ &i2c2 {
> pinctrl-0 = <&pinctrl_i2c2>;
> status = "okay";
>
> + accelerometer@19 {
> + compatible = "st,lis2de12";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_accel>;
> + reg = <0x19>;
Could you have 'reg' after 'compatible'?
Shawn
> + interrupt-parent = <&gpio5>;
> + interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
> + st,drdy-int-pin = <1>;
> + };
> +
> eeprom@52 {
> compatible = "atmel,24c32";
> reg = <0x52>;
> @@ -198,6 +208,12 @@ MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x40000040 /* GPIOC */
> >;
> };
>
> + pinctrl_accel: accelgrp {
> + fsl,pins = <
> + MX8MM_IOMUXC_ECSPI1_MISO_GPIO5_IO8 0x159
> + >;
> + };
> +
> pinctrl_gpio_leds: gpioledgrp {
> fsl,pins = <
> MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x6 /* LEDG */
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
> index 0d40cb0f05f6..c9934cf98942 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
> @@ -104,6 +104,16 @@ &i2c2 {
> pinctrl-0 = <&pinctrl_i2c2>;
> status = "okay";
>
> + accelerometer@19 {
> + compatible = "st,lis2de12";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_accel>;
> + reg = <0x19>;
> + interrupt-parent = <&gpio5>;
> + interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
> + st,drdy-int-pin = <1>;
> + };
> +
> eeprom@52 {
> compatible = "atmel,24c32";
> reg = <0x52>;
> @@ -204,6 +214,12 @@ MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x40000106 /* PCI_WDIS# */
> >;
> };
>
> + pinctrl_accel: accelgrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08 0x159
> + >;
> + };
> +
> pinctrl_gpio_leds: gpioledgrp {
> fsl,pins = <
> MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x6 /* LEDG */
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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2024-10-16 7:10 ` Shawn Guo
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