[PATCH v2 0/7] arm64: dts: freescale: imx95: add various nodes

[PATCH v2 0/7] arm64: dts: freescale: imx95: add various nodes

[Peng Fan (OSS)]

Per scmi binding doc update and i.MX extenstion supported, add the nodes
in imx95.dtsi.
Enable cpuidle for A55
Add anamix temperature thermal zone
Add lpi2c[5,6] i2c nodes and sub-nodes

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
Changes in v2:
- Use generic node name "gpio" for gpio controller in patch 7
- Link to v1: https://lore.kernel.org/r/20240902-imx95-dts-new-v1-0-a1f798f4f746@nxp.com

---
Peng Fan (7):
      arm64: dts: freescale: imx95: set max-rx-timeout-ms
      arm64: dts: freescale: imx95: add bbm/misc/syspower scmi nodes
      arm64: dts: freescale: imx95: update a55 thermal trip points
      arm64: dts: freescale: imx95: add anamix temperature thermal zone and cooling node
      arm64: dts: freescale: imx95: enable A55 cpuidle
      arm64: dts: freescale: imx95-19x19-evk: add nxp,ctrl-ids property
      arm64: dts: freescale: imx95-19x19-evk: add lpi2c[5,6] and sub-nodes

 arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts | 86 +++++++++++++++++++++++
 arch/arm64/boot/dts/freescale/imx95.dtsi          | 69 +++++++++++++++++-
 2 files changed, 153 insertions(+), 2 deletions(-)
---
base-commit: 985bf40edf4343dcb04c33f58b40b4a85c1776d4
change-id: 20240902-imx95-dts-new-fbb8ac9fca18

Best regards,
-- 
Peng Fan <peng.fan@nxp.com>

[PATCH v2 1/7] arm64: dts: freescale: imx95: set max-rx-timeout-ms

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

With 'max-rx-timeout-ms' property added in 'Documentation/devicetree/
indings/firmware/arm,scmi.yaml', set the value for i.MX95.

NXP i.MX95 SCMI Firmware designation does not allow timeout, it will not
recover if the Agents use timeout design. So set a large value (5000ms)
here.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index ecdc6b7b5129..7880d3efbd7e 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -294,6 +294,8 @@ scmi {
 			#address-cells = <1>;
 			#size-cells = <0>;
 
+			max-rx-timeout-ms = <5000>;
+
 			scmi_devpd: protocol@11 {
 				reg = <0x11>;
 				#power-domain-cells = <1>;

-- 
2.37.1

Re: [PATCH v2 1/7] arm64: dts: freescale: imx95: set max-rx-timeout-ms

[Shawn Guo]

On Tue, Sep 03, 2024 at 03:17:46PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> With 'max-rx-timeout-ms' property added in 'Documentation/devicetree/
> indings/firmware/arm,scmi.yaml', set the value for i.MX95.
> 
> NXP i.MX95 SCMI Firmware designation does not allow timeout, it will not
> recover if the Agents use timeout design. So set a large value (5000ms)
> here.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx95.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index ecdc6b7b5129..7880d3efbd7e 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -294,6 +294,8 @@ scmi {
>  			#address-cells = <1>;
>  			#size-cells = <0>;
>  

Can we drop this newline?

> +			max-rx-timeout-ms = <5000>;

max-rx-timeout-ms is an optional property.  As i.MX95 SCMI firmware
does not allow timeout, I wonder if absence of the property will just
do the right thing?

Shawn

> +
>  			scmi_devpd: protocol@11 {
>  				reg = <0x11>;
>  				#power-domain-cells = <1>;
> 
> -- 
> 2.37.1
> 

RE: [PATCH v2 1/7] arm64: dts: freescale: imx95: set max-rx-timeout-ms

[Peng Fan]

> Subject: Re: [PATCH v2 1/7] arm64: dts: freescale: imx95: set max-rx-
> timeout-ms
> 
> On Tue, Sep 03, 2024 at 03:17:46PM +0800, Peng Fan (OSS) wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > With 'max-rx-timeout-ms' property added in
> 'Documentation/devicetree/
> > indings/firmware/arm,scmi.yaml', set the value for i.MX95.
> >
> > NXP i.MX95 SCMI Firmware designation does not allow timeout, it
> will
> > not recover if the Agents use timeout design. So set a large value
> > (5000ms) here.
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> >  arch/arm64/boot/dts/freescale/imx95.dtsi | 2 ++
> >  1 file changed, 2 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi
> > b/arch/arm64/boot/dts/freescale/imx95.dtsi
> > index ecdc6b7b5129..7880d3efbd7e 100644
> > --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> > @@ -294,6 +294,8 @@ scmi {
> >  			#address-cells = <1>;
> >  			#size-cells = <0>;
> >
> 
> Can we drop this newline?
> 
> > +			max-rx-timeout-ms = <5000>;
> 
> max-rx-timeout-ms is an optional property.  As i.MX95 SCMI firmware
> does not allow timeout, I wonder if absence of the property will just do
> the right thing?

The default value in driver is 30ms, this is not enough in some cases.

Thanks,
Peng.

> 
> Shawn
> 
> > +
> >  			scmi_devpd: protocol@11 {
> >  				reg = <0x11>;
> >  				#power-domain-cells = <1>;
> >
> > --
> > 2.37.1
> >

[PATCH v2 2/7] arm64: dts: freescale: imx95: add bbm/misc/syspower scmi nodes

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Add SYS Power, BBM and MISC nodes under SCMI firmware node.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 7880d3efbd7e..314a45e82c38 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -301,6 +301,10 @@ scmi_devpd: protocol@11 {
 				#power-domain-cells = <1>;
 			};
 
+			scmi_sys_power: protocol@12 {
+				reg = <0x12>;
+			};
+
 			scmi_perf: protocol@13 {
 				reg = <0x13>;
 				#power-domain-cells = <1>;
@@ -320,6 +324,13 @@ scmi_iomuxc: protocol@19 {
 				reg = <0x19>;
 			};
 
+			scmi_bbm: protocol@81 {
+				reg = <0x81>;
+			};
+
+			scmi_misc: protocol@84 {
+				reg = <0x84>;
+			};
 		};
 	};
 

-- 
2.37.1

Re: [PATCH v2 2/7] arm64: dts: freescale: imx95: add bbm/misc/syspower scmi nodes

[Alexander Stein]

Hi,

Am Dienstag, 3. September 2024, 09:17:47 CEST schrieb Peng Fan (OSS):
> From: Peng Fan <peng.fan@nxp.com>
> 
> Add SYS Power, BBM and MISC nodes under SCMI firmware node.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>

Looks good.
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>

> ---
>  arch/arm64/boot/dts/freescale/imx95.dtsi | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index 7880d3efbd7e..314a45e82c38 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -301,6 +301,10 @@ scmi_devpd: protocol@11 {
>  				#power-domain-cells = <1>;
>  			};
>  
> +			scmi_sys_power: protocol@12 {
> +				reg = <0x12>;
> +			};
> +
>  			scmi_perf: protocol@13 {
>  				reg = <0x13>;
>  				#power-domain-cells = <1>;
> @@ -320,6 +324,13 @@ scmi_iomuxc: protocol@19 {
>  				reg = <0x19>;
>  			};
>  
> +			scmi_bbm: protocol@81 {
> +				reg = <0x81>;
> +			};
> +
> +			scmi_misc: protocol@84 {
> +				reg = <0x84>;
> +			};
>  		};
>  	};
>  
> 
> 


-- 
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/

[PATCH v2 3/7] arm64: dts: freescale: imx95: update a55 thermal trip points

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Update the thermal trip points for automotive and extended industrial
temperature qualification processors.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 314a45e82c38..2cba7a889030 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -347,13 +347,13 @@ a55-thermal {
 
 			trips {
 				cpu_alert0: trip0 {
-					temperature = <85000>;
+					temperature = <105000>;
 					hysteresis = <2000>;
 					type = "passive";
 				};
 
 				cpu_crit0: trip1 {
-					temperature = <95000>;
+					temperature = <125000>;
 					hysteresis = <2000>;
 					type = "critical";
 				};

-- 
2.37.1

Re: [PATCH v2 3/7] arm64: dts: freescale: imx95: update a55 thermal trip points

[Alexander Stein]

Am Dienstag, 3. September 2024, 09:17:48 CEST schrieb Peng Fan (OSS):
> From: Peng Fan <peng.fan@nxp.com>
> 
> Update the thermal trip points for automotive and extended industrial
> temperature qualification processors.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx95.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index 314a45e82c38..2cba7a889030 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -347,13 +347,13 @@ a55-thermal {
>  
>  			trips {
>  				cpu_alert0: trip0 {
> -					temperature = <85000>;
> +					temperature = <105000>;
>  					hysteresis = <2000>;
>  					type = "passive";
>  				};
>  
>  				cpu_crit0: trip1 {
> -					temperature = <95000>;
> +					temperature = <125000>;

What about commercial and industrial temperature ranges? Can you detected
this at runtime? Is the bootloader supposed to correct these settings?

Best regards,
Alexander

>  					hysteresis = <2000>;
>  					type = "critical";
>  				};
> 
> 


-- 
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/

RE: [PATCH v2 3/7] arm64: dts: freescale: imx95: update a55 thermal trip points

[Peng Fan]

> Subject: Re: [PATCH v2 3/7] arm64: dts: freescale: imx95: update a55
> thermal trip points
> 
> Am Dienstag, 3. September 2024, 09:17:48 CEST schrieb Peng Fan
> (OSS):
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > Update the thermal trip points for automotive and extended
> industrial
> > temperature qualification processors.
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> >  arch/arm64/boot/dts/freescale/imx95.dtsi | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi
> > b/arch/arm64/boot/dts/freescale/imx95.dtsi
> > index 314a45e82c38..2cba7a889030 100644
> > --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> > @@ -347,13 +347,13 @@ a55-thermal {
> >
> >  			trips {
> >  				cpu_alert0: trip0 {
> > -					temperature = <85000>;
> > +					temperature = <105000>;
> >  					hysteresis = <2000>;
> >  					type = "passive";
> >  				};
> >
> >  				cpu_crit0: trip1 {
> > -					temperature = <95000>;
> > +					temperature = <125000>;
> 
> What about commercial and industrial temperature ranges? Can you
> detected this at runtime? Is the bootloader supposed to correct these
> settings?

Bootloader is supposed to update or people could overwrite in their
board device tree per which chip grade is being used.

It would be better if there is runtime update by kernel, but no as
of now. We may use nvmem to do runtime in future, but need check.

Regards,
Peng.

> 
> Best regards,
> Alexander
> 
> >  					hysteresis = <2000>;
> >  					type = "critical";
> >  				};
> >
> >
> 
> 
> --
> TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld,
> Germany Amtsgericht München, HRB 105018
> Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2F
> www.tq-
> group.com%2F&data=05%7C02%7Cpeng.fan%40nxp.com%7C1787566
> 643e742d9965508dccda5ad2d%7C686ea1d3bc2b4c6fa92cd99c5c301
> 635%7C0%7C0%7C638611358666637887%7CUnknown%7CTWFpbGZ
> sb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJX
> VCI6Mn0%3D%7C0%7C%7C%7C&sdata=vL3HTTjWm6F6dRQD4Oek0nj
> UiY%2FNnkqDv5z3k846EdY%3D&reserved=0
> 

[PATCH v2 4/7] arm64: dts: freescale: imx95: add anamix temperature thermal zone and cooling node

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

i.MX95 has two on-chip temperature sensors, one is inside anamix block.
This is to add the anamix temperature thermal zone and its cooling
device.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95.dtsi | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 2cba7a889030..d031b9548aaf 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -372,6 +372,38 @@ map0 {
 				};
 			};
 		};
+
+		ana-thermal {
+			polling-delay-passive = <250>;
+			polling-delay = <2000>;
+			thermal-sensors = <&scmi_sensor 0>;
+			trips {
+				ana_alert: trip0 {
+					temperature = <105000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
+				ana_crit0: trip1 {
+					temperature = <125000>;
+					hysteresis = <2000>;
+					type = "critical";
+				};
+			};
+
+			cooling-maps {
+				map0 {
+					trip = <&ana_alert>;
+					cooling-device =
+						<&A55_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&A55_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&A55_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&A55_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&A55_4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&A55_5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+		};
 	};
 
 	psci {

-- 
2.37.1

Re: [PATCH v2 4/7] arm64: dts: freescale: imx95: add anamix temperature thermal zone and cooling node

[Shawn Guo]

On Tue, Sep 03, 2024 at 03:17:49PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> i.MX95 has two on-chip temperature sensors, one is inside anamix block.
> This is to add the anamix temperature thermal zone and its cooling
> device.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx95.dtsi | 32 ++++++++++++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index 2cba7a889030..d031b9548aaf 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -372,6 +372,38 @@ map0 {
>  				};
>  			};
>  		};
> +
> +		ana-thermal {
> +			polling-delay-passive = <250>;
> +			polling-delay = <2000>;
> +			thermal-sensors = <&scmi_sensor 0>;

Have a newline between property list and child node.

Shawn

> +			trips {
> +				ana_alert: trip0 {
> +					temperature = <105000>;
> +					hysteresis = <2000>;
> +					type = "passive";
> +				};
> +
> +				ana_crit0: trip1 {
> +					temperature = <125000>;
> +					hysteresis = <2000>;
> +					type = "critical";
> +				};
> +			};
> +
> +			cooling-maps {
> +				map0 {
> +					trip = <&ana_alert>;
> +					cooling-device =
> +						<&A55_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +						<&A55_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +						<&A55_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +						<&A55_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +						<&A55_4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +						<&A55_5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +				};
> +			};
> +		};
>  	};
>  
>  	psci {
> 
> -- 
> 2.37.1
> 

[PATCH v2 5/7] arm64: dts: freescale: imx95: enable A55 cpuidle

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Add cpuidle node and enable cpuidle for A55.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index d031b9548aaf..a7e411f1daa6 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -22,12 +22,27 @@ cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
 
+		idle-states {
+			entry-method = "psci";
+
+			cpu_pd_wait: cpu-pd-wait {
+				compatible = "arm,idle-state";
+				arm,psci-suspend-param = <0x0010033>;
+				local-timer-stop;
+				entry-latency-us = <10000>;
+				exit-latency-us = <7000>;
+				min-residency-us = <27000>;
+				wakeup-latency-us = <15000>;
+			};
+		};
+
 		A55_0: cpu@0 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a55";
 			reg = <0x0>;
 			enable-method = "psci";
 			#cooling-cells = <2>;
+			cpu-idle-states = <&cpu_pd_wait>;
 			power-domains = <&scmi_perf IMX95_PERF_A55>;
 			power-domain-names = "perf";
 			i-cache-size = <32768>;
@@ -45,6 +60,7 @@ A55_1: cpu@100 {
 			reg = <0x100>;
 			enable-method = "psci";
 			#cooling-cells = <2>;
+			cpu-idle-states = <&cpu_pd_wait>;
 			power-domains = <&scmi_perf IMX95_PERF_A55>;
 			power-domain-names = "perf";
 			i-cache-size = <32768>;
@@ -62,6 +78,7 @@ A55_2: cpu@200 {
 			reg = <0x200>;
 			enable-method = "psci";
 			#cooling-cells = <2>;
+			cpu-idle-states = <&cpu_pd_wait>;
 			power-domains = <&scmi_perf IMX95_PERF_A55>;
 			power-domain-names = "perf";
 			i-cache-size = <32768>;
@@ -79,6 +96,7 @@ A55_3: cpu@300 {
 			reg = <0x300>;
 			enable-method = "psci";
 			#cooling-cells = <2>;
+			cpu-idle-states = <&cpu_pd_wait>;
 			power-domains = <&scmi_perf IMX95_PERF_A55>;
 			power-domain-names = "perf";
 			i-cache-size = <32768>;
@@ -98,6 +116,7 @@ A55_4: cpu@400 {
 			power-domain-names = "perf";
 			enable-method = "psci";
 			#cooling-cells = <2>;
+			cpu-idle-states = <&cpu_pd_wait>;
 			i-cache-size = <32768>;
 			i-cache-line-size = <64>;
 			i-cache-sets = <128>;
@@ -115,6 +134,7 @@ A55_5: cpu@500 {
 			power-domain-names = "perf";
 			enable-method = "psci";
 			#cooling-cells = <2>;
+			cpu-idle-states = <&cpu_pd_wait>;
 			i-cache-size = <32768>;
 			i-cache-line-size = <64>;
 			i-cache-sets = <128>;

-- 
2.37.1

[PATCH v2 6/7] arm64: dts: freescale: imx95-19x19-evk: add nxp,ctrl-ids property

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Add 'nxp,ctrl-ids' for SCMI firmware to confirm the board ctrls as
wakeup sources.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
index 37a1d4ca1b20..5101cd171e09 100644
--- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
@@ -8,6 +8,15 @@
 #include <dt-bindings/pwm/pwm.h>
 #include "imx95.dtsi"
 
+#define FALLING_EDGE			1
+#define RISING_EDGE			2
+
+#define BRD_SM_CTRL_SD3_WAKE		0x8000	/* PCAL6408A-0 */
+#define BRD_SM_CTRL_PCIE1_WAKE		0x8001	/* PCAL6408A-4 */
+#define BRD_SM_CTRL_BT_WAKE		0x8002	/* PCAL6408A-5 */
+#define BRD_SM_CTRL_PCIE2_WAKE		0x8003	/* PCAL6408A-6 */
+#define BRD_SM_CTRL_BUTTON		0x8004	/* PCAL6408A-7 */
+
 / {
 	model = "NXP i.MX95 19X19 board";
 	compatible = "fsl,imx95-19x19-evk", "fsl,imx95";
@@ -357,6 +366,14 @@ &usdhc2 {
 	status = "okay";
 };
 
+&scmi_misc {
+	nxp,ctrl-ids = <BRD_SM_CTRL_SD3_WAKE	FALLING_EDGE
+			BRD_SM_CTRL_PCIE1_WAKE	FALLING_EDGE
+			BRD_SM_CTRL_BT_WAKE	FALLING_EDGE
+			BRD_SM_CTRL_PCIE2_WAKE	FALLING_EDGE
+			BRD_SM_CTRL_BUTTON	FALLING_EDGE>;
+};
+
 &wdog3 {
 	fsl,ext-reset-output;
 	status = "okay";

-- 
2.37.1

Re: [PATCH v2 6/7] arm64: dts: freescale: imx95-19x19-evk: add nxp,ctrl-ids property

[Shawn Guo]

On Tue, Sep 03, 2024 at 03:17:51PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> Add 'nxp,ctrl-ids' for SCMI firmware to confirm the board ctrls as

s/confirm/configure?

> wakeup sources.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> index 37a1d4ca1b20..5101cd171e09 100644
> --- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> @@ -8,6 +8,15 @@
>  #include <dt-bindings/pwm/pwm.h>
>  #include "imx95.dtsi"
>  
> +#define FALLING_EDGE			1
> +#define RISING_EDGE			2
> +
> +#define BRD_SM_CTRL_SD3_WAKE		0x8000	/* PCAL6408A-0 */
> +#define BRD_SM_CTRL_PCIE1_WAKE		0x8001	/* PCAL6408A-4 */
> +#define BRD_SM_CTRL_BT_WAKE		0x8002	/* PCAL6408A-5 */
> +#define BRD_SM_CTRL_PCIE2_WAKE		0x8003	/* PCAL6408A-6 */
> +#define BRD_SM_CTRL_BUTTON		0x8004	/* PCAL6408A-7 */

Are these defines board specific?

Shawn

> +
>  / {
>  	model = "NXP i.MX95 19X19 board";
>  	compatible = "fsl,imx95-19x19-evk", "fsl,imx95";
> @@ -357,6 +366,14 @@ &usdhc2 {
>  	status = "okay";
>  };
>  
> +&scmi_misc {
> +	nxp,ctrl-ids = <BRD_SM_CTRL_SD3_WAKE	FALLING_EDGE
> +			BRD_SM_CTRL_PCIE1_WAKE	FALLING_EDGE
> +			BRD_SM_CTRL_BT_WAKE	FALLING_EDGE
> +			BRD_SM_CTRL_PCIE2_WAKE	FALLING_EDGE
> +			BRD_SM_CTRL_BUTTON	FALLING_EDGE>;
> +};
> +
>  &wdog3 {
>  	fsl,ext-reset-output;
>  	status = "okay";
> 
> -- 
> 2.37.1
> 

RE: [PATCH v2 6/7] arm64: dts: freescale: imx95-19x19-evk: add nxp,ctrl-ids property

[Peng Fan]

> Subject: Re: [PATCH v2 6/7] arm64: dts: freescale: imx95-19x19-evk:
> add nxp,ctrl-ids property
> 
> On Tue, Sep 03, 2024 at 03:17:51PM +0800, Peng Fan (OSS) wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > Add 'nxp,ctrl-ids' for SCMI firmware to confirm the board ctrls as
> 
> s/confirm/configure?

Fix in v3.

> 
> > wakeup sources.
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> >  arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts | 17
> > +++++++++++++++++
> >  1 file changed, 17 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> > b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> > index 37a1d4ca1b20..5101cd171e09 100644
> > --- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> > @@ -8,6 +8,15 @@
> >  #include <dt-bindings/pwm/pwm.h>
> >  #include "imx95.dtsi"
> >
> > +#define FALLING_EDGE			1
> > +#define RISING_EDGE			2
> > +
> > +#define BRD_SM_CTRL_SD3_WAKE		0x8000	/*
> PCAL6408A-0 */
> > +#define BRD_SM_CTRL_PCIE1_WAKE		0x8001	/*
> PCAL6408A-4 */
> > +#define BRD_SM_CTRL_BT_WAKE		0x8002	/*
> PCAL6408A-5 */
> > +#define BRD_SM_CTRL_PCIE2_WAKE		0x8003	/*
> PCAL6408A-6 */
> > +#define BRD_SM_CTRL_BUTTON		0x8004	/*
> PCAL6408A-7 */
> 
> Are these defines board specific?

Yes, board specific.

Thanks,
Peng.

> 
> Shawn
> 
> > +
> >  / {
> >  	model = "NXP i.MX95 19X19 board";
> >  	compatible = "fsl,imx95-19x19-evk", "fsl,imx95"; @@ -357,6
> +366,14
> > @@ &usdhc2 {
> >  	status = "okay";
> >  };
> >
> > +&scmi_misc {
> > +	nxp,ctrl-ids = <BRD_SM_CTRL_SD3_WAKE	FALLING_EDGE
> > +			BRD_SM_CTRL_PCIE1_WAKE
> 	FALLING_EDGE
> > +			BRD_SM_CTRL_BT_WAKE
> 	FALLING_EDGE
> > +			BRD_SM_CTRL_PCIE2_WAKE
> 	FALLING_EDGE
> > +			BRD_SM_CTRL_BUTTON	FALLING_EDGE>;
> > +};
> > +
> >  &wdog3 {
> >  	fsl,ext-reset-output;
> >  	status = "okay";
> >
> > --
> > 2.37.1
> >

[PATCH v2 7/7] arm64: dts: freescale: imx95-19x19-evk: add lpi2c[5,6] and sub-nodes

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Add LPI2C[5,6] and the gpio expander subnodes.
Since we are at here, also add the alias for all lpi2c and gpio nodes.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts | 69 +++++++++++++++++++++++
 1 file changed, 69 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
index 5101cd171e09..6086cb7fa5a0 100644
--- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
@@ -22,6 +22,19 @@ / {
 	compatible = "fsl,imx95-19x19-evk", "fsl,imx95";
 
 	aliases {
+		gpio0 = &gpio1;
+		gpio1 = &gpio2;
+		gpio2 = &gpio3;
+		gpio3 = &gpio4;
+		gpio4 = &gpio5;
+		i2c0 = &lpi2c1;
+		i2c1 = &lpi2c2;
+		i2c2 = &lpi2c3;
+		i2c3 = &lpi2c4;
+		i2c4 = &lpi2c5;
+		i2c5 = &lpi2c6;
+		i2c6 = &lpi2c7;
+		i2c7 = &lpi2c8;
 		mmc0 = &usdhc1;
 		mmc1 = &usdhc2;
 		serial0 = &lpuart1;
@@ -241,6 +254,42 @@ i2c4_gpio_expander_21: gpio@21 {
 	};
 };
 
+&lpi2c5 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_lpi2c5>;
+	status = "okay";
+
+	i2c5_pcal6408: gpio@21 {
+		compatible = "nxp,pcal6408";
+		reg = <0x21>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		vcc-supply = <&reg_3p3v>;
+	};
+};
+
+&lpi2c6 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_lpi2c6>;
+	status = "okay";
+
+	i2c6_pcal6416: gpio@21 {
+		compatible = "nxp,pcal6416";
+		reg = <0x21>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		interrupt-parent = <&gpio4>;
+		interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_pcal6416>;
+		vcc-supply = <&reg_3p3v>;
+	};
+};
+
 &lpi2c7 {
 	clock-frequency = <1000000>;
 	pinctrl-names = "default";
@@ -427,6 +476,20 @@ IMX95_PAD_GPIO_IO31__LPI2C4_SCL			0x40000b9e
 		>;
 	};
 
+	pinctrl_lpi2c5: lpi2c5grp {
+		fsl,pins = <
+			IMX95_PAD_GPIO_IO22__LPI2C5_SDA			0x40000b9e
+			IMX95_PAD_GPIO_IO23__LPI2C5_SCL			0x40000b9e
+		>;
+	};
+
+	pinctrl_lpi2c6: lpi2c6grp {
+		fsl,pins = <
+			IMX95_PAD_GPIO_IO02__LPI2C6_SDA			0x40000b9e
+			IMX95_PAD_GPIO_IO03__LPI2C6_SCL			0x40000b9e
+		>;
+	};
+
 	pinctrl_lpi2c7: lpi2c7grp {
 		fsl,pins = <
 			IMX95_PAD_GPIO_IO08__LPI2C7_SDA			0x40000b9e
@@ -446,6 +509,12 @@ IMX95_PAD_GPIO_IO35__HSIOMIX_TOP_PCIE2_CLKREQ_B		0x4000031e
 		>;
 	};
 
+	pinctrl_pcal6416: pcal6416grp {
+		fsl,pins = <
+			IMX95_PAD_CCM_CLKO3__GPIO4_IO_BIT28			0x31e
+		>;
+	};
+
 	pinctrl_pdm: pdmgrp {
 		fsl,pins = <
 			IMX95_PAD_PDM_CLK__AONMIX_TOP_PDM_CLK				0x31e

-- 
2.37.1

Re: [PATCH v2 7/7] arm64: dts: freescale: imx95-19x19-evk: add lpi2c[5, 6] and sub-nodes

[Alexander Stein]

Hi,

Am Dienstag, 3. September 2024, 09:17:52 CEST schrieb Peng Fan (OSS):
> From: Peng Fan <peng.fan@nxp.com>
> 
> Add LPI2C[5,6] and the gpio expander subnodes.
> Since we are at here, also add the alias for all lpi2c and gpio nodes.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts | 69 +++++++++++++++++++++++
>  1 file changed, 69 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> index 5101cd171e09..6086cb7fa5a0 100644
> --- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> @@ -22,6 +22,19 @@ / {
>  	compatible = "fsl,imx95-19x19-evk", "fsl,imx95";
>  
>  	aliases {
> +		gpio0 = &gpio1;
> +		gpio1 = &gpio2;
> +		gpio2 = &gpio3;
> +		gpio3 = &gpio4;
> +		gpio4 = &gpio5;
> +		i2c0 = &lpi2c1;
> +		i2c1 = &lpi2c2;
> +		i2c2 = &lpi2c3;
> +		i2c3 = &lpi2c4;
> +		i2c4 = &lpi2c5;
> +		i2c5 = &lpi2c6;
> +		i2c6 = &lpi2c7;
> +		i2c7 = &lpi2c8;

This seems to be something for the SoC imx95.dtsi, no?

Best regards,
Alexander

>  		mmc0 = &usdhc1;
>  		mmc1 = &usdhc2;
>  		serial0 = &lpuart1;
> @@ -241,6 +254,42 @@ i2c4_gpio_expander_21: gpio@21 {
>  	};
>  };
>  
> +&lpi2c5 {
> +	clock-frequency = <100000>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_lpi2c5>;
> +	status = "okay";
> +
> +	i2c5_pcal6408: gpio@21 {
> +		compatible = "nxp,pcal6408";
> +		reg = <0x21>;
> +		gpio-controller;
> +		#gpio-cells = <2>;
> +		vcc-supply = <&reg_3p3v>;
> +	};
> +};
> +
> +&lpi2c6 {
> +	clock-frequency = <100000>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_lpi2c6>;
> +	status = "okay";
> +
> +	i2c6_pcal6416: gpio@21 {
> +		compatible = "nxp,pcal6416";
> +		reg = <0x21>;
> +		gpio-controller;
> +		#gpio-cells = <2>;
> +		interrupt-controller;
> +		#interrupt-cells = <2>;
> +		interrupt-parent = <&gpio4>;
> +		interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_pcal6416>;
> +		vcc-supply = <&reg_3p3v>;
> +	};
> +};
> +
>  &lpi2c7 {
>  	clock-frequency = <1000000>;
>  	pinctrl-names = "default";
> @@ -427,6 +476,20 @@ IMX95_PAD_GPIO_IO31__LPI2C4_SCL			0x40000b9e
>  		>;
>  	};
>  
> +	pinctrl_lpi2c5: lpi2c5grp {
> +		fsl,pins = <
> +			IMX95_PAD_GPIO_IO22__LPI2C5_SDA			0x40000b9e
> +			IMX95_PAD_GPIO_IO23__LPI2C5_SCL			0x40000b9e
> +		>;
> +	};
> +
> +	pinctrl_lpi2c6: lpi2c6grp {
> +		fsl,pins = <
> +			IMX95_PAD_GPIO_IO02__LPI2C6_SDA			0x40000b9e
> +			IMX95_PAD_GPIO_IO03__LPI2C6_SCL			0x40000b9e
> +		>;
> +	};
> +
>  	pinctrl_lpi2c7: lpi2c7grp {
>  		fsl,pins = <
>  			IMX95_PAD_GPIO_IO08__LPI2C7_SDA			0x40000b9e
> @@ -446,6 +509,12 @@ IMX95_PAD_GPIO_IO35__HSIOMIX_TOP_PCIE2_CLKREQ_B		0x4000031e
>  		>;
>  	};
>  
> +	pinctrl_pcal6416: pcal6416grp {
> +		fsl,pins = <
> +			IMX95_PAD_CCM_CLKO3__GPIO4_IO_BIT28			0x31e
> +		>;
> +	};
> +
>  	pinctrl_pdm: pdmgrp {
>  		fsl,pins = <
>  			IMX95_PAD_PDM_CLK__AONMIX_TOP_PDM_CLK				0x31e
> 
> 


-- 
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Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/

RE: [PATCH v2 7/7] arm64: dts: freescale: imx95-19x19-evk: add lpi2c[5, 6] and sub-nodes

[Peng Fan]

> Subject: Re: [PATCH v2 7/7] arm64: dts: freescale: imx95-19x19-evk:
> add lpi2c[5, 6] and sub-nodes
> 
> Hi,
> 
> Am Dienstag, 3. September 2024, 09:17:52 CEST schrieb Peng Fan
> (OSS):
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > Add LPI2C[5,6] and the gpio expander subnodes.
> > Since we are at here, also add the alias for all lpi2c and gpio nodes.
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> >  arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts | 69
> > +++++++++++++++++++++++
> >  1 file changed, 69 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> > b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> > index 5101cd171e09..6086cb7fa5a0 100644
> > --- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> > @@ -22,6 +22,19 @@ / {
> >  	compatible = "fsl,imx95-19x19-evk", "fsl,imx95";
> >
> >  	aliases {
> > +		gpio0 = &gpio1;
> > +		gpio1 = &gpio2;
> > +		gpio2 = &gpio3;
> > +		gpio3 = &gpio4;
> > +		gpio4 = &gpio5;
> > +		i2c0 = &lpi2c1;
> > +		i2c1 = &lpi2c2;
> > +		i2c2 = &lpi2c3;
> > +		i2c3 = &lpi2c4;
> > +		i2c4 = &lpi2c5;
> > +		i2c5 = &lpi2c6;
> > +		i2c6 = &lpi2c7;
> > +		i2c7 = &lpi2c8;
> 
> This seems to be something for the SoC imx95.dtsi, no?

No. alias are preferred per board usage.

Regards,
Peng.

RE: [PATCH v2 0/7] arm64: dts: freescale: imx95: add various nodes

[Peng Fan]

Hi Shawn,

> Subject: [PATCH v2 0/7] arm64: dts: freescale: imx95: add various
> nodes

Please see whether this patchset is good for you.

Thanks,
Peng.

> 
> Per scmi binding doc update and i.MX extenstion supported, add the
> nodes in imx95.dtsi.
> Enable cpuidle for A55
> Add anamix temperature thermal zone
> Add lpi2c[5,6] i2c nodes and sub-nodes
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
> Changes in v2:
> - Use generic node name "gpio" for gpio controller in patch 7
> - Link to v1: https://lore.kernel.org/r/20240902-imx95-dts-new-v1-0-
> a1f798f4f746@nxp.com
> 
> ---
> Peng Fan (7):
>       arm64: dts: freescale: imx95: set max-rx-timeout-ms
>       arm64: dts: freescale: imx95: add bbm/misc/syspower scmi nodes
>       arm64: dts: freescale: imx95: update a55 thermal trip points
>       arm64: dts: freescale: imx95: add anamix temperature thermal
> zone and cooling node
>       arm64: dts: freescale: imx95: enable A55 cpuidle
>       arm64: dts: freescale: imx95-19x19-evk: add nxp,ctrl-ids property
>       arm64: dts: freescale: imx95-19x19-evk: add lpi2c[5,6] and sub-
> nodes
> 
>  arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts | 86
> +++++++++++++++++++++++
>  arch/arm64/boot/dts/freescale/imx95.dtsi          | 69
> +++++++++++++++++-
>  2 files changed, 153 insertions(+), 2 deletions(-)
> ---
> base-commit: 985bf40edf4343dcb04c33f58b40b4a85c1776d4
> change-id: 20240902-imx95-dts-new-fbb8ac9fca18
> 
> Best regards,
> --
> Peng Fan <peng.fan@nxp.com>

Re: [PATCH v2 0/7] arm64: dts: freescale: imx95: add various nodes

[Shawn Guo]

On Tue, Sep 03, 2024 at 03:17:45PM +0800, Peng Fan (OSS) wrote:
> Per scmi binding doc update and i.MX extenstion supported, add the nodes
> in imx95.dtsi.
> Enable cpuidle for A55
> Add anamix temperature thermal zone
> Add lpi2c[5,6] i2c nodes and sub-nodes
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
> Changes in v2:
> - Use generic node name "gpio" for gpio controller in patch 7
> - Link to v1: https://lore.kernel.org/r/20240902-imx95-dts-new-v1-0-a1f798f4f746@nxp.com
> 
> ---
> Peng Fan (7):
>       arm64: dts: freescale: imx95: set max-rx-timeout-ms
>       arm64: dts: freescale: imx95: add bbm/misc/syspower scmi nodes
>       arm64: dts: freescale: imx95: update a55 thermal trip points
>       arm64: dts: freescale: imx95: add anamix temperature thermal zone and cooling node
>       arm64: dts: freescale: imx95: enable A55 cpuidle
>       arm64: dts: freescale: imx95-19x19-evk: add nxp,ctrl-ids property
>       arm64: dts: freescale: imx95-19x19-evk: add lpi2c[5,6] and sub-nodes

May I ask you to drop "freescale: " from the prefix?  "imx95: " is good
enough to tell the scope.

Shawn