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[83.233.6.197]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-53a15211a3esm166190e87.272.2024.10.18.02.12.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Oct 2024 02:12:40 -0700 (PDT) Date: Fri, 18 Oct 2024 11:12:38 +0200 From: Marcus Folkesson To: Krzysztof Kozlowski Cc: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v5 2/2] dt-bindings: mtd: davinci: convert to yaml Message-ID: References: <20241008-ondie-v5-0-041ca4ccc5ee@gmail.com> <20241008-ondie-v5-2-041ca4ccc5ee@gmail.com> <4u5iv24enpz46funfvbo2aggx6yiqxy7beaa3ldt5ai5wf65kl@bnlm4eyuwkui> <10a0efab-83a8-4168-993a-c4482a568c96@kernel.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="0wxXT3JH117vcORs" Content-Disposition: inline In-Reply-To: <10a0efab-83a8-4168-993a-c4482a568c96@kernel.org> --0wxXT3JH117vcORs Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Kryzstof, On Mon, Oct 14, 2024 at 08:08:15PM +0200, Krzysztof Kozlowski wrote: > On 14/10/2024 14:04, Marcus Folkesson wrote: [...] > >=20 > > reg: > > items: > > - description: | > > Contains 2 offset/length values: > > - offset and length for the access window. > > - offset and length for accessing the AEMIF > > control registers. >=20 > You need to list two items, so two times "- description:" > (and drop redundant parts like "offset and length" because this cannot > be anything else) >=20 > and this should be pointed out by testing, so open the example and try > to explain why it is so different than expected. >=20 >=20 > Unless, it is supposed to be one item... but how do I know? You are > looking at the device and its driver, not me. Ok, thank you. I will go for: reg: items: - description: Access window - description: AEMIF control registers [...] > >=20 > > But I'm getting the following errors: > >=20 > > ``` > > .../ti,davinci-nand.example.dtb: nand-controller@2000000,0: #size-cells= : 0 was expected > > from schema $id: http://devicetree.org/schemas/mtd/ti,davinci-n= and.yaml# > > .../ti,davinci-nand.example.dtb: nand-controller@2000000,0: reg: [[0, 3= 3554432], [33554432, 1], [0, 32768]] is too long > > from schema $id: http://devicetree.org/schemas/mtd/ti,davinci-n= and.yaml# > > .../ti,davinci-nand.example.dtb: nand-controller@2000000,0: Unevaluated= properties are not allowed ('reg' was unexpected) > > from schema $id: http://devicetree.org/schemas/mtd/ti,davinci-n= and.yaml# > > ``` >=20 > Well, obviously. That's the point of the schema. The example part is > embedded in node with some address/size cells, which might fit your case > or might not. >=20 > >=20 > > The resuling 'ti,davinci-nand.example.dts' contains the following: > >=20 > > ``` > > example-0 { > > #address-cells =3D <1>; > > #size-cells =3D <1>; > >=20 > > nand-controller@2000000,0 { > > compatible =3D "ti,davinci-nand"; > > #address-cells =3D <1>; > > #size-cells =3D <1>; > > reg =3D <0 0x02000000 0x02000000 > > 1 0x00000000 0x00008000>; > > ``` > > =20 > >=20 > > How do I set #address-cells in example-0 to 2? > > I guess that is the problem. >=20 >=20 >=20 > You just set it... There are dozens/hundreds of schemas doing it, what > is exactly a problem here? I think I will solve the problem by including the parent nodes. What do you think about this? examples: - | aemif: aemif@68000000 { compatible =3D "ti,da850-aemif"; #address-cells =3D <2>; #size-cells =3D <1>; reg =3D <0x68000000 0x00008000>; ranges =3D <0 0 0x60000000 0x08000000 1 0 0x68000000 0x00008000>; clocks =3D <&psc0 3>; clock-names =3D "aemif"; clock-ranges; cs3 { #address-cells =3D <2>; #size-cells =3D <1>; clock-ranges; ranges; ti,cs-chipselect =3D <3>; nand-controller@2000000,0 { compatible =3D "ti,davinci-nand"; #address-cells =3D <1>; #size-cells =3D <0>; reg =3D <0 0x02000000 0x02000000 1 0x00000000 0x00008000>; ti,davinci-chipselect =3D <1>; ti,davinci-mask-ale =3D <0>; ti,davinci-mask-cle =3D <0>; ti,davinci-mask-chipsel =3D <0>; ti,davinci-nand-buswidth =3D <16>; ti,davinci-ecc-mode =3D "hw"; ti,davinci-ecc-bits =3D <4>; ti,davinci-nand-use-bbt; partitions { compatible =3D "fixed-partitions"; #address-cells =3D <1>; #size-cells =3D <1>; partition@0 { label =3D "u-boot env"; reg =3D <0 0x020000>; }; }; }; }; }; >=20 > Best regards, > Krzysztof >=20 Best regards, Marcus Folkesson --0wxXT3JH117vcORs Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAEBCAAdFiEEBVGi6LZstU1kwSxliIBOb1ldUjIFAmcSJoEACgkQiIBOb1ld UjJZTQ//bDKxPptc8++o//upFWgxG9oOifAmrLAXKb3+6XFdoefvQ4WiMycu0tV1 ggCzxO0JNudz0TUzmTEC3Z09NEM1uyeUhhjo81EPOxye7xhO6MOw5UhOy8SKNNQF 1gQ5lsfva6YMnAL4TFPlSkCST2y/GpXnzUQs+l/enkVWqUcSCMx1VS/kJugCkYcQ yZxDmjF1dUJZuf0vSlp7VydlL/hR/ahGmFQh+nx1cuHcnXaX421Ds0WwlfyZOjAW tr4Kdp2rJfnWsas9iG5HuQna1WHAAKGtCeoFXffGfUmm5x/bs8FL1s8AfizHUsTu r2vR7J8A+AbkbfHEnhweI/Py1SwgfnPxpeHxl05TpWA5ii90pDMZdUzwVPmauwrT jE9skZ9lp+PNmgWeuszBdpdk6/yYalq8nahFeQvjoGCouybpE4PjoqIP9Xzpybs9 iQ3b/WtiItlT4vIUVaPUB+0TLhvgbNnWWZGuTZI+F7TD04A0OdX7MdOPPUMoFJKc 3enTiSra1+YW0QKOE+JA5vNafTFUqgsUQ7a3n6g/hgaS1LMbHnnzUA+NxWOQhIBA aJJLVOo1791oefpglKaCTVkah7bTcY+VTZ+lnosj7EYcDNYshkl+OXajSSUPxZZQ L3Rg28GK1ctGb0CiAV2BkQs68MteVD0vypim24htHs1umEbPgkU= =sofE -----END PGP SIGNATURE----- --0wxXT3JH117vcORs--