From: Johan Hovold <johan@kernel.org>
To: Qiang Yu <quic_qianyu@quicinc.com>
Cc: manivannan.sadhasivam@linaro.org, vkoul@kernel.org,
kishon@kernel.org, robh@kernel.org, andersson@kernel.org,
konradybcio@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
mturquette@baylibre.com, sboyd@kernel.org, abel.vesa@linaro.org,
quic_msarkar@quicinc.com, quic_devipriy@quicinc.com,
dmitry.baryshkov@linaro.org, kw@linux.com, lpieralisi@kernel.org,
neil.armstrong@linaro.org, linux-arm-msm@vger.kernel.org,
linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org, johan+linaro@kernel.org
Subject: Re: [PATCH v7 7/7] arm64: dts: qcom: x1e80100: Add support for PCIe3 on x1e80100
Date: Fri, 18 Oct 2024 16:08:04 +0200 [thread overview]
Message-ID: <ZxJrxDLSoQpYNtYC@hovoldconsulting.com> (raw)
In-Reply-To: <20241017030412.265000-8-quic_qianyu@quicinc.com>
On Wed, Oct 16, 2024 at 08:04:12PM -0700, Qiang Yu wrote:
> Describe PCIe3 controller and PHY. Also add required system resources like
> regulators, clocks, interrupts and registers configuration for PCIe3.
>
> Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Looks good to me now:
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
next prev parent reply other threads:[~2024-10-18 14:07 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-17 3:04 [PATCH v7 0/7] Add support for PCIe3 on x1e80100 Qiang Yu
2024-10-17 3:04 ` [PATCH v7 1/7] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the X1E80100 QMP PCIe PHY Gen4 x8 Qiang Yu
2024-10-17 3:04 ` [PATCH v7 2/7] dt-bindings: PCI: qcom: Move OPP table to qcom,pcie-common.yaml Qiang Yu
2024-10-17 3:04 ` [PATCH v7 3/7] dt-bindings: PCI: qcom,pcie-x1e80100: Add 'global' interrupt Qiang Yu
2024-10-17 7:58 ` Krzysztof Kozlowski
2024-10-17 3:04 ` [PATCH v7 4/7] phy: qcom: qmp: Add phy register and clk setting for x1e80100 PCIe3 Qiang Yu
2024-10-17 3:04 ` [PATCH v7 5/7] PCI: qcom: Remove BDF2SID mapping config for SC8280X family SoC Qiang Yu
2024-10-18 13:51 ` Johan Hovold
2024-10-24 6:39 ` Qiang Yu
2024-10-17 3:04 ` [PATCH v7 6/7] PCI: qcom: Disable ASPM L0s and remove BDF2SID mapping config for X1E80100 SoC Qiang Yu
2024-10-18 14:06 ` Johan Hovold
2024-10-24 6:42 ` Qiang Yu
2024-10-30 5:54 ` Qiang Yu
2024-10-30 7:15 ` Johan Hovold
2024-10-30 7:18 ` Manivannan Sadhasivam
2024-10-30 7:42 ` Johan Hovold
2024-10-30 7:56 ` Qiang Yu
2024-10-18 14:25 ` Bjorn Andersson
2024-10-24 6:46 ` Qiang Yu
2024-10-17 3:04 ` [PATCH v7 7/7] arm64: dts: qcom: x1e80100: Add support for PCIe3 on x1e80100 Qiang Yu
2024-10-18 14:08 ` Johan Hovold [this message]
2024-10-17 15:35 ` (subset) [PATCH v7 0/7] " Vinod Koul
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