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[95.239.0.46]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9a912d8381sm313843166b.45.2024.10.22.02.59.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Oct 2024 02:59:50 -0700 (PDT) From: Andrea della Porta X-Google-Original-From: Andrea della Porta Date: Tue, 22 Oct 2024 12:00:12 +0200 To: Krzysztof Kozlowski Cc: Andrea della Porta , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Broadcom internal kernel review list , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , Linus Walleij , Catalin Marinas , Will Deacon , Bartosz Golaszewski , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Saravana Kannan , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-gpio@vger.kernel.org, Masahiro Yamada , Stefan Wahren , Herve Codina , Luca Ceresoli , Thomas Petazzoni , Andrew Lunn Subject: Re: [PATCH v2 04/14] dt-bindings: misc: Add device specific bindings for RaspberryPi RP1 Message-ID: References: <3141e3e7898c1538ea658487923d3446b3d7fd0c.1728300189.git.andrea.porta@suse.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Hi Krzysztof, On 08:26 Tue 08 Oct , Krzysztof Kozlowski wrote: > On Mon, Oct 07, 2024 at 02:39:47PM +0200, Andrea della Porta wrote: > > The RP1 is a MFD that exposes its peripherals through PCI BARs. This > > schema is intended as minimal support for the clock generator and > > gpio controller peripherals which are accessible through BAR1. > > > > Signed-off-by: Andrea della Porta > > --- > > .../devicetree/bindings/misc/pci1de4,1.yaml | 110 ++++++++++++++++++ > > MAINTAINERS | 1 + > > 2 files changed, 111 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/misc/pci1de4,1.yaml > > > > diff --git a/Documentation/devicetree/bindings/misc/pci1de4,1.yaml b/Documentation/devicetree/bindings/misc/pci1de4,1.yaml > > new file mode 100644 > > index 000000000000..3f099b16e672 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/misc/pci1de4,1.yaml > > @@ -0,0 +1,110 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/misc/pci1de4,1.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: RaspberryPi RP1 MFD PCI device > > + > > +maintainers: > > + - Andrea della Porta > > + > > +description: > > + The RaspberryPi RP1 is a PCI multi function device containing > > + peripherals ranging from Ethernet to USB controller, I2C, SPI > > + and others. > > + The peripherals are accessed by addressing the PCI BAR1 region. > > + > > +allOf: > > + - $ref: /schemas/pci/pci-ep-bus.yaml > > + > > +properties: > > + compatible: > > + additionalItems: true > > Why is this true? This is final schema, not a "common" part. The 'compatible' property I've specified in rp1.dtso is not strictly necessary since it will be added automatically during the dynamic device node creation by the OF subsystem, and will be something like this: "pci1de4,1", "pciclass,0200000", "pciclass,0200" I've redefined simply as "pci1de4,1" in the dtso so it can be validated against the relative binding schema, and I opted for a shorter name since the RP1 is not really a simple ethernet controller as advertised by the config space (pciclass=2). The schema definition allows for the "relaxed" extended version, shoudl someone want to use it for resemblance with the dynamically create compatibel string. > > > + maxItems: 3 > > + items: > > + - const: pci1de4,1 > > + > > +patternProperties: > > + "^pci-ep-bus@[0-2]$": > > + $ref: '#/$defs/bar-bus' > > + description: > > + The bus on which the peripherals are attached, which is addressable > > + through the BAR. > > + > > +unevaluatedProperties: false > > + > > +$defs: > > + bar-bus: > > + $ref: /schemas/pci/pci-ep-bus.yaml#/$defs/pci-ep-bus > > + unevaluatedProperties: false > > + > > + properties: > > + "#interrupt-cells": > > + const: 2 > > + description: > > + Specifies respectively the interrupt number and flags as defined > > + in include/dt-bindings/interrupt-controller/irq.h. > > + > > + interrupt-controller: true > > + > > + interrupt-parent: > > + description: > > + Must be the phandle of this 'pci-ep-bus' node. It will trigger > > + PCI interrupts on behalf of peripheral generated interrupts. > > + > > + patternProperties: > > + "^clocks(@[0-9a-f]+)?$": > > Why @ is optional? Your device is fixed, not flexible. Right. Many thanks, Andrea > > Best regards, > Krzysztof >