* [PATCH v5 0/4] Add iMX91 clock driver support
@ 2024-10-17 22:51 Pengfei Li
2024-10-17 22:51 ` [PATCH v5 1/4] clk: imx93: Move IMX93_CLK_END macro to clk driver Pengfei Li
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Pengfei Li @ 2024-10-17 22:51 UTC (permalink / raw)
To: krzk+dt, robh, abelvesa, mturquette, sboyd, conor+dt, shawnguo,
s.hauer, ping.bai, ye.li, peng.fan, aisheng.dong, frank.li
Cc: kernel, festevam, linux-clk, imx, devicetree, linux-arm-kernel,
linux-kernel
This patch set is to add some new clocks to binding header and driver.
IMX93_CLK_END was previously defined in imx93-clock.h to indicate
the number of clocks. However, it is not part of the ABI. For starters
it does no really appear in DTS. But what's more important - new clocks
are described later, which contradicts this define in binding header.
So move this macro to clock driver.
---
Change for v5:
- update commit message for patch 4: 'clk: imx: add i.MX91 clk'
- link to v4: https://lore.kernel.org/all/20241014182438.732444-1-pengfei.li_1@nxp.com/
Pengfei Li (4):
clk: imx93: Move IMX93_CLK_END macro to clk driver
dt-bindings: clock: imx93: Drop IMX93_CLK_END macro definition
dt-bindings: clock: Add i.MX91 clock support
clk: imx: add i.MX91 clk
.../bindings/clock/imx93-clock.yaml | 1 +
drivers/clk/imx/clk-imx93.c | 64 ++++++++++++-------
include/dt-bindings/clock/imx93-clock.h | 6 +-
3 files changed, 47 insertions(+), 24 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v5 1/4] clk: imx93: Move IMX93_CLK_END macro to clk driver
2024-10-17 22:51 [PATCH v5 0/4] Add iMX91 clock driver support Pengfei Li
@ 2024-10-17 22:51 ` Pengfei Li
2024-10-17 22:51 ` [PATCH v5 2/4] dt-bindings: clock: imx93: Drop IMX93_CLK_END macro definition Pengfei Li
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Pengfei Li @ 2024-10-17 22:51 UTC (permalink / raw)
To: krzk+dt, robh, abelvesa, mturquette, sboyd, conor+dt, shawnguo,
s.hauer, ping.bai, ye.li, peng.fan, aisheng.dong, frank.li
Cc: kernel, festevam, linux-clk, imx, devicetree, linux-arm-kernel,
linux-kernel
IMX93_CLK_END was previously defined in imx93-clock.h to indicate
the number of clocks. However, it is not part of the ABI. For starters
it does no really appear in DTS. But what's more important - new clocks
are described later, which contradicts this define in binding header.
So move this macro to clock driver.
Signed-off-by: Pengfei Li <pengfei.li_1@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
---
drivers/clk/imx/clk-imx93.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
index c6a9bc8ecc1f..c8b65146e76e 100644
--- a/drivers/clk/imx/clk-imx93.c
+++ b/drivers/clk/imx/clk-imx93.c
@@ -15,6 +15,8 @@
#include "clk.h"
+#define IMX93_CLK_END 202
+
enum clk_sel {
LOW_SPEED_IO_SEL,
NON_IO_SEL,
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v5 2/4] dt-bindings: clock: imx93: Drop IMX93_CLK_END macro definition
2024-10-17 22:51 [PATCH v5 0/4] Add iMX91 clock driver support Pengfei Li
2024-10-17 22:51 ` [PATCH v5 1/4] clk: imx93: Move IMX93_CLK_END macro to clk driver Pengfei Li
@ 2024-10-17 22:51 ` Pengfei Li
2024-10-17 22:51 ` [PATCH v5 3/4] dt-bindings: clock: Add i.MX91 clock support Pengfei Li
2024-10-17 22:51 ` [PATCH v5 4/4] clk: imx: add i.MX91 clk Pengfei Li
3 siblings, 0 replies; 6+ messages in thread
From: Pengfei Li @ 2024-10-17 22:51 UTC (permalink / raw)
To: krzk+dt, robh, abelvesa, mturquette, sboyd, conor+dt, shawnguo,
s.hauer, ping.bai, ye.li, peng.fan, aisheng.dong, frank.li
Cc: kernel, festevam, linux-clk, imx, devicetree, linux-arm-kernel,
linux-kernel
IMX93_CLK_END should be dropped as it is not part of the ABI.
Signed-off-by: Pengfei Li <pengfei.li_1@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
include/dt-bindings/clock/imx93-clock.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/dt-bindings/clock/imx93-clock.h b/include/dt-bindings/clock/imx93-clock.h
index 787c9e74dc96..a1d0b326bb6b 100644
--- a/include/dt-bindings/clock/imx93-clock.h
+++ b/include/dt-bindings/clock/imx93-clock.h
@@ -204,6 +204,5 @@
#define IMX93_CLK_A55_SEL 199
#define IMX93_CLK_A55_CORE 200
#define IMX93_CLK_PDM_IPG 201
-#define IMX93_CLK_END 202
#endif
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v5 3/4] dt-bindings: clock: Add i.MX91 clock support
2024-10-17 22:51 [PATCH v5 0/4] Add iMX91 clock driver support Pengfei Li
2024-10-17 22:51 ` [PATCH v5 1/4] clk: imx93: Move IMX93_CLK_END macro to clk driver Pengfei Li
2024-10-17 22:51 ` [PATCH v5 2/4] dt-bindings: clock: imx93: Drop IMX93_CLK_END macro definition Pengfei Li
@ 2024-10-17 22:51 ` Pengfei Li
2024-10-17 22:51 ` [PATCH v5 4/4] clk: imx: add i.MX91 clk Pengfei Li
3 siblings, 0 replies; 6+ messages in thread
From: Pengfei Li @ 2024-10-17 22:51 UTC (permalink / raw)
To: krzk+dt, robh, abelvesa, mturquette, sboyd, conor+dt, shawnguo,
s.hauer, ping.bai, ye.li, peng.fan, aisheng.dong, frank.li
Cc: kernel, festevam, linux-clk, imx, devicetree, linux-arm-kernel,
linux-kernel
i.MX91 has similar Clock Control Module(CCM) design as i.MX93, only add
few new clock compared to i.MX93.
Add a new compatible string and some new clocks for i.MX91.
Signed-off-by: Pengfei Li <pengfei.li_1@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Documentation/devicetree/bindings/clock/imx93-clock.yaml | 1 +
include/dt-bindings/clock/imx93-clock.h | 5 +++++
2 files changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/imx93-clock.yaml b/Documentation/devicetree/bindings/clock/imx93-clock.yaml
index ccb53c6b96c1..98c0800732ef 100644
--- a/Documentation/devicetree/bindings/clock/imx93-clock.yaml
+++ b/Documentation/devicetree/bindings/clock/imx93-clock.yaml
@@ -16,6 +16,7 @@ description: |
properties:
compatible:
enum:
+ - fsl,imx91-ccm
- fsl,imx93-ccm
reg:
diff --git a/include/dt-bindings/clock/imx93-clock.h b/include/dt-bindings/clock/imx93-clock.h
index a1d0b326bb6b..6c685067288b 100644
--- a/include/dt-bindings/clock/imx93-clock.h
+++ b/include/dt-bindings/clock/imx93-clock.h
@@ -204,5 +204,10 @@
#define IMX93_CLK_A55_SEL 199
#define IMX93_CLK_A55_CORE 200
#define IMX93_CLK_PDM_IPG 201
+#define IMX91_CLK_ENET1_QOS_TSN 202
+#define IMX91_CLK_ENET_TIMER 203
+#define IMX91_CLK_ENET2_REGULAR 204
+#define IMX91_CLK_ENET2_REGULAR_GATE 205
+#define IMX91_CLK_ENET1_QOS_TSN_GATE 206
#endif
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v5 4/4] clk: imx: add i.MX91 clk
2024-10-17 22:51 [PATCH v5 0/4] Add iMX91 clock driver support Pengfei Li
` (2 preceding siblings ...)
2024-10-17 22:51 ` [PATCH v5 3/4] dt-bindings: clock: Add i.MX91 clock support Pengfei Li
@ 2024-10-17 22:51 ` Pengfei Li
2024-10-22 14:27 ` Abel Vesa
3 siblings, 1 reply; 6+ messages in thread
From: Pengfei Li @ 2024-10-17 22:51 UTC (permalink / raw)
To: krzk+dt, robh, abelvesa, mturquette, sboyd, conor+dt, shawnguo,
s.hauer, ping.bai, ye.li, peng.fan, aisheng.dong, frank.li
Cc: kernel, festevam, linux-clk, imx, devicetree, linux-arm-kernel,
linux-kernel
Reuse i.MX93 clk driver for i.MX91, because i.MX91 reuses the
Clock Control Module from i.MX93, with only a few clocks removed
and a few clocks added.
For clocks specific to i.MX93 use PLAT_IMX93 to flag them, for
clocks specific to i.MX91, use PLAT_IMX91 to flag them. Others
are shared by both.
Signed-off-by: Pengfei Li <pengfei.li_1@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
---
drivers/clk/imx/clk-imx93.c | 64 +++++++++++++++++++++++--------------
1 file changed, 40 insertions(+), 24 deletions(-)
diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
index c8b65146e76e..4d1123f51903 100644
--- a/drivers/clk/imx/clk-imx93.c
+++ b/drivers/clk/imx/clk-imx93.c
@@ -15,7 +15,11 @@
#include "clk.h"
-#define IMX93_CLK_END 202
+
+#define IMX93_CLK_END 207
+
+#define PLAT_IMX93 BIT(0)
+#define PLAT_IMX91 BIT(1)
enum clk_sel {
LOW_SPEED_IO_SEL,
@@ -55,6 +59,7 @@ static const struct imx93_clk_root {
u32 off;
enum clk_sel sel;
unsigned long flags;
+ unsigned long plat;
} root_array[] = {
/* a55/m33/bus critical clk for system run */
{ IMX93_CLK_A55_PERIPH, "a55_periph_root", 0x0000, FAST_SEL, CLK_IS_CRITICAL },
@@ -65,7 +70,7 @@ static const struct imx93_clk_root {
{ IMX93_CLK_BUS_AON, "bus_aon_root", 0x0300, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL },
{ IMX93_CLK_WAKEUP_AXI, "wakeup_axi_root", 0x0380, FAST_SEL, CLK_IS_CRITICAL },
{ IMX93_CLK_SWO_TRACE, "swo_trace_root", 0x0400, LOW_SPEED_IO_SEL, },
- { IMX93_CLK_M33_SYSTICK, "m33_systick_root", 0x0480, LOW_SPEED_IO_SEL, },
+ { IMX93_CLK_M33_SYSTICK, "m33_systick_root", 0x0480, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, },
{ IMX93_CLK_FLEXIO1, "flexio1_root", 0x0500, LOW_SPEED_IO_SEL, },
{ IMX93_CLK_FLEXIO2, "flexio2_root", 0x0580, LOW_SPEED_IO_SEL, },
{ IMX93_CLK_LPTMR1, "lptmr1_root", 0x0700, LOW_SPEED_IO_SEL, },
@@ -122,15 +127,15 @@ static const struct imx93_clk_root {
{ IMX93_CLK_HSIO_ACSCAN_80M, "hsio_acscan_80m_root", 0x1f80, LOW_SPEED_IO_SEL, },
{ IMX93_CLK_HSIO_ACSCAN_480M, "hsio_acscan_480m_root", 0x2000, MISC_SEL, },
{ IMX93_CLK_NIC_AXI, "nic_axi_root", 0x2080, FAST_SEL, CLK_IS_CRITICAL, },
- { IMX93_CLK_ML_APB, "ml_apb_root", 0x2180, LOW_SPEED_IO_SEL, },
- { IMX93_CLK_ML, "ml_root", 0x2200, FAST_SEL, },
+ { IMX93_CLK_ML_APB, "ml_apb_root", 0x2180, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, },
+ { IMX93_CLK_ML, "ml_root", 0x2200, FAST_SEL, 0, PLAT_IMX93, },
{ IMX93_CLK_MEDIA_AXI, "media_axi_root", 0x2280, FAST_SEL, },
{ IMX93_CLK_MEDIA_APB, "media_apb_root", 0x2300, LOW_SPEED_IO_SEL, },
- { IMX93_CLK_MEDIA_LDB, "media_ldb_root", 0x2380, VIDEO_SEL, },
+ { IMX93_CLK_MEDIA_LDB, "media_ldb_root", 0x2380, VIDEO_SEL, 0, PLAT_IMX93, },
{ IMX93_CLK_MEDIA_DISP_PIX, "media_disp_pix_root", 0x2400, VIDEO_SEL, },
{ IMX93_CLK_CAM_PIX, "cam_pix_root", 0x2480, VIDEO_SEL, },
- { IMX93_CLK_MIPI_TEST_BYTE, "mipi_test_byte_root", 0x2500, VIDEO_SEL, },
- { IMX93_CLK_MIPI_PHY_CFG, "mipi_phy_cfg_root", 0x2580, VIDEO_SEL, },
+ { IMX93_CLK_MIPI_TEST_BYTE, "mipi_test_byte_root", 0x2500, VIDEO_SEL, 0, PLAT_IMX93, },
+ { IMX93_CLK_MIPI_PHY_CFG, "mipi_phy_cfg_root", 0x2580, VIDEO_SEL, 0, PLAT_IMX93, },
{ IMX93_CLK_ADC, "adc_root", 0x2700, LOW_SPEED_IO_SEL, },
{ IMX93_CLK_PDM, "pdm_root", 0x2780, AUDIO_SEL, },
{ IMX93_CLK_TSTMR1, "tstmr1_root", 0x2800, LOW_SPEED_IO_SEL, },
@@ -139,13 +144,16 @@ static const struct imx93_clk_root {
{ IMX93_CLK_MQS2, "mqs2_root", 0x2980, AUDIO_SEL, },
{ IMX93_CLK_AUDIO_XCVR, "audio_xcvr_root", 0x2a00, NON_IO_SEL, },
{ IMX93_CLK_SPDIF, "spdif_root", 0x2a80, AUDIO_SEL, },
- { IMX93_CLK_ENET, "enet_root", 0x2b00, NON_IO_SEL, },
- { IMX93_CLK_ENET_TIMER1, "enet_timer1_root", 0x2b80, LOW_SPEED_IO_SEL, },
- { IMX93_CLK_ENET_TIMER2, "enet_timer2_root", 0x2c00, LOW_SPEED_IO_SEL, },
- { IMX93_CLK_ENET_REF, "enet_ref_root", 0x2c80, NON_IO_SEL, },
- { IMX93_CLK_ENET_REF_PHY, "enet_ref_phy_root", 0x2d00, LOW_SPEED_IO_SEL, },
- { IMX93_CLK_I3C1_SLOW, "i3c1_slow_root", 0x2d80, LOW_SPEED_IO_SEL, },
- { IMX93_CLK_I3C2_SLOW, "i3c2_slow_root", 0x2e00, LOW_SPEED_IO_SEL, },
+ { IMX93_CLK_ENET, "enet_root", 0x2b00, NON_IO_SEL, 0, PLAT_IMX93, },
+ { IMX93_CLK_ENET_TIMER1, "enet_timer1_root", 0x2b80, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, },
+ { IMX93_CLK_ENET_TIMER2, "enet_timer2_root", 0x2c00, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, },
+ { IMX93_CLK_ENET_REF, "enet_ref_root", 0x2c80, NON_IO_SEL, 0, PLAT_IMX93, },
+ { IMX93_CLK_ENET_REF_PHY, "enet_ref_phy_root", 0x2d00, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, },
+ { IMX91_CLK_ENET1_QOS_TSN, "enet1_qos_tsn_root", 0x2b00, NON_IO_SEL, 0, PLAT_IMX91, },
+ { IMX91_CLK_ENET_TIMER, "enet_timer_root", 0x2b80, LOW_SPEED_IO_SEL, 0, PLAT_IMX91, },
+ { IMX91_CLK_ENET2_REGULAR, "enet2_regular_root", 0x2c80, NON_IO_SEL, 0, PLAT_IMX91, },
+ { IMX93_CLK_I3C1_SLOW, "i3c1_slow_root", 0x2d80, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, },
+ { IMX93_CLK_I3C2_SLOW, "i3c2_slow_root", 0x2e00, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, },
{ IMX93_CLK_USB_PHY_BURUNIN, "usb_phy_root", 0x2e80, LOW_SPEED_IO_SEL, },
{ IMX93_CLK_PAL_CAME_SCAN, "pal_came_scan_root", 0x2f00, MISC_SEL, }
};
@@ -157,6 +165,7 @@ static const struct imx93_clk_ccgr {
u32 off;
unsigned long flags;
u32 *shared_count;
+ unsigned long plat;
} ccgr_array[] = {
{ IMX93_CLK_A55_GATE, "a55_alt", "a55_alt_root", 0x8000, },
/* M33 critical clk for system run */
@@ -246,8 +255,10 @@ static const struct imx93_clk_ccgr {
{ IMX93_CLK_AUD_XCVR_GATE, "aud_xcvr", "audio_xcvr_root", 0x9b80, },
{ IMX93_CLK_SPDIF_GATE, "spdif", "spdif_root", 0x9c00, },
{ IMX93_CLK_HSIO_32K_GATE, "hsio_32k", "osc_32k", 0x9dc0, },
- { IMX93_CLK_ENET1_GATE, "enet1", "wakeup_axi_root", 0x9e00, },
- { IMX93_CLK_ENET_QOS_GATE, "enet_qos", "wakeup_axi_root", 0x9e40, },
+ { IMX93_CLK_ENET1_GATE, "enet1", "wakeup_axi_root", 0x9e00, 0, NULL, PLAT_IMX93, },
+ { IMX93_CLK_ENET_QOS_GATE, "enet_qos", "wakeup_axi_root", 0x9e40, 0, NULL, PLAT_IMX93, },
+ { IMX91_CLK_ENET2_REGULAR_GATE, "enet2_regular", "wakeup_axi_root", 0x9e00, 0, NULL, PLAT_IMX91, },
+ { IMX91_CLK_ENET1_QOS_TSN_GATE, "enet1_qos_tsn", "wakeup_axi_root", 0x9e40, 0, NULL, PLAT_IMX91, },
/* Critical because clk accessed during CPU idle */
{ IMX93_CLK_SYS_CNT_GATE, "sys_cnt", "osc_24m", 0x9e80, CLK_IS_CRITICAL},
{ IMX93_CLK_TSTMR1_GATE, "tstmr1", "bus_aon_root", 0x9ec0, },
@@ -267,6 +278,7 @@ static int imx93_clocks_probe(struct platform_device *pdev)
const struct imx93_clk_ccgr *ccgr;
void __iomem *base, *anatop_base;
int i, ret;
+ const unsigned long plat = (unsigned long)device_get_match_data(&pdev->dev);
clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws,
IMX93_CLK_END), GFP_KERNEL);
@@ -316,17 +328,20 @@ static int imx93_clocks_probe(struct platform_device *pdev)
for (i = 0; i < ARRAY_SIZE(root_array); i++) {
root = &root_array[i];
- clks[root->clk] = imx93_clk_composite_flags(root->name,
- parent_names[root->sel],
- 4, base + root->off, 3,
- root->flags);
+ if (!root->plat || root->plat & plat)
+ clks[root->clk] = imx93_clk_composite_flags(root->name,
+ parent_names[root->sel],
+ 4, base + root->off, 3,
+ root->flags);
}
for (i = 0; i < ARRAY_SIZE(ccgr_array); i++) {
ccgr = &ccgr_array[i];
- clks[ccgr->clk] = imx93_clk_gate(NULL, ccgr->name, ccgr->parent_name,
- ccgr->flags, base + ccgr->off, 0, 1, 1, 3,
- ccgr->shared_count);
+ if (!ccgr->plat || ccgr->plat & plat)
+ clks[ccgr->clk] = imx93_clk_gate(NULL,
+ ccgr->name, ccgr->parent_name,
+ ccgr->flags, base + ccgr->off, 0, 1, 1, 3,
+ ccgr->shared_count);
}
clks[IMX93_CLK_A55_SEL] = imx_clk_hw_mux2("a55_sel", base + 0x4820, 0, 1, a55_core_sels,
@@ -356,7 +371,8 @@ static int imx93_clocks_probe(struct platform_device *pdev)
}
static const struct of_device_id imx93_clk_of_match[] = {
- { .compatible = "fsl,imx93-ccm" },
+ { .compatible = "fsl,imx93-ccm", .data = (void *)PLAT_IMX93 },
+ { .compatible = "fsl,imx91-ccm", .data = (void *)PLAT_IMX91 },
{ /* Sentinel */ },
};
MODULE_DEVICE_TABLE(of, imx93_clk_of_match);
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v5 4/4] clk: imx: add i.MX91 clk
2024-10-17 22:51 ` [PATCH v5 4/4] clk: imx: add i.MX91 clk Pengfei Li
@ 2024-10-22 14:27 ` Abel Vesa
0 siblings, 0 replies; 6+ messages in thread
From: Abel Vesa @ 2024-10-22 14:27 UTC (permalink / raw)
To: Pengfei Li
Cc: krzk+dt, robh, abelvesa, mturquette, sboyd, conor+dt, shawnguo,
s.hauer, ping.bai, ye.li, peng.fan, aisheng.dong, frank.li,
kernel, festevam, linux-clk, imx, devicetree, linux-arm-kernel,
linux-kernel
On 24-10-17 15:51:37, Pengfei Li wrote:
> Reuse i.MX93 clk driver for i.MX91, because i.MX91 reuses the
> Clock Control Module from i.MX93, with only a few clocks removed
> and a few clocks added.
>
> For clocks specific to i.MX93 use PLAT_IMX93 to flag them, for
> clocks specific to i.MX91, use PLAT_IMX91 to flag them. Others
> are shared by both.
>
> Signed-off-by: Pengfei Li <pengfei.li_1@nxp.com>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>
> ---
> drivers/clk/imx/clk-imx93.c | 64 +++++++++++++++++++++++--------------
> 1 file changed, 40 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
> index c8b65146e76e..4d1123f51903 100644
> --- a/drivers/clk/imx/clk-imx93.c
> +++ b/drivers/clk/imx/clk-imx93.c
> @@ -15,7 +15,11 @@
>
> #include "clk.h"
>
> -#define IMX93_CLK_END 202
> +
> +#define IMX93_CLK_END 207
> +
> +#define PLAT_IMX93 BIT(0)
> +#define PLAT_IMX91 BIT(1)
>
> enum clk_sel {
> LOW_SPEED_IO_SEL,
> @@ -55,6 +59,7 @@ static const struct imx93_clk_root {
> u32 off;
> enum clk_sel sel;
> unsigned long flags;
> + unsigned long plat;
> } root_array[] = {
> /* a55/m33/bus critical clk for system run */
> { IMX93_CLK_A55_PERIPH, "a55_periph_root", 0x0000, FAST_SEL, CLK_IS_CRITICAL },
> @@ -65,7 +70,7 @@ static const struct imx93_clk_root {
> { IMX93_CLK_BUS_AON, "bus_aon_root", 0x0300, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL },
> { IMX93_CLK_WAKEUP_AXI, "wakeup_axi_root", 0x0380, FAST_SEL, CLK_IS_CRITICAL },
> { IMX93_CLK_SWO_TRACE, "swo_trace_root", 0x0400, LOW_SPEED_IO_SEL, },
> - { IMX93_CLK_M33_SYSTICK, "m33_systick_root", 0x0480, LOW_SPEED_IO_SEL, },
> + { IMX93_CLK_M33_SYSTICK, "m33_systick_root", 0x0480, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, },
> { IMX93_CLK_FLEXIO1, "flexio1_root", 0x0500, LOW_SPEED_IO_SEL, },
> { IMX93_CLK_FLEXIO2, "flexio2_root", 0x0580, LOW_SPEED_IO_SEL, },
> { IMX93_CLK_LPTMR1, "lptmr1_root", 0x0700, LOW_SPEED_IO_SEL, },
> @@ -122,15 +127,15 @@ static const struct imx93_clk_root {
> { IMX93_CLK_HSIO_ACSCAN_80M, "hsio_acscan_80m_root", 0x1f80, LOW_SPEED_IO_SEL, },
> { IMX93_CLK_HSIO_ACSCAN_480M, "hsio_acscan_480m_root", 0x2000, MISC_SEL, },
> { IMX93_CLK_NIC_AXI, "nic_axi_root", 0x2080, FAST_SEL, CLK_IS_CRITICAL, },
> - { IMX93_CLK_ML_APB, "ml_apb_root", 0x2180, LOW_SPEED_IO_SEL, },
> - { IMX93_CLK_ML, "ml_root", 0x2200, FAST_SEL, },
> + { IMX93_CLK_ML_APB, "ml_apb_root", 0x2180, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, },
> + { IMX93_CLK_ML, "ml_root", 0x2200, FAST_SEL, 0, PLAT_IMX93, },
> { IMX93_CLK_MEDIA_AXI, "media_axi_root", 0x2280, FAST_SEL, },
> { IMX93_CLK_MEDIA_APB, "media_apb_root", 0x2300, LOW_SPEED_IO_SEL, },
> - { IMX93_CLK_MEDIA_LDB, "media_ldb_root", 0x2380, VIDEO_SEL, },
> + { IMX93_CLK_MEDIA_LDB, "media_ldb_root", 0x2380, VIDEO_SEL, 0, PLAT_IMX93, },
> { IMX93_CLK_MEDIA_DISP_PIX, "media_disp_pix_root", 0x2400, VIDEO_SEL, },
> { IMX93_CLK_CAM_PIX, "cam_pix_root", 0x2480, VIDEO_SEL, },
> - { IMX93_CLK_MIPI_TEST_BYTE, "mipi_test_byte_root", 0x2500, VIDEO_SEL, },
> - { IMX93_CLK_MIPI_PHY_CFG, "mipi_phy_cfg_root", 0x2580, VIDEO_SEL, },
> + { IMX93_CLK_MIPI_TEST_BYTE, "mipi_test_byte_root", 0x2500, VIDEO_SEL, 0, PLAT_IMX93, },
> + { IMX93_CLK_MIPI_PHY_CFG, "mipi_phy_cfg_root", 0x2580, VIDEO_SEL, 0, PLAT_IMX93, },
> { IMX93_CLK_ADC, "adc_root", 0x2700, LOW_SPEED_IO_SEL, },
> { IMX93_CLK_PDM, "pdm_root", 0x2780, AUDIO_SEL, },
> { IMX93_CLK_TSTMR1, "tstmr1_root", 0x2800, LOW_SPEED_IO_SEL, },
> @@ -139,13 +144,16 @@ static const struct imx93_clk_root {
> { IMX93_CLK_MQS2, "mqs2_root", 0x2980, AUDIO_SEL, },
> { IMX93_CLK_AUDIO_XCVR, "audio_xcvr_root", 0x2a00, NON_IO_SEL, },
> { IMX93_CLK_SPDIF, "spdif_root", 0x2a80, AUDIO_SEL, },
> - { IMX93_CLK_ENET, "enet_root", 0x2b00, NON_IO_SEL, },
> - { IMX93_CLK_ENET_TIMER1, "enet_timer1_root", 0x2b80, LOW_SPEED_IO_SEL, },
> - { IMX93_CLK_ENET_TIMER2, "enet_timer2_root", 0x2c00, LOW_SPEED_IO_SEL, },
> - { IMX93_CLK_ENET_REF, "enet_ref_root", 0x2c80, NON_IO_SEL, },
> - { IMX93_CLK_ENET_REF_PHY, "enet_ref_phy_root", 0x2d00, LOW_SPEED_IO_SEL, },
> - { IMX93_CLK_I3C1_SLOW, "i3c1_slow_root", 0x2d80, LOW_SPEED_IO_SEL, },
> - { IMX93_CLK_I3C2_SLOW, "i3c2_slow_root", 0x2e00, LOW_SPEED_IO_SEL, },
> + { IMX93_CLK_ENET, "enet_root", 0x2b00, NON_IO_SEL, 0, PLAT_IMX93, },
> + { IMX93_CLK_ENET_TIMER1, "enet_timer1_root", 0x2b80, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, },
> + { IMX93_CLK_ENET_TIMER2, "enet_timer2_root", 0x2c00, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, },
> + { IMX93_CLK_ENET_REF, "enet_ref_root", 0x2c80, NON_IO_SEL, 0, PLAT_IMX93, },
> + { IMX93_CLK_ENET_REF_PHY, "enet_ref_phy_root", 0x2d00, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, },
> + { IMX91_CLK_ENET1_QOS_TSN, "enet1_qos_tsn_root", 0x2b00, NON_IO_SEL, 0, PLAT_IMX91, },
> + { IMX91_CLK_ENET_TIMER, "enet_timer_root", 0x2b80, LOW_SPEED_IO_SEL, 0, PLAT_IMX91, },
> + { IMX91_CLK_ENET2_REGULAR, "enet2_regular_root", 0x2c80, NON_IO_SEL, 0, PLAT_IMX91, },
> + { IMX93_CLK_I3C1_SLOW, "i3c1_slow_root", 0x2d80, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, },
> + { IMX93_CLK_I3C2_SLOW, "i3c2_slow_root", 0x2e00, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, },
> { IMX93_CLK_USB_PHY_BURUNIN, "usb_phy_root", 0x2e80, LOW_SPEED_IO_SEL, },
> { IMX93_CLK_PAL_CAME_SCAN, "pal_came_scan_root", 0x2f00, MISC_SEL, }
> };
> @@ -157,6 +165,7 @@ static const struct imx93_clk_ccgr {
> u32 off;
> unsigned long flags;
> u32 *shared_count;
> + unsigned long plat;
> } ccgr_array[] = {
> { IMX93_CLK_A55_GATE, "a55_alt", "a55_alt_root", 0x8000, },
> /* M33 critical clk for system run */
> @@ -246,8 +255,10 @@ static const struct imx93_clk_ccgr {
> { IMX93_CLK_AUD_XCVR_GATE, "aud_xcvr", "audio_xcvr_root", 0x9b80, },
> { IMX93_CLK_SPDIF_GATE, "spdif", "spdif_root", 0x9c00, },
> { IMX93_CLK_HSIO_32K_GATE, "hsio_32k", "osc_32k", 0x9dc0, },
> - { IMX93_CLK_ENET1_GATE, "enet1", "wakeup_axi_root", 0x9e00, },
> - { IMX93_CLK_ENET_QOS_GATE, "enet_qos", "wakeup_axi_root", 0x9e40, },
> + { IMX93_CLK_ENET1_GATE, "enet1", "wakeup_axi_root", 0x9e00, 0, NULL, PLAT_IMX93, },
> + { IMX93_CLK_ENET_QOS_GATE, "enet_qos", "wakeup_axi_root", 0x9e40, 0, NULL, PLAT_IMX93, },
> + { IMX91_CLK_ENET2_REGULAR_GATE, "enet2_regular", "wakeup_axi_root", 0x9e00, 0, NULL, PLAT_IMX91, },
> + { IMX91_CLK_ENET1_QOS_TSN_GATE, "enet1_qos_tsn", "wakeup_axi_root", 0x9e40, 0, NULL, PLAT_IMX91, },
> /* Critical because clk accessed during CPU idle */
> { IMX93_CLK_SYS_CNT_GATE, "sys_cnt", "osc_24m", 0x9e80, CLK_IS_CRITICAL},
> { IMX93_CLK_TSTMR1_GATE, "tstmr1", "bus_aon_root", 0x9ec0, },
> @@ -267,6 +278,7 @@ static int imx93_clocks_probe(struct platform_device *pdev)
> const struct imx93_clk_ccgr *ccgr;
> void __iomem *base, *anatop_base;
> int i, ret;
> + const unsigned long plat = (unsigned long)device_get_match_data(&pdev->dev);
>
> clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws,
> IMX93_CLK_END), GFP_KERNEL);
> @@ -316,17 +328,20 @@ static int imx93_clocks_probe(struct platform_device *pdev)
>
> for (i = 0; i < ARRAY_SIZE(root_array); i++) {
> root = &root_array[i];
> - clks[root->clk] = imx93_clk_composite_flags(root->name,
> - parent_names[root->sel],
> - 4, base + root->off, 3,
> - root->flags);
> + if (!root->plat || root->plat & plat)
> + clks[root->clk] = imx93_clk_composite_flags(root->name,
> + parent_names[root->sel],
> + 4, base + root->off, 3,
> + root->flags);
> }
>
> for (i = 0; i < ARRAY_SIZE(ccgr_array); i++) {
> ccgr = &ccgr_array[i];
> - clks[ccgr->clk] = imx93_clk_gate(NULL, ccgr->name, ccgr->parent_name,
> - ccgr->flags, base + ccgr->off, 0, 1, 1, 3,
> - ccgr->shared_count);
> + if (!ccgr->plat || ccgr->plat & plat)
> + clks[ccgr->clk] = imx93_clk_gate(NULL,
> + ccgr->name, ccgr->parent_name,
> + ccgr->flags, base + ccgr->off, 0, 1, 1, 3,
> + ccgr->shared_count);
> }
CHECK: Alignment should match open parenthesis
#137: FILE: drivers/clk/imx/clk-imx93.c:333:
+ clks[root->clk] = imx93_clk_composite_flags(root->name,
+ parent_names[root->sel],
CHECK: Alignment should match open parenthesis
#149: FILE: drivers/clk/imx/clk-imx93.c:342:
+ clks[ccgr->clk] = imx93_clk_gate(NULL,
+ ccgr->name, ccgr->parent_name,
Please run checkpatch before sending.
I'll apply once these are fixed.
>
> clks[IMX93_CLK_A55_SEL] = imx_clk_hw_mux2("a55_sel", base + 0x4820, 0, 1, a55_core_sels,
> @@ -356,7 +371,8 @@ static int imx93_clocks_probe(struct platform_device *pdev)
> }
>
> static const struct of_device_id imx93_clk_of_match[] = {
> - { .compatible = "fsl,imx93-ccm" },
> + { .compatible = "fsl,imx93-ccm", .data = (void *)PLAT_IMX93 },
> + { .compatible = "fsl,imx91-ccm", .data = (void *)PLAT_IMX91 },
> { /* Sentinel */ },
> };
> MODULE_DEVICE_TABLE(of, imx93_clk_of_match);
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2024-10-22 14:27 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-10-17 22:51 [PATCH v5 0/4] Add iMX91 clock driver support Pengfei Li
2024-10-17 22:51 ` [PATCH v5 1/4] clk: imx93: Move IMX93_CLK_END macro to clk driver Pengfei Li
2024-10-17 22:51 ` [PATCH v5 2/4] dt-bindings: clock: imx93: Drop IMX93_CLK_END macro definition Pengfei Li
2024-10-17 22:51 ` [PATCH v5 3/4] dt-bindings: clock: Add i.MX91 clock support Pengfei Li
2024-10-17 22:51 ` [PATCH v5 4/4] clk: imx: add i.MX91 clk Pengfei Li
2024-10-22 14:27 ` Abel Vesa
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