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[79.35.211.193]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9eb169fc18sm140394466b.10.2024.11.05.06.31.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Nov 2024 06:31:12 -0800 (PST) From: Andrea della Porta X-Google-Original-From: Andrea della Porta Date: Tue, 5 Nov 2024 15:31:38 +0100 To: Stanimir Varbanov Cc: Andrea della Porta , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Broadcom internal kernel review list , Lorenzo Pieralisi , Krzysztof Wilczynski , Manivannan Sadhasivam , Bjorn Helgaas , Linus Walleij , Catalin Marinas , Will Deacon , Bartosz Golaszewski , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Saravana Kannan , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-gpio@vger.kernel.org, Masahiro Yamada , Stefan Wahren , Herve Codina , Luca Ceresoli , Thomas Petazzoni , Andrew Lunn Subject: Re: [PATCH v3 09/12] arm64: dts: rp1: Add support for RaspberryPi's RP1 device Message-ID: References: <1f4cec50493ec5d3168735c0a005771787e5cd59.1730123575.git.andrea.porta@suse.com> <4a474dae-6669-4678-87dd-e0e9692a749b@suse.de> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4a474dae-6669-4678-87dd-e0e9692a749b@suse.de> Hi Stan, On 15:29 Mon 04 Nov , Stanimir Varbanov wrote: > Hi Andrea, > > On 10/28/24 16:07, Andrea della Porta wrote: > > RaspberryPi RP1 is a multi function PCI endpoint device that > > exposes several subperipherals via PCI BAR. > > Add a dtb overlay that will be compiled into a binary blob > > and linked in the RP1 driver. > > This overlay offers just minimal support to represent the > > RP1 device itself, the sub-peripherals will be added by > > future patches. > > > > Signed-off-by: Andrea della Porta > > --- > > NOTE: this patch should be taken by the same maintainer that will take > > "[PATCH v3 10/12] misc: rp1: RaspberryPi RP1 misc driver", since they > > are closely related in terms of compiling. > > > > MAINTAINERS | 1 + > > arch/arm64/boot/dts/broadcom/rp1.dtso | 61 +++++++++++++++++++++++++++ > > 2 files changed, 62 insertions(+) > > create mode 100644 arch/arm64/boot/dts/broadcom/rp1.dtso > > > > diff --git a/MAINTAINERS b/MAINTAINERS > > index 06277969a522..510a071ede78 100644 > > --- a/MAINTAINERS > > +++ b/MAINTAINERS > > @@ -19383,6 +19383,7 @@ F: include/uapi/linux/media/raspberrypi/ > > RASPBERRY PI RP1 PCI DRIVER > > M: Andrea della Porta > > S: Maintained > > +F: arch/arm64/boot/dts/broadcom/rp1.dtso > > F: Documentation/devicetree/bindings/clock/raspberrypi,rp1-clocks.yaml > > F: Documentation/devicetree/bindings/misc/pci1de4,1.yaml > > F: Documentation/devicetree/bindings/pci/pci-ep-bus.yaml > > diff --git a/arch/arm64/boot/dts/broadcom/rp1.dtso b/arch/arm64/boot/dts/broadcom/rp1.dtso > > new file mode 100644 > > index 000000000000..8d1bbf207a30 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/broadcom/rp1.dtso > > @@ -0,0 +1,61 @@ > > +// SPDX-License-Identifier: (GPL-2.0 OR MIT) > > + > > +#include > > +#include > > +#include > > + > > +/dts-v1/; > > +/plugin/; > > + > > +/ { > > + fragment@0 { > > + target-path=""; > > + __overlay__ { > > + compatible = "pci1de4,1"; > > + #address-cells = <3>; > > + #size-cells = <2>; > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + > > + pci_ep_bus: pci-ep-bus@1 { > > + compatible = "simple-bus"; > > + ranges = <0xc0 0x40000000 > > + 0x01 0x00 0x00000000 > > + 0x00 0x00400000>; > > + dma-ranges = <0x10 0x00000000 > > + 0x43000000 0x10 0x00000000 > > + 0x10 0x00000000>; > > + #address-cells = <2>; > > + #size-cells = <2>; > > + > > + rp1_clocks: clocks@c040018000 { > > + compatible = "raspberrypi,rp1-clocks"; > > + reg = <0xc0 0x40018000 0x0 0x10038>; > > shouldn't this be: > > rp1_clocks: clocks@18000 { > reg = <0x00 0x00018000 0x0 0x10038>; > ... > } > > ? > > And for other nodes too... For that to be @18000 instead of @c040018000, you should also change the "ranges" entry in pci-ep-bus node, as follows: ranges = <0x00 0x00018000 //This was: 0xc0 0x40000000 0x01 0x00 0x00000000 0x00 0x00400000>; which is of course feasible, but I prefer to use addresses that resemble (at least to some extent) the ones in RP1 docs. Many thanks, Andrea > > ~Stan > > > + #clock-cells = <1>; > > + clocks = <&clk_rp1_xosc>; > > + clock-names = "xosc"; > > + assigned-clocks = <&rp1_clocks RP1_PLL_SYS_CORE>, > > + <&rp1_clocks RP1_PLL_SYS>, > > + <&rp1_clocks RP1_CLK_SYS>; > > + assigned-clock-rates = <1000000000>, // RP1_PLL_SYS_CORE > > + <200000000>, // RP1_PLL_SYS > > + <200000000>; // RP1_CLK_SYS > > + }; > > + > > + rp1_gpio: pinctrl@c0400d0000 { > > + compatible = "raspberrypi,rp1-gpio"; > > + reg = <0xc0 0x400d0000 0x0 0xc000>, > > + <0xc0 0x400e0000 0x0 0xc000>, > > + <0xc0 0x400f0000 0x0 0xc000>; > > + gpio-controller; > > + #gpio-cells = <2>; > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, > > + <1 IRQ_TYPE_LEVEL_HIGH>, > > + <2 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + }; > > + }; > > + }; > > +}; >