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From: Frank Li <Frank.li@nxp.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Richard Zhu <hongxing.zhu@nxp.com>,
	l.stach@pengutronix.de, bhelgaas@google.com,
	lpieralisi@kernel.org, kw@linux.com, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org,
	s.hauer@pengutronix.de, festevam@gmail.com, imx@lists.linux.dev,
	kernel@pengutronix.de, linux-pci@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 08/10] PCI: imx6: Use dwc common suspend resume method
Date: Fri, 15 Nov 2024 12:38:33 -0500	[thread overview]
Message-ID: <ZzeHGd/vfNFgsID2@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <20241115070932.vt4cqshyjtks2hq4@thinkpad>

On Fri, Nov 15, 2024 at 12:39:32PM +0530, Manivannan Sadhasivam wrote:
> On Fri, Nov 01, 2024 at 03:06:08PM +0800, Richard Zhu wrote:
> > From: Frank Li <Frank.Li@nxp.com>
> >
> > Call common dwc suspend/resume function. Use dwc common iATU method to
> > send out PME_TURN_OFF message. In Old DWC implementations,
> > PCIE_ATU_INHIBIT_PAYLOAD bit in iATU Ctrl2 register is reserved. So the
> > generic DWC implementation of sending the PME_Turn_Off message using a
> > dummy MMIO write cannot be used. Use previouse method to kick off
> > PME_TURN_OFF MSG for these platforms.
> >
> > Replace the imx_pcie_stop_link() and imx_pcie_host_exit() by
> > dw_pcie_suspend_noirq() in imx_pcie_suspend_noirq().
> >
> > Since dw_pcie_suspend_noirq() already does these, see below call stack:
> > dw_pcie_suspend_noirq()
> >   dw_pcie_stop_link();
> >     imx_pcie_stop_link();
> >   pci->pp.ops->deinit();
> >     imx_pcie_host_exit();
> >
> > Replace the imx_pcie_host_init(), dw_pcie_setup_rc() and
> > imx_pcie_start_link() by dw_pcie_resume_noirq() in
> > imx_pcie_resume_noirq().
> >
> > Since dw_pcie_resume_noirq() already does these, see below call stack:
> > dw_pcie_resume_noirq()
> >   pci->pp.ops->init();
> >     imx_pcie_host_init();
> >   dw_pcie_setup_rc();
> >   dw_pcie_start_link();
> >     imx_pcie_start_link();
> >
>
> Are these two changes (dw_pcie_suspend_noirq(), dw_pcie_resume_noirq()) related
> to this patch? If not, these should be in a separate patch.


Sorry, this patch have not touch dw_pcie_suspend_noirq() and
dw_pcie_resume_noirq()'s implement, just call it. I have not understood
what's your means.

>
> > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > ---
> >  drivers/pci/controller/dwc/pci-imx6.c | 95 ++++++++++-----------------
> >  1 file changed, 34 insertions(+), 61 deletions(-)
> >
> > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> > index fde2f4eaf804..3c074cc2605f 100644
> > --- a/drivers/pci/controller/dwc/pci-imx6.c
> > +++ b/drivers/pci/controller/dwc/pci-imx6.c
> > @@ -33,6 +33,7 @@
> >  #include <linux/pm_domain.h>
> >  #include <linux/pm_runtime.h>
> >
> > +#include "../../pci.h"
> >  #include "pcie-designware.h"
> >
> >  #define IMX8MQ_GPR_PCIE_REF_USE_PAD		BIT(9)
> > @@ -108,19 +109,18 @@ struct imx_pcie_drvdata {
> >  	int (*init_phy)(struct imx_pcie *pcie);
> >  	int (*enable_ref_clk)(struct imx_pcie *pcie, bool enable);
> >  	int (*core_reset)(struct imx_pcie *pcie, bool assert);
> > +	const struct dw_pcie_host_ops *ops;
> >  };
> >
> >  struct imx_pcie {
> >  	struct dw_pcie		*pci;
> >  	struct gpio_desc	*reset_gpiod;
> > -	bool			link_is_up;
> >  	struct clk_bulk_data	clks[IMX_PCIE_MAX_CLKS];
> >  	struct regmap		*iomuxc_gpr;
> >  	u16			msi_ctrl;
> >  	u32			controller_id;
> >  	struct reset_control	*pciephy_reset;
> >  	struct reset_control	*apps_reset;
> > -	struct reset_control	*turnoff_reset;
> >  	u32			tx_deemph_gen1;
> >  	u32			tx_deemph_gen2_3p5db;
> >  	u32			tx_deemph_gen2_6db;
> > @@ -899,13 +899,11 @@ static int imx_pcie_start_link(struct dw_pcie *pci)
> >  		dev_info(dev, "Link: Only Gen1 is enabled\n");
> >  	}
> >
> > -	imx_pcie->link_is_up = true;
> >  	tmp = dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKSTA);
> >  	dev_info(dev, "Link up, Gen%i\n", tmp & PCI_EXP_LNKSTA_CLS);
> >  	return 0;
> >
> >  err_reset_phy:
> > -	imx_pcie->link_is_up = false;
> >  	dev_dbg(dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n",
> >  		dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0),
> >  		dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1));
> > @@ -1024,9 +1022,32 @@ static u64 imx_pcie_cpu_addr_fixup(struct dw_pcie *pcie, u64 cpu_addr)
> >  	return cpu_addr - entry->offset;
> >  }
> >
> > +/*
> > + * In Old DWC implementations, PCIE_ATU_INHIBIT_PAYLOAD bit in iATU Ctrl2
> > + * register is reserved. So the generic DWC implementation of sending the
> > + * PME_Turn_Off message using a dummy MMIO write cannot be used.
> > + */
> > +static void imx_pcie_pme_turn_off(struct dw_pcie_rp *pp)
> > +{
> > +	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> > +	struct imx_pcie *imx_pcie = to_imx_pcie(pci);
> > +
> > +	regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF);
> > +	regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF);
> > +
> > +	usleep_range(PCIE_PME_TO_L2_TIMEOUT_US/10, PCIE_PME_TO_L2_TIMEOUT_US);
> > +}
> > +
> > +
>
> Stray newline.
>
> >  static const struct dw_pcie_host_ops imx_pcie_host_ops = {
> >  	.init = imx_pcie_host_init,
> >  	.deinit = imx_pcie_host_exit,
> > +	.pme_turn_off = imx_pcie_pme_turn_off,
> > +};
> > +
> > +static const struct dw_pcie_host_ops imx_pcie_host_dw_pme_ops = {
> > +	.init = imx_pcie_host_init,
> > +	.deinit = imx_pcie_host_exit,
> >  };
> >
> >  static const struct dw_pcie_ops dw_pcie_ops = {
> > @@ -1147,43 +1168,6 @@ static int imx_add_pcie_ep(struct imx_pcie *imx_pcie,
> >  	return 0;
> >  }
> >
> > -static void imx_pcie_pm_turnoff(struct imx_pcie *imx_pcie)
> > -{
> > -	struct device *dev = imx_pcie->pci->dev;
> > -
> > -	/* Some variants have a turnoff reset in DT */
> > -	if (imx_pcie->turnoff_reset) {
> > -		reset_control_assert(imx_pcie->turnoff_reset);
> > -		reset_control_deassert(imx_pcie->turnoff_reset);
>
> Where these are handled in imx_pcie_pme_turn_off()? If you removed them
> intentionally for a reason, it should be mentioned in commit message.
>
> > -		goto pm_turnoff_sleep;
> > -	}
> > -
> > -	/* Others poke directly at IOMUXC registers */
> > -	switch (imx_pcie->drvdata->variant) {
> > -	case IMX6SX:
> > -	case IMX6QP:
> > -		regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,
> > -				IMX6SX_GPR12_PCIE_PM_TURN_OFF,
> > -				IMX6SX_GPR12_PCIE_PM_TURN_OFF);
> > -		regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,
> > -				IMX6SX_GPR12_PCIE_PM_TURN_OFF, 0);
> > -		break;
> > -	default:
> > -		dev_err(dev, "PME_Turn_Off not implemented\n");
> > -		return;
> > -	}
> > -
> > -	/*
> > -	 * Components with an upstream port must respond to
> > -	 * PME_Turn_Off with PME_TO_Ack but we can't check.
> > -	 *
> > -	 * The standard recommends a 1-10ms timeout after which to
> > -	 * proceed anyway as if acks were received.
> > -	 */
> > -pm_turnoff_sleep:
> > -	usleep_range(1000, 10000);
> > -}
> > -
> >  static void imx_pcie_msi_save_restore(struct imx_pcie *imx_pcie, bool save)
> >  {
> >  	u8 offset;
> > @@ -1207,36 +1191,26 @@ static void imx_pcie_msi_save_restore(struct imx_pcie *imx_pcie, bool save)
>
> [...]
>
> > @@ -1267,11 +1241,14 @@ static int imx_pcie_probe(struct platform_device *pdev)
> >
> >  	pci->dev = dev;
> >  	pci->ops = &dw_pcie_ops;
> > -	pci->pp.ops = &imx_pcie_host_ops;
> >
> >  	imx_pcie->pci = pci;
> >  	imx_pcie->drvdata = of_device_get_match_data(dev);
> >
> > +	pci->pp.ops = &imx_pcie_host_dw_pme_ops;
> > +	if (imx_pcie->drvdata->ops)
> > +		pci->pp.ops = imx_pcie->drvdata->ops;
>
> Use if..else pattern
>
> > +
> >  	/* Find the PHY if one is defined, only imx7d uses it */
> >  	np = of_parse_phandle(node, "fsl,imx7d-pcie-phy", 0);
> >  	if (np) {
> > @@ -1343,13 +1320,6 @@ static int imx_pcie_probe(struct platform_device *pdev)
> >  		break;
> >  	}
> >
> > -	/* Grab turnoff reset */
> > -	imx_pcie->turnoff_reset = devm_reset_control_get_optional_exclusive(dev, "turnoff");
> > -	if (IS_ERR(imx_pcie->turnoff_reset)) {
> > -		dev_err(dev, "Failed to get TURNOFF reset control\n");
> > -		return PTR_ERR(imx_pcie->turnoff_reset);
> > -	}
> > -
>
> Same here. Reason not explained.

"Some platforms wrongly use
devm_reset_control_get_optional_exclusive(dev, "turnoff")
reset_control_assert(imx_pcie->turnoff_reset) and
reset_control_deassert(imx_pcie->turnoff_reset) to send out PME_TURN_OFF
messge, after change to common API to do that, so remove these wrong
implment."

Is it okay to put above into commit message?

Frank



>
> - Mani
>
> --
> மணிவண்ணன் சதாசிவம்

  reply	other threads:[~2024-11-15 17:38 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-01  7:06 [PATCH v6 0/10] A bunch of changes to refine i.MX PCIe driver Richard Zhu
2024-11-01  7:06 ` [PATCH v6 01/10] dt-bindings: imx6q-pcie: Add ref clock for i.MX95 PCIe RC Richard Zhu
2024-11-01  7:06 ` [PATCH v6 02/10] PCI: imx6: Add ref clock for i.MX95 PCIe Richard Zhu
2024-11-15  6:38   ` Manivannan Sadhasivam
2024-11-18  2:59     ` Hongxing Zhu
2024-11-19  5:38       ` Hongxing Zhu
2024-11-22 16:44         ` Manivannan Sadhasivam
2024-11-01  7:06 ` [PATCH v6 03/10] PCI: imx6: Fetch dbi2 and iATU base addesses from DT Richard Zhu
2024-11-15  6:41   ` Manivannan Sadhasivam
2024-11-18  2:59     ` Hongxing Zhu
2024-11-22 17:10       ` Manivannan Sadhasivam
2024-11-01  7:06 ` [PATCH v6 04/10] PCI: imx6: Correct controller_id generation logic for i.MX7D Richard Zhu
2024-11-15  6:43   ` Manivannan Sadhasivam
2024-11-18  2:59     ` Hongxing Zhu
2024-11-22 17:10       ` Manivannan Sadhasivam
2024-11-01  7:06 ` [PATCH v6 05/10] PCI: imx6: Make core reset assertion deassertion symmetric Richard Zhu
2024-11-15  6:52   ` Manivannan Sadhasivam
2024-11-18  2:59     ` Hongxing Zhu
2024-11-22 17:07       ` Manivannan Sadhasivam
2024-11-01  7:06 ` [PATCH v6 06/10] PCI: imx6: Fix the missing reference clock disable logic Richard Zhu
2024-11-15  6:54   ` Manivannan Sadhasivam
2024-11-01  7:06 ` [PATCH v6 07/10] PCI: imx6: Clean up codes by removing imx7d_pcie_init_phy() Richard Zhu
2024-11-15  6:57   ` Manivannan Sadhasivam
2024-11-01  7:06 ` [PATCH v6 08/10] PCI: imx6: Use dwc common suspend resume method Richard Zhu
2024-11-04 14:24   ` kernel test robot
2024-11-15  7:09   ` Manivannan Sadhasivam
2024-11-15 17:38     ` Frank Li [this message]
2024-11-22 16:57       ` Manivannan Sadhasivam
2024-11-18  3:00     ` Hongxing Zhu
2024-11-22 16:47       ` Manivannan Sadhasivam
2024-11-25  8:44         ` Hongxing Zhu
2024-11-01  7:06 ` [PATCH v6 09/10] PCI: imx6: Add i.MX8MQ i.MX8Q and i.MX95 PCIe PM support Richard Zhu
2024-11-15  7:12   ` Manivannan Sadhasivam
2024-11-01  7:06 ` [PATCH v6 10/10] arm64: dts: imx95: Add ref clock for i.MX95 PCIe Richard Zhu
2024-11-15  7:16   ` Manivannan Sadhasivam
2024-11-15 17:28     ` Frank Li
2024-11-22 17:13       ` Manivannan Sadhasivam

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