From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 864C034BA44; Tue, 7 Oct 2025 01:20:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759800058; cv=none; b=fHt1XWGJRCTutVVHyUkJb0BqE/qxXg43PK8IweM4hPvjs0Bkw3RnhrO+V7TOSYM+Um/haJgB6vOsAI23KuPTuJjCAD04ESOmzTZPt+7sqYO++I9sO9BUHlreQspsdlBlj387mzd6Cjs15N7GgJG3Z/uEZf2Ahmca6GAruc0PRB8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759800058; c=relaxed/simple; bh=z2OIZVGrfNYJFBLxaviY6hKGuzZEUsZaV7GBFKxpQ+Y=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=kZQs11Js8tF7KjjeXAEQacND4cwTci9eW62JJ8tY+/yxNPr6iKExjN32AVpj0+LYql+d2olufUWFYaO+0PGbaK0KD5iod0rF667dndg0Qzrq4lshawz9aLZXbkmCA9g/FiAPzGGyCmaxFAsmDfCrdu7DHtXrXAEPExd/kYCNONQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=RBAJOGog; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="RBAJOGog" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5CADCC4CEF5; Tue, 7 Oct 2025 01:20:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1759800058; bh=z2OIZVGrfNYJFBLxaviY6hKGuzZEUsZaV7GBFKxpQ+Y=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=RBAJOGogbZ3xnvquR7gtzxVmCQ4/WFAXOS+W7cbJJ6+BpgdAKQMm83B/vu3JRgg+t SvpklJY0bY/ip4cNjy/gnCt5kUA4tiyj0cjhBOFUQQUlwm0ztR5VOgeDid+NAd1cKt h6bgPf/Grx/A2QflsHE4ulmWw9CWV7v76zpMQM8WvT7lsTcDgkBjPZAQUqKu/Lxq7y REm39AmaRGoXVqQEdqUYknNluX82/CllOHhnMH86TAr0zAYSYNbT7hLTcqs2cFBkQH 4Haa9M+Q4Y5+2m8zbBFaopoHebrkYOAEZA4TJzq/Gyo9Aa4tNM3sz5QkQqn4+R4q5V +fWuWcoIYpfzQ== Message-ID: Date: Tue, 7 Oct 2025 10:20:43 +0900 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 6/8] riscv: dts: Add Tenstorrent Blackhole SoC PCIe cards To: Drew Fustini , Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Samuel Holland , Daniel Lezcano , Thomas Gleixner , Anup Patel , Arnd Bergmann , Joel Stanley , Joel Stanley , Michael Neuling , Nicholas Piggin , Michael Ellerman , Andy Gross , Anirudh Srinivasan Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Drew Fustini References: <20251006-tt-bh-dts-v2-0-ed90dc4b3e22@oss.tenstorrent.com> <20251006-tt-bh-dts-v2-6-ed90dc4b3e22@oss.tenstorrent.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 07/10/2025 06:21, Drew Fustini wrote: > From: Drew Fustini > > Add device tree source describing the Tenstorrent Blackhole SoC and the > Blackhole P100 and P150 PCIe cards. There are no differences between > the P100 and P150 cards from the perspective of an OS kernel like Linux > running on the X280 cores. > > Link: https://github.com/tenstorrent/tt-isa-documentation/blob/main/BlackholeA0/ > Signed-off-by: Drew Fustini > --- > MAINTAINERS | 1 + > arch/riscv/boot/dts/Makefile | 1 + > arch/riscv/boot/dts/tenstorrent/Makefile | 2 + > arch/riscv/boot/dts/tenstorrent/blackhole-card.dts | 14 +++ > arch/riscv/boot/dts/tenstorrent/blackhole.dtsi | 104 +++++++++++++++++++++ > 5 files changed, 122 insertions(+) > > diff --git a/MAINTAINERS b/MAINTAINERS > index 125b5498c3bf8e689adc665fc6e975b05a484abf..b3a2a347f835da952c33b0faf09d560eb1285c32 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -21748,6 +21748,7 @@ L: linux-riscv@lists.infradead.org > S: Maintained > T: git https://github.com/tenstorrent/linux.git > F: Documentation/devicetree/bindings/riscv/tenstorrent.yaml > +F: arch/riscv/boot/dts/tenstorrent/ > > RISC-V THEAD SoC SUPPORT > M: Drew Fustini > diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile > index 3b99e91efa25be2d6ca5bc173342c24a72f87187..0624199867065dbb5eb62d660f950b4aa3a7abd7 100644 > --- a/arch/riscv/boot/dts/Makefile > +++ b/arch/riscv/boot/dts/Makefile > @@ -8,4 +8,5 @@ subdir-y += sifive > subdir-y += sophgo > subdir-y += spacemit > subdir-y += starfive > +subdir-y += tenstorrent > subdir-y += thead > diff --git a/arch/riscv/boot/dts/tenstorrent/Makefile b/arch/riscv/boot/dts/tenstorrent/Makefile > new file mode 100644 > index 0000000000000000000000000000000000000000..2c81faaba46235821470b077392ebfebd37ef55a > --- /dev/null > +++ b/arch/riscv/boot/dts/tenstorrent/Makefile > @@ -0,0 +1,2 @@ > +# SPDX-License-Identifier: GPL-2.0 > +dtb-$(CONFIG_ARCH_TENSTORRENT) += blackhole-card.dtb > diff --git a/arch/riscv/boot/dts/tenstorrent/blackhole-card.dts b/arch/riscv/boot/dts/tenstorrent/blackhole-card.dts > new file mode 100644 > index 0000000000000000000000000000000000000000..c595f7eddcf860d18193d6b18eb4fd1c0c6c684d > --- /dev/null > +++ b/arch/riscv/boot/dts/tenstorrent/blackhole-card.dts > @@ -0,0 +1,14 @@ > +// SPDX-License-Identifier: (GPL-2.0 OR MIT) > +/dts-v1/; > + > +#include "blackhole.dtsi" > + > +/ { > + model = "Tenstorrent Blackhole SoC PCIe card"; > + compatible = "tenstorrent,blackhole-card", "tenstorrent,blackhole"; > + > + memory@400030000000 { > + device_type = "memory"; > + reg = <0x4000 0x30000000 0x1 0x00000000>; > + }; > +}; > diff --git a/arch/riscv/boot/dts/tenstorrent/blackhole.dtsi b/arch/riscv/boot/dts/tenstorrent/blackhole.dtsi > new file mode 100644 > index 0000000000000000000000000000000000000000..dc6ac953c34b1efeec231b339251058fac5172d5 > --- /dev/null > +++ b/arch/riscv/boot/dts/tenstorrent/blackhole.dtsi > @@ -0,0 +1,104 @@ > +// SPDX-License-Identifier: (GPL-2.0 OR MIT) > +// Copyright 2025 Tenstorrent AI ULC > +/dts-v1/; > + > +/ { > + compatible = "tenstorrent,blackhole"; > + #address-cells = <2>; > + #size-cells = <2>; > + > + cpus { > + #address-cells = <0x1>; > + #size-cells = <0x0>; Cells are not hex. Please use decimal everywhere. > + timebase-frequency = <50000000>; > + > + cpu@0 { > + compatible = "sifive,x280", "sifive,rocket0", "riscv"; > + device_type = "cpu"; > + reg = <0>; > + mmu-type = "riscv,sv57"; > + riscv,isa-base = "rv64i"; > + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicsr", > + "zifencei", "zfh", "zba", "zbb", "sscofpmf"; Blank line > + cpu0_intc: interrupt-controller { > + compatible = "riscv,cpu-intc"; > + #interrupt-cells = <1>; > + interrupt-controller; > + }; > + }; ... > + > + plic0: interrupt-controller@c000000 { > + compatible = "tenstorrent,blackhole-plic", "sifive,plic-1.0.0"; > + reg = <0x0 0x0c000000 0x0 0x04000000>; > + interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>, > + <&cpu1_intc 11>, <&cpu1_intc 9>, > + <&cpu2_intc 11>, <&cpu2_intc 9>, > + <&cpu3_intc 11>, <&cpu3_intc 9>; > + interrupt-controller; > + #interrupt-cells = <1>; > + #address-cells = <0>; > + riscv,ndev = <128>; You should have at least serial or any other interface, otherwise I don't see how this can be used at this stage. Best regards, Krzysztof