* [PATCH v3 1/2] arm64: dts: ti: k3-am62a7-sk: Add alias for CPSW3G MAC port 1
2024-04-29 10:17 [PATCH v3 0/2] Add support for CPSW3G port 2 on AM62A7-SK Chintan Vankar
@ 2024-04-29 10:17 ` Chintan Vankar
2024-04-29 10:17 ` [PATCH v3 2/2] arm64: dts: ti: k3-am62a7: Add overlay for second CPSW3G Port Chintan Vankar
1 sibling, 0 replies; 4+ messages in thread
From: Chintan Vankar @ 2024-04-29 10:17 UTC (permalink / raw)
To: Conor Dooley, Krzysztof Kozlowski, Rob Herring, Tero Kristo,
Vignesh Raghavendra, Nishanth Menon, s-vadapalli, danishanwar,
r-gunasekaran, srk
Cc: linux-kernel, devicetree, linux-arm-kernel, Chintan Vankar
From: Siddharth Vadapalli <s-vadapalli@ti.com>
Add alias for CPSW3G MAC port 1 to enable kernel to fetch MAC Address
directly from U-Boot.
Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
---
Link to v2:
https://lore.kernel.org/r/20240425102038.1995252-2-c-vankar@ti.com/
Changes from v2 to v3:
- Collected Reviewed by tag from Ravi.
arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
index fa43cd0b631e..5aced7e56192 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
@@ -22,6 +22,7 @@ aliases {
serial3 = &main_uart1;
mmc0 = &sdhci0;
mmc1 = &sdhci1;
+ ethernet0 = &cpsw_port1;
};
chosen {
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH v3 2/2] arm64: dts: ti: k3-am62a7: Add overlay for second CPSW3G Port
2024-04-29 10:17 [PATCH v3 0/2] Add support for CPSW3G port 2 on AM62A7-SK Chintan Vankar
2024-04-29 10:17 ` [PATCH v3 1/2] arm64: dts: ti: k3-am62a7-sk: Add alias for CPSW3G MAC port 1 Chintan Vankar
@ 2024-04-29 10:17 ` Chintan Vankar
2024-04-29 10:35 ` Ravi Gunasekaran
1 sibling, 1 reply; 4+ messages in thread
From: Chintan Vankar @ 2024-04-29 10:17 UTC (permalink / raw)
To: Conor Dooley, Krzysztof Kozlowski, Rob Herring, Tero Kristo,
Vignesh Raghavendra, Nishanth Menon, s-vadapalli, danishanwar,
r-gunasekaran, srk
Cc: linux-kernel, devicetree, linux-arm-kernel, Chintan Vankar
From: Siddharth Vadapalli <s-vadapalli@ti.com>
The SK-Ethernet-DC01 Add-On Ethernet Card for AM62A7-SK board supports
RGMII mode.
Add overlay to enable the second CPSW3G port in RGMII-RXID mode with the
Add-On Ethernet Card.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
---
Link to v2:
https://lore.kernel.org/r/20240425102038.1995252-3-c-vankar@ti.com/
Changes from v2 to v3:
- Updated SPDX-License-Identifier and "pinctrl-0" property in "cpsw3g"
node in "k3-am62a7-sk-ethernet-dc01.dtso" as suggested by Ravi.
arch/arm64/boot/dts/ti/Makefile | 3 +
.../dts/ti/k3-am62a7-sk-ethernet-dc01.dtso | 62 +++++++++++++++++++
2 files changed, 65 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-am62a7-sk-ethernet-dc01.dtso
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 48fb19a523bd..b4bc5712b1a4 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -27,6 +27,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk.dtb
# Boards with AM62Ax SoC
dtb-$(CONFIG_ARCH_K3) += k3-am62a7-sk.dtb
+dtb-$(CONFIG_ARCH_K3) += k3-am62a7-sk-ethernet-dc01.dtbo
# Boards with AM62Px SoC
dtb-$(CONFIG_ARCH_K3) += k3-am62p5-sk.dtb
@@ -125,6 +126,8 @@ k3-am62a7-sk-csi2-ov5640-dtbs := k3-am62a7-sk.dtb \
k3-am62x-sk-csi2-ov5640.dtbo
k3-am62a7-sk-csi2-tevi-ov5640-dtbs := k3-am62a7-sk.dtb \
k3-am62x-sk-csi2-tevi-ov5640.dtbo
+k3-am62a7-sk-ethernet-dc01-dtbs := k3-am62a7-sk.dtb \
+ k3-am62a7-sk-ethernet-dc01.dtbo
k3-am62a7-sk-hdmi-audio-dtbs := k3-am62a7-sk.dtb k3-am62x-sk-hdmi-audio.dtbo
k3-am62p5-sk-csi2-imx219-dtbs := k3-am62p5-sk.dtb \
k3-am62x-sk-csi2-imx219.dtbo
diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk-ethernet-dc01.dtso b/arch/arm64/boot/dts/ti/k3-am62a7-sk-ethernet-dc01.dtso
new file mode 100644
index 000000000000..ed73d9a80379
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk-ethernet-dc01.dtso
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/**
+ * DT Overlay for second CPSW3G port in RGMII mode using SK-ETHERNET-DC01
+ * Add-On Daughtercard with AM62A7-SK.
+ *
+ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/net/ti-dp83867.h>
+#include "k3-pinctrl.h"
+
+&{/} {
+ aliases {
+ ethernet1 = "/bus@f0000/ethernet@8000000/ethernet-ports/port@2";
+ };
+};
+
+&cpsw3g {
+ pinctrl-0 = <&main_rgmii1_pins_default>,
+ <&main_rgmii2_pins_default>;
+};
+
+&cpsw_port2 {
+ status = "okay";
+ phy-mode = "rgmii-rxid";
+ phy-handle = <&cpsw3g_phy1>;
+};
+
+&cpsw3g_mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpsw3g_phy1: ethernet-phy@1 {
+ reg = <1>;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+ ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+ ti,min-output-impedance;
+ };
+};
+
+&main_pmx0 {
+ main_rgmii2_pins_default: main-rgmii2-default-pins {
+ pinctrl-single,pins = <
+ AM62AX_IOPAD(0x0184, PIN_INPUT, 0) /* (AA21) RGMII2_RD0 */
+ AM62AX_IOPAD(0x0188, PIN_INPUT, 0) /* (Y20) RGMII2_RD1 */
+ AM62AX_IOPAD(0x018c, PIN_INPUT, 0) /* (AB21) RGMII2_RD2 */
+ AM62AX_IOPAD(0x0190, PIN_INPUT, 0) /* (AB20) RGMII2_RD3 */
+ AM62AX_IOPAD(0x0180, PIN_INPUT, 0) /* (AA20) RGMII2_RXC */
+ AM62AX_IOPAD(0x017c, PIN_INPUT, 0) /* (W18) RGMII2_RX_CTL */
+ AM62AX_IOPAD(0x016c, PIN_INPUT, 0) /* (AA19) RGMII2_TD0 */
+ AM62AX_IOPAD(0x0170, PIN_INPUT, 0) /* (Y18) RGMII2_TD1 */
+ AM62AX_IOPAD(0x0174, PIN_INPUT, 0) /* (AA18) RGMII2_TD2 */
+ AM62AX_IOPAD(0x0178, PIN_INPUT, 0) /* (W17) RGMII2_TD3 */
+ AM62AX_IOPAD(0x0168, PIN_INPUT, 0) /* (AB19) RGMII2_TXC */
+ AM62AX_IOPAD(0x0164, PIN_INPUT, 0) /* (Y19) RGMII2_TX_CTL */
+ >;
+ };
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread