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Thu, 30 Jul 2026 03:59:02 -0700 (PDT) X-Received: by 2002:a05:6a00:cc9:b0:848:3e74:85eb with SMTP id d2e1a72fcca58-84ebc1f5cbfmr2260608b3a.1.1785409141911; Thu, 30 Jul 2026 03:59:01 -0700 (PDT) Received: from [10.218.5.114] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84ea03d0675sm2892952b3a.61.2026.07.30.03.58.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 30 Jul 2026 03:59:01 -0700 (PDT) Message-ID: Date: Thu, 30 Jul 2026 16:28:54 +0530 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/6] ptp: qcom: Add PTP driver for the Qualcomm TSC hardware To: Krzysztof Kozlowski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Andersson , Konrad Dybcio Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org References: <20260727-tscss-v1-0-beed14e72510@oss.qualcomm.com> <20260727-tscss-v1-3-beed14e72510@oss.qualcomm.com> Content-Language: en-US From: Imran Shaik In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: 3dMZFTuTsKRZXvoi4s5bhkbPJMaofOu5 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzMwMDA4MSBTYWx0ZWRfX8obr9JiqlSOp ZgTdbytlu/78neleGAdy9k5qK8IwF4VoQgfPfNXEFChBeRcaolZGPLbtirSd4MAZLD5ZSEklBYE +AgD+QA9hYMJk1VRN/39gmnRUrRc6mjKcpShQrE0EHOdJSjgQugehAc+jLf0IgECfdqsgkkExN8 WWKWYVd8a+CR5sXX9ed1blrloMuJ8fxR9hZMs+OAnmmnDy2rYNONC5o9sFHRWtv90UoXzYvwbtv HE0gPmDBrMiP4lxpULjqb41tsF5hNBHPCm+sYbhg/4Sz0RUTgfOWWyKD2x0MUPVWkOQ1uyiJgN6 jMr04KtyhNl2ueFQxvUUqr/MpzynFPYbEVDVfZPsGobxego96rTLPmsg14Zsq3MF9nhi7j+qqq2 qH15PwCqEfplx7xyIxbam0xwpJdn3k36I0RuHo9yyUHMnMNGUyQB+47Ff6+oDffPky4QdUsHDgI RM62KuXuzAMmkW1Umfg== X-Proofpoint-Spam-Info: AW1haW4tMjYwNzMwMDA4MSBTYWx0ZWRfXweW+AkfF6m4x zKTE6uqt3WzXGq6DB4UrvoDNpRy2y0Y5T6pETawU8tBqySQEpFhe3gaHDHmGjSlnPs0eKyPhV4h 9zJsXIIHucgXRtmrk1z/lnnO8/UsDsk= X-Proofpoint-GUID: 3dMZFTuTsKRZXvoi4s5bhkbPJMaofOu5 X-Authority-Analysis: v=2.4 cv=K/QS2SWI c=1 sm=1 tr=0 ts=6a6b2e77 cx=c_pps a=mDZGXZTwRPZaeRUbqKGCBw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=d1WRJkdEJf9Lhp5XSbkA:9 a=QEXdDO2ut3YA:10 a=zc0IvFSfCIW2DFIPzwfm:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-30_03,2026-07-29_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 impostorscore=0 phishscore=0 adultscore=0 bulkscore=0 lowpriorityscore=0 spamscore=0 suspectscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607300081 On 27-07-2026 09:23 pm, Krzysztof Kozlowski wrote: > On 27/07/2026 16:10, Imran Shaik wrote: >> Add a PTP Hardware Clock driver for the Qualcomm Timestamp Counter (TSC) >> hardware found on Qualcomm Lemans and QDU1000 SoCs. The TSC is a free >> running hardware counter used for time synchronization, clocked by an AHB >> configuration clock and a global counter clock, with the counter resolution >> varying across SoCs. >> >> Co-developed-by: Taniya Das >> Signed-off-by: Taniya Das >> Signed-off-by: Imran Shaik >> --- >> drivers/ptp/Kconfig | 10 ++ >> drivers/ptp/Makefile | 1 + >> drivers/ptp/ptp_qcom_tsc.c | 413 +++++++++++++++++++++++++++++++++++++++++++++ >> 3 files changed, 424 insertions(+) >> >> diff --git a/drivers/ptp/Kconfig b/drivers/ptp/Kconfig >> index b93640ca08b7286fd4298519a17d1daf19056498..d3ceb1ee01a505cdd0bd056649d245308fc9f140 100644 >> --- a/drivers/ptp/Kconfig >> +++ b/drivers/ptp/Kconfig >> @@ -263,4 +263,14 @@ config PTP_NETC_V4_TIMER >> synchronization. It also supports periodic output signal (e.g. PPS) >> and external trigger timestamping. >> >> +config PTP_QCOM_TSC >> + tristate "Qualcomm TSC as PTP clock" > > Missing depensd on ARCH_QCOM > Will fix it in the next series. >> + depends on COMMON_CLK && PTP_1588_CLOCK >> + help >> + This driver adds support for using the Qualcomm Timestamp Counter >> + Subsystem (TSCSS) as a PTP clock. >> + >> + To compile this driver as a module, choose M here: the module >> + will be called ptp_qcom_tsc. >> + >> endmenu > > ... > >> + >> +static const struct of_device_id qcom_tsc_of_match[] = { >> + { .compatible = "qcom,lemans-tscss", .data = &qcom_tsc_lemans }, >> + { .compatible = "qcom,qdu1000-tscss", .data = &qcom_tsc_qdu1000 }, >> + { } >> +}; >> +MODULE_DEVICE_TABLE(of, qcom_tsc_of_match); >> + >> +static void qcom_ptp_tsc_remove(struct platform_device *pdev) > > Completely broken order of ID table, remove() and probe(). Remove ALWAYS > follows probe. Table is next to them. Please look at other drivers. > Sure, will correct the order in the next series. >> +{ >> + struct qcom_tsc *tsc = platform_get_drvdata(pdev); >> + >> + if (tsc && tsc->ptp) { >> + ptp_clock_unregister(tsc->ptp); >> + tsc->ptp = NULL; >> + } >> +} >> + >> +static int qcom_ptp_tsc_probe(struct platform_device *pdev) >> +{ >> + const struct qcom_tsc_soc_data *soc; >> + struct qcom_tsc *tsc; >> + struct resource *r_mem; >> + int ret; >> + >> + soc = of_device_get_match_data(&pdev->dev); >> + if (!soc) >> + return -ENODEV; >> + >> + tsc = devm_kzalloc(&pdev->dev, sizeof(*tsc), GFP_KERNEL); >> + if (!tsc) >> + return -ENOMEM; >> + >> + tsc->dev = &pdev->dev; >> + tsc->soc = soc; >> + >> + ret = devm_mutex_init(&pdev->dev, &tsc->lock); >> + if (ret) >> + return ret; >> + >> + r_mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tsc"); >> + if (!r_mem) { >> + dev_err(&pdev->dev, "no IO resource defined\n"); >> + return -ENXIO; >> + } >> + >> + tsc->base = devm_ioremap_resource(&pdev->dev, r_mem); >> + if (IS_ERR(tsc->base)) >> + return PTR_ERR(tsc->base); >> + >> + tsc->ahb_clk = devm_clk_get_enabled(&pdev->dev, "ahb"); >> + if (IS_ERR(tsc->ahb_clk)) >> + return PTR_ERR(tsc->ahb_clk); >> + >> + tsc->cntr_clk = devm_clk_get_enabled(&pdev->dev, "cntr"); >> + if (IS_ERR(tsc->cntr_clk)) >> + return PTR_ERR(tsc->cntr_clk); >> + >> + /* ETU clock is optional, only required when the ETU block is used */ >> + tsc->etu_clk = devm_clk_get_optional_enabled(&pdev->dev, "etu"); >> + if (IS_ERR(tsc->etu_clk)) >> + return PTR_ERR(tsc->etu_clk); >> + >> + tsc->ptp_info = qcom_ptp_info; >> + >> + tsc->ptp = ptp_clock_register(&tsc->ptp_info, &pdev->dev); >> + if (IS_ERR(tsc->ptp)) { >> + ret = PTR_ERR(tsc->ptp); >> + dev_err(&pdev->dev, "Failed to register ptp clock\n"); >> + return ret; > > Why aren't you using dev_err_probe? > Sure, will use the dev_err_probe in the next series. Thanks, Imran >> + } >> + >> + platform_set_drvdata(pdev, tsc); >> + >> + return 0; >> +} >> + >> +static struct platform_driver qcom_ptp_tsc_driver = { >> + .probe = qcom_ptp_tsc_probe, >> + .remove = qcom_ptp_tsc_remove, >> + .driver = { >> + .name = "qcom_ptp_tsc", >> + .of_match_table = qcom_tsc_of_match, >> + }, >> +}; >> +module_platform_driver(qcom_ptp_tsc_driver); >> + >> +MODULE_DESCRIPTION("PTP QCOM TSC driver"); >> +MODULE_LICENSE("GPL"); >> > > > Best regards, > Krzysztof