* [PATCH RESEND] arm64: dts: socfpga: agilex5: add VGIC maintenance interrupt
@ 2025-03-11 3:36 niravkumar.l.rabara
2025-10-24 3:29 ` Dinh Nguyen
0 siblings, 1 reply; 2+ messages in thread
From: niravkumar.l.rabara @ 2025-03-11 3:36 UTC (permalink / raw)
To: Dinh Nguyen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
niravkumar.l.rabara, nirav.rabara, devicetree, linux-kernel
From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Add VGIC maintenance interrupt and interrupt-parent property for
interrupt controller, required to run Linux in virtualized environment.
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
---
arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index 51c6e19e40b8..75397e84bd2c 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -75,8 +75,11 @@ intc: interrupt-controller@1d000000 {
#address-cells = <2>;
#size-cells = <2>;
interrupt-controller;
+ interrupt-parent = <&intc>;
#redistributor-regions = <1>;
redistributor-stride = <0x0 0x20000>;
+ /* VGIC maintenance interrupt */
+ interrupts = <GIC_PPI 25 IRQ_TYPE_LEVEL_HIGH>;
its: msi-controller@1d040000 {
compatible = "arm,gic-v3-its";
--
2.25.1
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH RESEND] arm64: dts: socfpga: agilex5: add VGIC maintenance interrupt
2025-03-11 3:36 [PATCH RESEND] arm64: dts: socfpga: agilex5: add VGIC maintenance interrupt niravkumar.l.rabara
@ 2025-10-24 3:29 ` Dinh Nguyen
0 siblings, 0 replies; 2+ messages in thread
From: Dinh Nguyen @ 2025-10-24 3:29 UTC (permalink / raw)
To: niravkumar.l.rabara, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, nirav.rabara, devicetree, linux-kernel
On 3/10/25 22:36, niravkumar.l.rabara@intel.com wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>
> Add VGIC maintenance interrupt and interrupt-parent property for
> interrupt controller, required to run Linux in virtualized environment.
>
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> ---
> arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> index 51c6e19e40b8..75397e84bd2c 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> @@ -75,8 +75,11 @@ intc: interrupt-controller@1d000000 {
> #address-cells = <2>;
> #size-cells = <2>;
> interrupt-controller;
> + interrupt-parent = <&intc>;
> #redistributor-regions = <1>;
> redistributor-stride = <0x0 0x20000>;
> + /* VGIC maintenance interrupt */
> + interrupts = <GIC_PPI 25 IRQ_TYPE_LEVEL_HIGH>;
>
> its: msi-controller@1d040000 {
> compatible = "arm,gic-v3-its";
Applied!
Thanks,
Dinh
^ permalink raw reply [flat|nested] 2+ messages in thread
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