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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id o15-20020a5d684f000000b0020c5253d8fesm4459561wrw.74.2022.05.12.07.32.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 12 May 2022 07:32:42 -0700 (PDT) Message-ID: Date: Thu, 12 May 2022 16:32:41 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.1 Subject: Re: [PATCH v6 7/7] arm64: dts: mt8195: Add thermal zone Content-Language: en-US To: Alexandre Bailon , robh+dt@kernel.org, krzk+dt@kernel.org, matthias.bgg@gmail.com, p.zabel@pengutronix.de Cc: rafael@kernel.org, daniel.lezcano@linaro.org, amitk@kernel.org, rui.zhang@intel.com, michael.kao@mediatek.com, ben.tseng@mediatek.com, ethan.chang@mediatek.com, frank-w@public-files.de, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, khilman@baylibre.com, Tinghan Shen References: <20220512122433.1399802-1-abailon@baylibre.com> <20220512122433.1399802-8-abailon@baylibre.com> From: Krzysztof Kozlowski In-Reply-To: <20220512122433.1399802-8-abailon@baylibre.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 12/05/2022 14:24, Alexandre Bailon wrote: > From: Tinghan Shen > > This adds the thermal zone for the mt8195. > > Signed-off-by: Tinghan Shen > Signed-off-by: Ben Tseng > Signed-off-by: Alexandre Bailon > --- > arch/arm64/boot/dts/mediatek/mt8195.dtsi | 103 +++++++++++++++++++++++ > 1 file changed, 103 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi > index 12887fb4d0d1..d6e5b595a89f 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi > @@ -823,6 +823,21 @@ spi0: spi@1100a000 { > status = "disabled"; > }; > > + lvts: lvts@1100b000 { Generic node names. > + compatible = "mediatek,mt8195-lvts"; > + #thermal-sensor-cells = <1>; > + reg = <0 0x1100b000 0 0x1000>, > + <0 0x11278000 0 0x1000>; > + interrupts = , > + ; > + clocks = <&infracfg_ao CLK_INFRA_AO_THERM>; > + clock-names = "lvts_clk"; > + resets = <&infracfg_rst 1>, > + <&infracfg_rst 2>; > + nvmem-cells = <&lvts_e_data1 &lvts_e_data2>; > + nvmem-cell-names = "e_data1","e_data2"; > + }; > + > spi1: spi@11010000 { > compatible = "mediatek,mt8195-spi", > "mediatek,mt6765-spi"; > @@ -1627,4 +1642,92 @@ vencsys_core1: clock-controller@1b000000 { > #clock-cells = <1>; > }; > }; > + > + thermal_zones: thermal-zones { > + cpu_big1 { No underscores in node names. Generic node names - please open existing thermal zones schema and look how it is done. This probably fails validation, so be sure your DTS passes make dtbs_check. Best regards, Krzysztof