From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 92EA418D65E; Mon, 24 Mar 2025 07:23:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742801002; cv=none; b=oWFiibHdnHyxxs5sK6k0U+WPM6qNvOLf6mbZVK9ja6UwCzpqsqm8aq+yfvV2BFxWxymblSQTAuJogkD/jUMYWOesMVO3RlkoVU8QdSaN0Vb/fn/T1PbDEZ1zS1OBqCGdGLlkNf09P2ladapzmOyGY2e2spKHX72owcLZ9Fu7Slw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742801002; c=relaxed/simple; bh=rpacFajQmnF5jVC9M6bEwsXc0x3PG4bR6WjOaYeWR3I=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=cQM/+TZm9YRCQ/8VFgD2Cu8Yi9R8IpND5iIg7LAaP6Ss+DhpTOcH0LGlkXsrkV5Mu7+B+GenKz1jDZc7cqvJTMCFlr2a8hApALnEVwuWNtcbN3Hkhjr/2XiwpQbGNaasX9Fw+JhJUfr/4oaB9pW4eOOV3pEKkIEXG7QCcakUSAg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=WHV52Z5m; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="WHV52Z5m" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D68FBC4CEE4; Mon, 24 Mar 2025 07:23:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742801001; bh=rpacFajQmnF5jVC9M6bEwsXc0x3PG4bR6WjOaYeWR3I=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=WHV52Z5mueIEeKyjSCQE5yZvtpoepiA3LImk9pMIVARR6WRmQbCssqenJl+KtfIDL e1WnKlpcLFOf9/PdXvXn5ukLUjrIgdtePi6q5jxxFpiBTe+bmLsJXuWF9+DOGXpAeE 85owSCBYk7xB9N3/LNfBaBajRoVcBurb6RP5PRJzgSX7V4IPk71xEdkQZ5ICtbcSd0 uhUbXJYw3pXc7zWAMOrzKkDDKKxIgKZNep9ql05q67ymmu391YMzQYvLi19jwrs2z0 u7aJsHYoQhLrcvYxOMqLcglQfPRRy25E0W9sz9Uram1aDm1hNFpi78yJ7/l/PauQgw ZAEFgr3Uz9IDw== Message-ID: Date: Mon, 24 Mar 2025 08:23:13 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] dt-bindings: misc: bist: Add BIST dt-binding for TI K3 devices To: Neha Malcom Francis Cc: nm@ti.com, vigneshr@ti.com, kristo@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, u-kumar1@ti.com References: <20241128140825.263216-1-n-francis@ti.com> <20241128140825.263216-2-n-francis@ti.com> <837d329b-bcdd-4c3b-b508-e916b110ce25@ti.com> <8e58b093-1c64-45b9-a9d3-9835a3bbc4fd@ti.com> <1da4e402-62f3-4bad-9129-1f5a08148987@kernel.org> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 19/03/2025 10:02, Neha Malcom Francis wrote: > Hi Krzysztof, > > On 19/03/25 13:16, Krzysztof Kozlowski wrote: >> On 13/03/2025 12:14, Neha Malcom Francis wrote: >>> Hi Krzysztof >>> >>> On 29/11/24 14:45, Krzysztof Kozlowski wrote: >>>> On 29/11/2024 08:43, Neha Malcom Francis wrote: >>>>>>> + >>>>>>> + power-domains: >>>>>>> + maxItems: 1 >>>>>>> + >>>>>>> + ti,bist-instance: >>>>>>> + $ref: /schemas/types.yaml#/definitions/uint32 >>>>>>> + description: >>>>>>> + the BIST instance in the SoC represented as an integer >>>>>> >>>>>> No instance indices are allowed. Drop. >>>>>> >>>>> >>>>> Question on this, this is not a property that is driven by software but rather >>>>> indicates which register sequences have to be picked up for triggering this test >>>>> from this instance. So I don't see how I can workaround this without getting >>>>> this number. Or maybe call it ID rather than instance? >>>> >>>> I don't understand how the device operates, so what is exactly behind >>>> some sequences of registers for triggering this test. You described >>>> property as index or ID of one instance of the block. That's not what we >>>> want in the binding. That's said maybe other, different hardware >>>> characteristic is behind, who knows. Or maybe it's about callers... or >>>> maybe that's not hardware property at all, but runtime OS, who knows. >>>> >>> >>> Sorry for such a late reply, but I was hoping to get more details on >>> this "ID" and never got back to the thread... >>> >>> The best way I can describe is this device (BIST) runs a safety >>> diagnostic test on a bunch of processors/blocks (let's call them >>> targets). There's a mapping between the instance of this device and the >>> targets it will run the test. This ID was essentially letting the BIST >>> driver know which are these targets. >> >> >> So you want to configure some target? Then this is your property. If you >> want to configure 'foo' difference in DT, you do not write 'bar'... >> > > So the difficulty in doing this is, what I mentioned in the earlier > email just copying it over again: > > "Yet another way would be the BIST points out the targets it controls via > their phandles in its node... but this approach would trigger the probe No, it would not. Which part of OF kernel code causes probe ordering (device links) if some random phandle appears? > of these targets before the test runs on them. And in hardware, the test > must run only one before the device is used, else we see indefinite > behavior." > > Property that has a list of strings (targets) instead of phandles maybe? > Would that be acceptable? Best regards, Krzysztof