From: Icenowy Zheng <uwu@icenowy.me>
To: Conor Dooley <conor@kernel.org>, Samuel Holland <samuel@sholland.org>
Cc: Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
linux-sunxi@lists.linux.dev, Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Jisheng Zhang <jszhang@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Andre Przywara <andre.przywara@arm.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Anup Patel <apatel@ventanamicro.com>,
Atish Patra <atishp@rivosinc.com>,
Christian Hewitt <christianshewitt@gmail.com>,
Conor Dooley <conor.dooley@microchip.com>,
Guo Ren <guoren@kernel.org>,
Heinrich Schuchardt <heinrich.schuchardt@canonical.com>,
Linus Walleij <linus.walleij@linaro.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Stanislav Jakubek <stano.jakubek@gmail.com>
Subject: Re: [PATCH v2 04/12] riscv: dts: allwinner: Add the D1/D1s SoC devicetree
Date: Fri, 02 Dec 2022 16:27:25 +0800 [thread overview]
Message-ID: <a2441e5ca47ff90474cd844801e6c7c43af91f50.camel@icenowy.me> (raw)
In-Reply-To: <Y4I45Uu6eFKUo69B@spud>
在 2022-11-26星期六的 16:03 +0000,Conor Dooley写道:
> On Fri, Nov 25, 2022 at 05:46:48PM -0600, Samuel Holland wrote:
> > D1 (aka D1-H), D1s (aka F133), R528, and T113 are a family of SoCs
> > based
> > on a single die, or at a pair of dies derived from the same design.
> >
> > D1 and D1s contain a single T-HEAD Xuantie C906 CPU, whereas R528
> > and
> > T113 contain a pair of Cortex-A7's.
>
> Is this "additionally contain" or a case of the D1 is the R528 but
> with
> s/arm/riscv/? It's the latter, right?
Technically they're the same die, but the CPU cores are selectively
enabled, and at least what Allwinner says is that D1 contains only RV
and R528 contains only ARM.
>
> > D1 and R528 are the full version of
> > the chip with a BGA package, whereas D1s and T113 are low-pin-count
> > QFP
> > variants.
> >
> > Because the original design supported both ARM and RISC-V CPUs,
> > some
> > peripherals are duplicated. In addition, all variants except D1s
> > contain
> > a HiFi 4 DSP with its own set of peripherals.
> >
> > The devicetrees are organized to minimize duplication:
> > - Common perhiperals are described in sunxi-d1s-t113.dtsi
> > - DSP-related peripherals are described in sunxi-d1-t113.dtsi
> > - RISC-V specific hardware is described in sun20i-d1s.dtsi
> > - Functionality unique to the D1 variant is described in sun20i-
> > d1.dtsi
> >
> > The SOC_PERIPHERAL_IRQ macro handles the different #interrupt-cells
> > values between the ARM (GIC) and RISC-V (PLIC) versions of the SoC.
>
> Modulo the warnings I replied to the cover with & one minor comment
> below:
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
>
> > Signed-off-by: Samuel Holland <samuel@sholland.org>
> > ---
> >
> > Changes in v2:
> > - Split into separate files for sharing with D1s/R528/T113
> > - Use SOC_PERIPHERAL_IRQ macro for interrupts
> > - Rename osc24M to dcxo and move the frequency to the board DTs
> > - Drop analog LDOs due to the missing binding
> > - Correct tcon_top DSI clock reference
> > - Add DMIC, DSI controller, and DPHY (bindings are in linux-next)
> > - Add CPU OPP table
> >
> > arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi | 66 ++
> > arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 76 ++
> > .../boot/dts/allwinner/sunxi-d1-t113.dtsi | 15 +
> > .../boot/dts/allwinner/sunxi-d1s-t113.dtsi | 844
> > ++++++++++++++++++
> > 4 files changed, 1001 insertions(+)
> > create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi
> > create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> > create mode 100644 arch/riscv/boot/dts/allwinner/sunxi-d1-
> > t113.dtsi
> > create mode 100644 arch/riscv/boot/dts/allwinner/sunxi-d1s-
> > t113.dtsi
>
>
> > diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> > b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> > new file mode 100644
> > index 000000000000..c8815cbf0b46
> > --- /dev/null
> > +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> > @@ -0,0 +1,844 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
> > +// Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>
> > +
> > +#include <dt-bindings/clock/sun6i-rtc.h>
> > +#include <dt-bindings/clock/sun8i-de2.h>
> > +#include <dt-bindings/clock/sun8i-tcon-top.h>
> > +#include <dt-bindings/clock/sun20i-d1-ccu.h>
> > +#include <dt-bindings/clock/sun20i-d1-r-ccu.h>
> > +#include <dt-bindings/interrupt-controller/irq.h>
> > +#include <dt-bindings/reset/sun8i-de2.h>
> > +#include <dt-bindings/reset/sun20i-d1-ccu.h>
> > +#include <dt-bindings/reset/sun20i-d1-r-ccu.h>
> > +
> > +/ {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > +
> > + dcxo: dcxo-clk {
> > + compatible = "fixed-clock";
> > + /* This value must be overridden by the board */
> > + clock-frequency = <0>;
>
> Since this is a "must", can you drop the clock-frequency = <0> here
> so
> that if someone doesn't override it in their board dt-validate
> complains?
>
> Thanks,
> Conor.
>
> > + clock-output-names = "dcxo";
> > + #clock-cells = <0>;
> > + };
> > +
>
>
next prev parent reply other threads:[~2022-12-02 8:30 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-25 23:46 [PATCH v2 00/12] riscv: Allwinner D1/D1s platform support Samuel Holland
2022-11-25 23:46 ` [PATCH v2 01/12] MAINTAINERS: Match the sun20i family of Allwinner SoCs Samuel Holland
2022-11-26 0:12 ` Guo Ren
2022-12-05 20:22 ` Jernej Škrabec
2022-11-25 23:46 ` [PATCH v2 02/12] dt-bindings: vendor-prefixes: Add Allwinner D1/D1s board vendors Samuel Holland
2022-11-26 0:14 ` Guo Ren
2022-11-25 23:46 ` [PATCH v2 03/12] dt-bindings: riscv: Add Allwinner D1/D1s board compatibles Samuel Holland
2022-11-26 0:15 ` Guo Ren
2022-11-26 15:54 ` Conor Dooley
2022-11-28 20:55 ` Heiko Stübner
2022-11-25 23:46 ` [PATCH v2 04/12] riscv: dts: allwinner: Add the D1/D1s SoC devicetree Samuel Holland
2022-11-26 16:03 ` Conor Dooley
2022-12-02 8:27 ` Icenowy Zheng [this message]
2022-11-27 17:41 ` Andre Przywara
2022-11-27 19:22 ` Samuel Holland
2022-12-05 20:29 ` Jernej Škrabec
2022-12-02 8:29 ` Icenowy Zheng
2022-11-28 13:34 ` Bin Meng
2022-11-28 20:59 ` Heiko Stübner
2022-11-25 23:46 ` [PATCH v2 05/12] riscv: dts: allwinner: Add MangoPi MQ devicetree Samuel Holland
2022-11-26 0:20 ` Guo Ren
2022-12-05 20:32 ` Jernej Škrabec
2022-11-25 23:46 ` [PATCH v2 06/12] riscv: dts: allwinner: Add Allwinner D1 Nezha devicetree Samuel Holland
2022-11-26 0:21 ` Guo Ren
2022-11-26 16:19 ` Conor Dooley
2022-11-28 21:01 ` Heiko Stübner
2022-12-05 20:33 ` Jernej Škrabec
2022-11-25 23:46 ` [PATCH v2 07/12] riscv: dts: allwinner: Add Sipeed Lichee RV devicetrees Samuel Holland
2022-12-05 20:42 ` Jernej Škrabec
2022-11-25 23:46 ` [PATCH v2 08/12] riscv: dts: allwinner: Add MangoPi MQ Pro devicetree Samuel Holland
2022-11-26 0:25 ` Guo Ren
2022-12-05 20:42 ` Jernej Škrabec
2022-11-25 23:46 ` [PATCH v2 09/12] riscv: dts: allwinner: Add Dongshan Nezha STU devicetree Samuel Holland
2022-11-26 0:25 ` Guo Ren
2022-12-05 20:43 ` Jernej Škrabec
2022-12-05 20:45 ` Jernej Škrabec
2022-11-25 23:46 ` [PATCH v2 10/12] riscv: dts: allwinner: Add ClockworkPi and DevTerm devicetrees Samuel Holland
2022-11-25 23:46 ` [PATCH v2 11/12] riscv: Add the Allwinner SoC family Kconfig option Samuel Holland
2022-11-26 0:23 ` Guo Ren
2022-11-26 16:36 ` Conor Dooley
[not found] ` <CAJF2gTRpL7X+Td6cHhzJ5u2sRo15e4BGh+RKjKwB7fh8v8J2-g@mail.gmail.com>
2022-11-28 21:05 ` Heiko Stübner
2022-11-25 23:46 ` [PATCH v2 12/12] riscv: defconfig: Enable the Allwinner D1 platform and drivers Samuel Holland
2022-11-26 0:24 ` Guo Ren
2022-12-02 8:34 ` Icenowy Zheng
2022-11-26 16:40 ` Conor Dooley
2022-11-28 21:11 ` Heiko Stübner
2022-11-28 21:17 ` Conor Dooley
2022-11-29 6:49 ` Andrew Jones
2022-11-29 6:54 ` Conor Dooley
2022-11-30 20:24 ` Palmer Dabbelt
2022-11-30 21:49 ` Arnd Bergmann
2022-12-01 0:31 ` Andre Przywara
2022-11-26 10:24 ` [PATCH v2 00/12] riscv: Allwinner D1/D1s platform support Conor Dooley
2022-12-02 17:55 ` Palmer Dabbelt
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