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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id e26-20020a170906081a00b006f39ffe23fdsm627514ejd.0.2022.06.01.04.09.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 01 Jun 2022 04:09:30 -0700 (PDT) Message-ID: Date: Wed, 1 Jun 2022 13:09:28 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [RFC v2 1/2] clk: hisilicon: add CRG driver Hi3521a SoC Content-Language: en-US To: "Marty E. Plummer" Cc: arnd@arndb.de, cai.huoqing@linux.dev, christian.koenig@amd.com, devicetree@vger.kernel.org, gengdongjiu@huawei.com, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, linux@armlinux.org.uk, michael@walle.cc, miquel.raynal@bootlin.com, mturquette@baylibre.com, novikov@ispras.ru, olof@lixom.net, p.yadav@ti.com, rdunlap@infradead.org, richard@nod.at, robh+dt@kernel.org, sboyd@kernel.org, soc@kernel.org, sumit.semwal@linaro.org, tudor.ambarus@microchip.com, vigneshr@ti.com, xuwei5@hisilicon.com References: <20220501054440.2434247-1-hanetzer@startmail.com> <20220501173423.2473093-1-hanetzer@startmail.com> <20220501173423.2473093-2-hanetzer@startmail.com> <20220601105846.7hriawg3stxb657f@proprietary-killer> <630b0d13-6778-2508-6a34-9daa0358047d@linaro.org> <20220601110616.xmxih663kxgupszv@proprietary-killer> From: Krzysztof Kozlowski In-Reply-To: <20220601110616.xmxih663kxgupszv@proprietary-killer> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 01/06/2022 13:06, Marty E. Plummer wrote: > On Wed, Jun 01, 2022 at 01:00:38PM +0200, Krzysztof Kozlowski wrote: >> On 01/06/2022 12:58, Marty E. Plummer wrote: >>> On Tue, May 03, 2022 at 01:37:42PM +0200, Krzysztof Kozlowski wrote: >>>> On 01/05/2022 19:34, Marty E. Plummer wrote: >>>>> Add CRG driver for Hi3521A SoC. CRG (Clock and Reset Generator) module >>>>> generates clock and reset signals used by other module blocks on SoC. >>>>> >>>>> Signed-off-by: Marty E. Plummer >>>>> --- >>>>> drivers/clk/hisilicon/Kconfig | 8 ++ >>>>> drivers/clk/hisilicon/Makefile | 1 + >>>>> drivers/clk/hisilicon/crg-hi3521a.c | 141 ++++++++++++++++++++++ >>>>> include/dt-bindings/clock/hi3521a-clock.h | 34 ++++++ >>>> >>>> Bindings go to separate patch. Your patchset is unmerge'able. >>>> >>> So, assuming I have the following patches: >>> 1: +include/dt-bindings/clock/hi3521a-clock.h >>> 2: +drivers/clk/hisilicon/crg-hi3521a.c >>> 3: +Documentation/devicetree/bindings/whatever >>> >>> In what order should they be applied? >> >> Applied or sent? The maintainer will apply them in proper order, this is >> bisectable. >> >> > Either or. Whatever makes the workload easier is what I'm looking for. Sorry, you need to be more specific. Apply is not a job for you, for the patch submitter. Then you miss here important piece - which is the first patch. DTS goes always via separate branch (or even tree) from driver changes. That's why bindings are always separate first patches. Best regards, Krzysztof