From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D473FC761A6 for ; Tue, 28 Mar 2023 01:42:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232378AbjC1Bm1 (ORCPT ); Mon, 27 Mar 2023 21:42:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43426 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230287AbjC1BmY (ORCPT ); Mon, 27 Mar 2023 21:42:24 -0400 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7F946270B; Mon, 27 Mar 2023 18:42:05 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 3EFEE24E1CE; Tue, 28 Mar 2023 09:42:04 +0800 (CST) Received: from EXMBX172.cuchost.com (172.16.6.92) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 28 Mar 2023 09:42:04 +0800 Received: from [192.168.125.74] (113.72.145.117) by EXMBX172.cuchost.com (172.16.6.92) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 28 Mar 2023 09:42:03 +0800 Message-ID: Date: Tue, 28 Mar 2023 09:42:02 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.3.2 Subject: Re: [PATCH v6 00/21] Basic clock, reset & device tree support for StarFive JH7110 RISC-V SoC Content-Language: en-US To: Conor Dooley CC: , , , Stephen Boyd , "Michael Turquette" , Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Palmer Dabbelt , Paul Walmsley , Albert Ou , Ben Dooks , Daniel Lezcano , Thomas Gleixner , Marc Zyngier , "Emil Renner Berthing" , References: <20230320103750.60295-1-hal.feng@starfivetech.com> <29ba8a8d-940d-4b49-bd86-5cd5df002c23@spud> From: Hal Feng In-Reply-To: <29ba8a8d-940d-4b49-bd86-5cd5df002c23@spud> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [113.72.145.117] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX172.cuchost.com (172.16.6.92) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Mon, 27 Mar 2023 23:50:18 +0100, Conor Dooley wrote: > Hey Hal, > > On Mon, Mar 20, 2023 at 06:37:29PM +0800, Hal Feng wrote: >> This patch series adds basic clock, reset & DT support for StarFive >> JH7110 SoC. > > Probably obvious at this point given the number of outstanding comments > on this version, but I'm gonna mark this series as "Changes Requested" > on the RISC-V patchwork. I'm not sure what Stephen's cutoff for stuff is, > but I'd like to have stuff ready to go to Arnd for -rc6, so you still > have some time for another revision I think :) Thanks for reminding. I will submit the next revision today or tomorrow. Best regards, Hal