From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org,
Prabhakar <prabhakar.csengg@gmail.com>,
Biju Das <biju.das.jz@bp.renesas.com>
Subject: Re: [PATCH 1/2] dt-bindings: clock: r9a07g043-cpg: Add Renesas RZ/Five CPG Clock and Reset Definitions
Date: Thu, 23 Jun 2022 14:05:18 +0200 [thread overview]
Message-ID: <a2c5cdec-632e-3d90-c90d-1c3c0503e825@linaro.org> (raw)
In-Reply-To: <20220622181723.13033-2-prabhakar.mahadev-lad.rj@bp.renesas.com>
On 22/06/2022 20:17, Lad Prabhakar wrote:
> Renesas RZ/Five SoC has almost the same clock structure compared to the
> Renesas RZ/G2UL SoC, re-use the r9a07g043-cpg.h header file and just
> amend the RZ/Five CPG clock and reset definitions.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> include/dt-bindings/clock/r9a07g043-cpg.h | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-06-23 12:05 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-22 18:17 [PATCH 0/2] Add CPG wrapper for Renesas RZ/Five SoC Lad Prabhakar
2022-06-22 18:17 ` [PATCH 1/2] dt-bindings: clock: r9a07g043-cpg: Add Renesas RZ/Five CPG Clock and Reset Definitions Lad Prabhakar
2022-06-23 12:05 ` Krzysztof Kozlowski [this message]
2022-06-28 9:48 ` Geert Uytterhoeven
2022-06-22 18:17 ` [PATCH 2/2] clk: renesas: r9a07g043: Add support for RZ/Five SoC Lad Prabhakar
2022-06-28 9:48 ` Geert Uytterhoeven
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