From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sergei Shtylyov Subject: Re: [PATCH 1/2] arm64: dts: renesas: r8a77980: add I2C support Date: Tue, 29 May 2018 19:04:48 +0300 Message-ID: References: <3675b19f-b800-172f-9472-c47a37760fa9@cogentembedded.com> <20180529130504.lpkpgads7lfomois@verge.net.au> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20180529130504.lpkpgads7lfomois@verge.net.au> Content-Language: en-MW List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Simon Horman Cc: Mark Rutland , devicetree@vger.kernel.org, Magnus Damm , Catalin Marinas , Will Deacon , linux-renesas-soc@vger.kernel.org, Rob Herring , "linux-arm-kernel@lists.infradead.org" List-Id: devicetree@vger.kernel.org On 05/29/2018 04:05 PM, Simon Horman wrote: >> Define the generic R8A77980 parts of the I2C[0-5] device node. >> >> Based on the original (and large) patch by Vladimir Barinov. >> >> Signed-off-by: Vladimir Barinov >> Signed-off-by: Sergei Shtylyov >> >> --- >> arch/arm64/boot/dts/renesas/r8a77980.dtsi | 111 ++++++++++++++++++++++++++++++ >> 1 file changed, 111 insertions(+) >> >> Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi >> =================================================================== >> --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi >> +++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi [...] >> @@ -135,6 +144,108 @@ [...] >> + i2c3: i2c@e66d0000 { >> + compatible = "renesas,i2c-r8a77980", >> + "renesas,rcar-gen3-i2c"; >> + reg = <0 0xe66d0000 0 0x40>; >> + interrupts = ; >> + clocks = <&cpg CPG_MOD 928>; >> + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; >> + resets = <&cpg 928>; >> + dmas = <&dmac1 0x97>, <&dmac1 0x96>, >> + <&dmac2 0x97>, <&dmac2 0x96>; >> + dma-names = "tx", "rx", "tx", "rx"; >> + i2c-scl-internal-delay-ns = <6>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + status = "disabled"; >> + }; > > DMA for i2c3 and i2c4 seems unclear in v0.80 and v1.00 of the User's Manual. > Although what is described here does match v0.55E of the User's Manual. Hm, looking at all these manuals, I'm not even seeing V3H I2C3/4 having DMA in v0.55E! > Have you been able to confirm what is correct here? No. Probably need to drop I2C3/4 DMA altogether... > Other than that this patch looks fine to me. TY! [...] MBR, Sergei