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Wysocki" , Viresh Kumar , Linus Walleij , Wim Van Sebroeck , Guenter Roeck , Catalin Marinas , Will Deacon , Lorenzo Pieralisi , Mark Kettenis , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org, Konrad Dybcio , Ivaylo Ivanov References: <20240911084353.28888-2-towinchenmi@gmail.com> <20240911084353.28888-3-towinchenmi@gmail.com> <20240911-unsuited-pranker-60a7d0b6caf9@spud> From: Nick Chan In-Reply-To: <20240911-unsuited-pranker-60a7d0b6caf9@spud> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12/9/2024 02:16, Conor Dooley wrote: > On Wed, Sep 11, 2024 at 04:40:51PM +0800, Nick Chan wrote: >> Add the following CPU cores: >> >> - apple,cyclone: A7 cores >> - apple,typhoon: A8 cores >> - apple,twister: A9 cores >> - apple,hurricane-zephyr: A10 logical cores >> - apple,monsoon: A11 performance cores >> - apple,mistral: A11 efficiency cores >> >> In the Apple A10, there are physical performance-efficiency cores that >> forms logical cores to software depending on the current p-state, and >> only one type of core may be active at one time. >> >> Signed-off-by: Nick Chan >> --- >> Documentation/devicetree/bindings/arm/cpus.yaml | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml >> index f308ff6c3532..3959e022079f 100644 >> --- a/Documentation/devicetree/bindings/arm/cpus.yaml >> +++ b/Documentation/devicetree/bindings/arm/cpus.yaml >> @@ -89,6 +89,12 @@ properties: >> - apple,blizzard >> - apple,icestorm >> - apple,firestorm >> + - apple,mistral >> + - apple,monsoon >> + - apple,hurricane-zephyr >> + - apple,twister >> + - apple,typhoon >> + - apple,cyclone > > Same on this one, can you add these in alphanumerical order, even if the > existing 3 devices are not in it? You could take the opportunity to > reshuffle icestorm and firestorm while you're at it. (Same goes for the watchdog, pinctrl and cluster-cpufreq bindings) I am not actually sure what is the right thing to do here. It seems that these bindings are originally sorted using SoC types (desktop or mobile) and generations. But then again I have looked at some other in-tree bindings from asahi, and it seems to be a mix of alphabetical and logical sorting in the way mentioned above. Maybe we can get some clarification from an Asahi Maintainer? For the soc-level machine compatibles though, I believe that should be retaining the logical order instead of trying to use alphabetical order. > > Cheers, > Conor. > >> - arm,arm710t >> - arm,arm720t >> - arm,arm740t >> -- >> 2.46.0 >> Nick Chan