Re: [PATCH v6 2/2] arm64: dts: mt8195: Add Ethernet controller

["Biao Huang (黄彪)" <Biao.Huang@mediatek.com>]

On Wed, 2022-12-28 at 17:13 +0100, Andrew Lunn wrote:
> > --- a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
> > +++ b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
> > @@ -258,6 +258,66 @@ &mt6359_vsram_others_ldo_reg {
> >  };
> >  
> > +&eth {
> > +	phy-mode ="rgmii-id";
> > +	phy-handle = <&ethernet_phy0>;
> > +	snps,reset-gpio = <&pio 93 GPIO_ACTIVE_HIGH>;
> > +	snps,reset-delays-us = <0 10000 10000>;
> > +	pinctrl-names = "default", "sleep";
> > +	pinctrl-0 = <&eth_default_pins>;
> > +	pinctrl-1 = <&eth_sleep_pins>;
> > +	status = "okay";
> > +
> > +	mdio {
> > +		compatible = "snps,dwmac-mdio";
> > +		#address-cells = <1>;
> > +		#size-cells = <0>;
> 
> The mdio bus master is a property of the SoC, not the board. So i
> would expect it be in the .dtsi file.
OK, will move mdio to .dtsi.
> 
> > +		ethernet_phy0: ethernet-phy@1 {
> > +			compatible = "ethernet-phy-id001c.c916";
> > +			reg = <0x1>;
> > +		};
> 
> Is the PHY integrated into the SoC, or on the board?
The PHY is on the board, an external device as to SoC.
> 
> You also don't need the compatible, if the PHY correctly implements
> the ID registers.
But without the compatible, it seems PHY driver will not be attached.
How should I do? Thanks in advance.
> 
>    Andrew
Best Regards!
Biao