Re: [PATCH v5 1/2] dt-bindings: Add DT schema for Arm Mali Valhall GPU

[Nick Fan <nick.fan@mediatek.com>]

On Sat, 2021-02-06 at 06:04 +0800, Rob Herring wrote:
> On Thu, Jan 28, 2021 at 10:23:41AM +0800, Nick Fan wrote:
> > Add devicetree schema for Arm Mali Valhall GPU
> > 
> > Define a compatible string for the Mali Valhall GPU
> > for Mediatek's SoC platform.
> > 
> > Signed-off-by: Nick Fan <Nick.Fan@mediatek.com>
> > ---
> >  .../bindings/gpu/arm,mali-valhall.yaml        | 217
> > ++++++++++++++++++
> >  1 file changed, 217 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-
> > valhall.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-
> > valhall.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-
> > valhall.yaml
> > new file mode 100644
> > index 000000000000..275c14ad173a
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall.yaml
> > @@ -0,0 +1,217 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +# Copyright (c) 2020 MediaTek Inc.
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/gpu/arm,mali-valhall.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: ARM Mali Valhall GPU
> > +
> > +maintainers:
> > +  - Rob Herring <robh@kernel.org>
> > +
> > +properties:
> > +  $nodename:
> > +    pattern: '^gpu@[a-f0-9]+$'
> > +
> > +  compatible:
> > +    items:
> > +      - enum:
> > +          - mediatek,mt8192-mali
> > +      - const: arm,mali-valhall
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  interrupts:
> > +    items:
> > +      - description: GPU interrupt
> > +      - description: MMU interrupt
> > +      - description: Job interrupt
> > +
> > +  interrupt-names:
> > +    items:
> > +      - const: gpu
> > +      - const: mmu
> > +      - const: job
> 
> Please use the same order as midgard and bifrost.
This will fix in the next version v6.
With the same order as midgard and bifrost.
> 
> > +
> > +  clocks:
> > +    minItems: 1
> > +
> > +  power-domains:
> > +    minItems: 1
> > +    maxItems: 5
> > +
> > +  mali-supply: true
> > +  sram-supply: true
> > +
> > +  operating-points-v2: true
> > +  opp_table: true
> 
> opp-table
This will fix in the next version v6.
> 
> > +
> > +  "#cooling-cells":
> > +    const: 2
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - interrupts
> > +  - interrupt-names
> > +  - clocks
> > +
> > +additionalProperties: false
> > +
> > +allOf:
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            const: mediatek,mt8192-mali
> > +    then:
> > +      properties:
> > +        power-domains:
> > +          minItems: 5
> > +          maxItems: 5
> > +
> > +        power-domain-names:
> > +          items:
> > +            - const: core0
> > +            - const: core1
> > +            - const: core2
> > +            - const: core3
> > +            - const: core4
> > +
> > +      required:
> > +        - sram-supply
> > +        - power-domains
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/interrupt-controller/irq.h>
> > +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +    gpu@13000000 {
> > +           compatible = "mediatek,mt8192-mali", "arm,mali-
> > valhall";
> 
> Do 4 space indent.
This will fix in the next version v6.
> 
> > +           reg = <0x13000000 0x4000>;
> > +           interrupts =
> > +                   <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH 0>,
> > +                   <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH 0>,
> > +                   <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH 0>;
> > +           interrupt-names =
> > +                   "gpu",
> > +                   "mmu",
> > +                   "job";
> > +
> > +           clocks = <&mfgcfg 0>;
> > +
> > +           power-domains =
> > +                   <&spm 4>,
> > +                   <&spm 5>,
> > +                   <&spm 6>,
> > +                   <&spm 7>,
> > +                   <&spm 8>;
> > +
> > +           operating-points-v2 = <&gpu_opp_table>;
> > +           mali-supply = <&mt6315_7_vbuck1>;
> > +           sram-supply = <&mt6359_vsram_others_ldo_reg>;
> > +           gpu_opp_table: opp_table {
> > +             compatible = "operating-points-v2";
> 
> And then the same here.
This will fix in the next version v6.
> 
> > +             opp-shared;
> > +
> > +             opp-358000000 {
> > +                   opp-hz = /bits/ 64 <358000000>;
> > +                   opp-microvolt = <606250>,
> > +                                   <750000>;
> 
> Isn't this supposed to be either a single value or <min max nominal>?
I use single value.
It required two regulators for this platform.
So I separate them by angular brackets <>.
> 
> > +             };
> > +
> > +             opp-399000000 {
> > +                   opp-hz = /bits/ 64 <399000000>;
> > +                   opp-microvolt = <618750>,
> > +                                   <750000>;
> > +             };
> > +
> > +             opp-440000000 {
> > +                   opp-hz = /bits/ 64 <440000000>;
> > +                   opp-microvolt = <631250>,
> > +                                   <750000>;
> > +             };
> > +
> > +             opp-482000000 {
> > +                   opp-hz = /bits/ 64 <482000000>;
> > +                   opp-microvolt = <643750>,
> > +                                   <750000>;
> > +             };
> > +
> > +             opp-523000000 {
> > +                   opp-hz = /bits/ 64 <523000000>;
> > +                   opp-microvolt = <656250>,
> > +                                   <750000>;
> > +             };
> > +
> > +             opp-564000000 {
> > +                   opp-hz = /bits/ 64 <564000000>;
> > +                   opp-microvolt = <668750>,
> > +                                   <750000>;
> > +             };
> > +
> > +             opp-605000000 {
> > +                   opp-hz = /bits/ 64 <605000000>;
> > +                   opp-microvolt = <681250>,
> > +                                   <750000>;
> > +             };
> > +
> > +             opp-647000000 {
> > +                   opp-hz = /bits/ 64 <647000000>;
> > +                   opp-microvolt = <693750>,
> > +                                   <750000>;
> > +             };
> > +
> > +             opp-688000000 {
> > +                   opp-hz = /bits/ 64 <688000000>;
> > +                   opp-microvolt = <706250>,
> > +                                   <750000>;
> > +             };
> > +
> > +             opp-724000000 {
> > +                   opp-hz = /bits/ 64 <724000000>;
> > +                   opp-microvolt = <725000>,
> > +                                   <750000>;
> > +             };
> > +
> > +             opp-760000000 {
> > +                   opp-hz = /bits/ 64 <760000000>;
> > +                   opp-microvolt = <743750>,
> > +                                   <750000>;
> > +             };
> > +
> > +             opp-795000000 {
> > +                   opp-hz = /bits/ 64 <795000000>;
> > +                   opp-microvolt = <762500>,
> > +                                   <762500>;
> > +             };
> > +
> > +             opp-831000000 {
> > +                   opp-hz = /bits/ 64 <831000000>;
> > +                   opp-microvolt = <781250>,
> > +                                   <781250>;
> > +             };
> > +
> > +             opp-855000000 {
> > +                   opp-hz = /bits/ 64 <855000000>;
> > +                   opp-microvolt = <793750>,
> > +                                   <793750>;
> > +             };
> > +
> > +             opp-902000000 {
> > +                   opp-hz = /bits/ 64 <902000000>;
> > +                   opp-microvolt = <818750>,
> > +                                   <818750>;
> > +             };
> > +
> > +             opp-950000000 {
> > +                   opp-hz = /bits/ 64 <950000000>;
> > +                   opp-microvolt = <843750>,
> > +                                   <843750>;
> > +             };
> > +          };
> > +    };
> > +...
> > --
> > 2.18.0
> > 
> 
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