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Fri, 19 Sep 2025 01:48:08 -0700 (PDT) Message-ID: Date: Fri, 19 Sep 2025 11:48:06 +0300 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 4/6] arm64: dts: renesas: rzg3s-smarc-som: Update dma-ranges for PCIe To: Manivannan Sadhasivam Cc: Geert Uytterhoeven , bhelgaas@google.com, lpieralisi@kernel.org, kwilczynski@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, magnus.damm@gmail.com, p.zabel@pengutronix.de, linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Claudiu Beznea , Wolfram Sang References: <20250912122444.3870284-1-claudiu.beznea.uj@bp.renesas.com> <20250912122444.3870284-5-claudiu.beznea.uj@bp.renesas.com> <0a20c765-ff72-4c03-af84-dff3f4850fa4@tuxon.dev> From: Claudiu Beznea Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 9/19/25 11:25, Manivannan Sadhasivam wrote: > On Fri, Sep 19, 2025 at 10:38:52AM +0300, Claudiu Beznea wrote: >> Hi, Geert, >> >> On 9/18/25 13:00, Geert Uytterhoeven wrote: >>> Hi Claudiu, >>> >>> On Thu, 18 Sept 2025 at 11:47, Claudiu Beznea wrote: >>>> On 9/18/25 12:09, Geert Uytterhoeven wrote: >>>>> On Fri, 12 Sept 2025 at 14:24, Claudiu wrote: >>>>>> From: Claudiu Beznea >>>>>> >>>>>> The first 128MB of memory is reserved on this board for secure area. >>>>>> Secure area is a RAM region used by firmware. The rzg3s-smarc-som.dtsi >>>>>> memory node (memory@48000000) excludes the secure area. >>>>>> Update the PCIe dma-ranges property to reflect this. >>>>>> >>>>>> Tested-by: Wolfram Sang >>>>>> Signed-off-by: Claudiu Beznea >>>>> >>>>> Thanks for your patch! >>>>> >>>>>> --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi >>>>>> +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi >>>>>> @@ -214,6 +214,16 @@ &sdhi2 { >>>>>> }; >>>>>> #endif >>>>>> >>>>>> +&pcie { >>>>>> + /* First 128MB is reserved for secure area. */ >>>>> >>>>> Do you really have to take that into account here? I believe that >>>>> 128 MiB region will never be used anyway, as it is excluded from the >>>>> memory map (see memory@48000000). >>>>> >>>>>> + dma-ranges = <0x42000000 0 0x48000000 0 0x48000000 0x0 0x38000000>; >>>>> >>>>> Hence shouldn't you add >>>>> >>>>> dma-ranges = <0x42000000 0 0x48000000 0 0x48000000 0x0 0x38000000>; >>> >>> Oops, I really meant (forgot to edit after copying it): >>> >>> dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0x0 0x40000000>; >>> >>>>> >>>>> to the pcie node in arch/arm64/boot/dts/renesas/r9a08g045s33.dtsi >>>>> instead, like is done for all other Renesas SoCs that have PCIe? >>>> >>>> I chose to add it here as the rzg3s-smarc-som.dtsi is the one that defines >>>> the available memory for board, as the available memory is something board >>>> dependent. >>> >>> But IMHO it is independent from the amount of memory on the board. >>> On other SoCs, it has a comment: >>> >>> /* Map all possible DDR as inbound ranges */ >>> >>>> >>>> If you consider it is better to have it in the SoC file, please let me know. >>> >>> Hence yes please. >>> >>> However, I missed you already have: >>> >>> /* Map all possible DRAM ranges (4 GB). */ >>> dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0x1 0x0>; >>> >>> in r9a08g045.dtsi, so life's good. >>> >>> + >>>>>> +}; >>>>>> + >>>>>> +&pcie_port0 { >>>>>> + clocks = <&versa3 5>; >>>>>> + clock-names = "ref"; >>>>>> +}; >>>>> >>>>> This is not related. >>>> >>>> Ah, right! Could you please let me know if you prefer to have another patch >>>> or to update the patch description? >>> >>> Given the dma-ranges changes is IMHO not needed, >> >> I kept it here as the driver configures the PCIe registers for the inbound >> windows with the values passed though the dma-ranges. This is done through >> rzg3s_pcie_set_inbound_windows() -> rzg3s_pcie_set_inbound_window(). The >> controller will be aware that the secure area zone is something valid to >> work with. In that case, if my understanding of PCIe windows is right, I >> added this in the idea that an endpoint (a malicious one?) could DMA >> into/from secure area if we don't exclude it here? >> > > That's true. But do you really have an usecase to setup inbound window for the > endpoints? What does the endpoint do with this memory? I don't have a usecase for this. I did this update just to be safe for the described scenario. > > - Mani >