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Thu, 28 Dec 2023 06:04:04 -0800 (PST) Received: from salami.lan ([80.111.64.44]) by smtp.gmail.com with ESMTPSA id l4-20020a5d6744000000b00336710ddea0sm17155630wrw.59.2023.12.28.06.04.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Dec 2023 06:04:03 -0800 (PST) Message-ID: Subject: Re: [PATCH v2 11/12] arm64: dts: exynos: gs101: define USI8 with I2C configuration From: =?ISO-8859-1?Q?Andr=E9?= Draszik To: Tudor Ambarus , peter.griffin@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, conor+dt@kernel.org, andi.shyti@kernel.org, alim.akhtar@samsung.com, gregkh@linuxfoundation.org, jirislaby@kernel.org, s.nawrocki@samsung.com, tomasz.figa@gmail.com, cw00.choi@samsung.com, arnd@arndb.de, semen.protsenko@linaro.org Cc: saravanak@google.com, willmcvicker@google.com, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-serial@vger.kernel.org, kernel-team@android.com Date: Thu, 28 Dec 2023 14:04:02 +0000 In-Reply-To: <20231228125805.661725-12-tudor.ambarus@linaro.org> References: <20231228125805.661725-1-tudor.ambarus@linaro.org> <20231228125805.661725-12-tudor.ambarus@linaro.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.50.2-1 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Hi Tudor, On Thu, 2023-12-28 at 12:58 +0000, Tudor Ambarus wrote: > [...] >=20 > diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/bo= ot/dts/exynos/google/gs101.dtsi > index 0e5b1b490b0b..c6ae33016992 100644 > --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi > +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi > @@ -354,6 +354,35 @@ pinctrl_peric0: pinctrl@10840000 { > =C2=A0 interrupts =3D ; > =C2=A0 }; > =C2=A0 > + usi8: usi@109700c0 { > + compatible =3D "google,gs101-usi", > + =C2=A0=C2=A0=C2=A0=C2=A0 "samsung,exynos850-usi"; > + reg =3D <0x109700c0 0x20>; > + ranges; > + #address-cells =3D <1>; > + #size-cells =3D <1>; > + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>, > + <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI8_USI_CLK>; > + clock-names =3D "pclk", "ipclk"; Given the clock-names, shouldn't the clock indices be the other way around?= Also see below. > + samsung,sysreg =3D <&sysreg_peric0 0x101c>; > + status =3D "disabled"; > + > + hsi2c_8: i2c@10970000 { > + compatible =3D "google,gs101-hsi2c", > + =C2=A0=C2=A0=C2=A0=C2=A0 "samsung,exynosautov9-hsi2c"; > + reg =3D <0x10970000 0xc0>; > + interrupts =3D ; > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&hsi2c8_bus>; > + clocks =3D <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>, > + <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI8_USI_CLK>; > + clock-names =3D "hsi2c", "hsi2c_pclk"; Here, pclk =3D=3D CLK_GOUT_PERIC0_CLK_PERIC0_USI8_USI_CLK (which is correct= , I believe), whereas above pclk =3D=3D CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7 Cheers, A.