From: Adrian Hunter <adrian.hunter@intel.com>
To: Manikandan Muralidharan <manikandan.m@microchip.com>,
<alexandre.belloni@bootlin.com>, <Frank.Li@nxp.com>,
<robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<nicolas.ferre@microchip.com>, <claudiu.beznea@tuxon.dev>,
<linux@armlinux.org.uk>, <mturquette@baylibre.com>,
<sboyd@kernel.org>, <ardb@kernel.org>, <ebiggers@google.com>,
<martin.petersen@oracle.com>, <tytso@mit.edu>,
<cristian.birsan@microchip.com>, <jarkko.nikula@linux.intel.com>,
<kees@kernel.org>, <npitre@baylibre.com>,
<linux-i3c@lists.infradead.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-clk@vger.kernel.org>
Subject: Re: [PATCH v3 3/5] i3c: mipi-i3c-hci: add microchip sama7d65 SoC compatible with the appropriate quirk
Date: Thu, 12 Mar 2026 11:29:25 +0200 [thread overview]
Message-ID: <a41378a0-d2f1-4fa4-ac6d-1d0916590b47@intel.com> (raw)
In-Reply-To: <20260312042056.309237-4-manikandan.m@microchip.com>
On 12/03/2026 06:20, Manikandan Muralidharan wrote:
> Add support for microchip sama7d65 SoC I3C HCI master only IP
> with additional clock support to enable bulk clock acquisition
> for Microchip platforms using HCI_QUIRK_CLK_SUPPORT quirk.
> Introduce MCHP_I3C_CLK_IDX to define the maximum peripheral
> clock index
>
> Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
> ---
> Changes in v3:
> - Make use of existing HCI_QUIRK_* code base
> - Introduce HCI_QUIRK_CLK_SUPPORT to handle/enable the required Peripheral
> and system generic clk in bulk
>
> Changes in v2:
> - Platform specific changes are integrated in the existing mipi-i3c-hci
> driver by introducing separate MCHP_HCI_QUIRK_* quirks and vendor
> specific quirk files
>
> ---
> drivers/i3c/master/mipi-i3c-hci/core.c | 12 ++++++++++++
> drivers/i3c/master/mipi-i3c-hci/hci.h | 4 ++++
> 2 files changed, 16 insertions(+)
>
> diff --git a/drivers/i3c/master/mipi-i3c-hci/core.c b/drivers/i3c/master/mipi-i3c-hci/core.c
> index 5879bba78164..6b7716bd517e 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/core.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/core.c
> @@ -8,6 +8,7 @@
> */
>
> #include <linux/bitfield.h>
> +#include <linux/clk.h>
> #include <linux/device.h>
> #include <linux/errno.h>
> #include <linux/i3c/master.h>
> @@ -918,6 +919,7 @@ static int i3c_hci_probe(struct platform_device *pdev)
> {
> const struct mipi_i3c_hci_platform_data *pdata = pdev->dev.platform_data;
> struct i3c_hci *hci;
> + struct clk_bulk_data *clks;
> int irq, ret;
>
> hci = devm_kzalloc(&pdev->dev, sizeof(*hci), GFP_KERNEL);
> @@ -946,6 +948,13 @@ static int i3c_hci_probe(struct platform_device *pdev)
> if (!hci->quirks && platform_get_device_id(pdev))
> hci->quirks = platform_get_device_id(pdev)->driver_data;
>
> + if (hci->quirks & HCI_QUIRK_CLK_SUPPORT) {
> + ret = devm_clk_bulk_get_all_enabled(&pdev->dev, &clks);
> + if (ret < MCHP_I3C_CLK_IDX)
Is MCHP_I3C_CLK_IDX really needed? Why not just:
if (ret <= 0)
i.e. don't you anyway have to assume DT has the clocks defined
correctly.
> + return dev_err_probe(&pdev->dev, ret,
> + "Failed to get clocks\n");
> + }
> +
> ret = i3c_hci_init(hci);
> if (ret)
> return ret;
> @@ -971,6 +980,9 @@ static void i3c_hci_remove(struct platform_device *pdev)
>
> static const __maybe_unused struct of_device_id i3c_hci_of_match[] = {
> { .compatible = "mipi-i3c-hci", },
> + { .compatible = "microchip,sama7d65-i3c-hci",
> + .data = (void *)(HCI_QUIRK_PIO_MODE | HCI_QUIRK_OD_PP_TIMING |
> + HCI_QUIRK_RESP_BUF_THLD | HCI_QUIRK_CLK_SUPPORT) },
> {},
> };
> MODULE_DEVICE_TABLE(of, i3c_hci_of_match);
> diff --git a/drivers/i3c/master/mipi-i3c-hci/hci.h b/drivers/i3c/master/mipi-i3c-hci/hci.h
> index 337b7ab1cb06..2571ef6374ce 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/hci.h
> +++ b/drivers/i3c/master/mipi-i3c-hci/hci.h
> @@ -140,12 +140,16 @@ struct i3c_hci_dev_data {
> void *ibi_data;
> };
>
> +#define MCHP_I3C_CLK_IDX 2 /* Max peripheral clock index for Microchip platforms */
> +
> /* list of quirks */
> #define HCI_QUIRK_RAW_CCC BIT(1) /* CCC framing must be explicit */
> #define HCI_QUIRK_PIO_MODE BIT(2) /* Set PIO mode for AMD platforms */
> #define HCI_QUIRK_OD_PP_TIMING BIT(3) /* Set OD and PP timings for AMD platforms */
> #define HCI_QUIRK_RESP_BUF_THLD BIT(4) /* Set resp buf thld to 0 for AMD platforms */
> #define HCI_QUIRK_RPM_ALLOWED BIT(5) /* Runtime PM allowed */
> +#define HCI_QUIRK_CLK_SUPPORT BIT(6) /* Enable Clocks for Microchip platforms*/
Without MCHP_I3C_CLK_IDX this becomes a generic quirk that others can use
> +
>
> /* global functions */
> void mipi_i3c_hci_resume(struct i3c_hci *hci);
next prev parent reply other threads:[~2026-03-12 9:29 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-12 4:20 [PATCH v3 0/5] Add microchip sama7d65 SoC I3C support Manikandan Muralidharan
2026-03-12 4:20 ` [PATCH v3 1/5] dt-bindings: i3c: mipi-i3c-hci: add Microchip SAMA7D65 compatible Manikandan Muralidharan
2026-03-12 17:50 ` Conor Dooley
2026-03-12 4:20 ` [PATCH v3 2/5] clk: at91: sama7d65: add peripheral clock for I3C Manikandan Muralidharan
2026-03-12 4:20 ` [PATCH v3 3/5] i3c: mipi-i3c-hci: add microchip sama7d65 SoC compatible with the appropriate quirk Manikandan Muralidharan
2026-03-12 9:29 ` Adrian Hunter [this message]
2026-03-12 17:52 ` Conor Dooley
2026-03-16 6:36 ` Manikandan.M
2026-03-12 4:20 ` [PATCH v3 4/5] ARM: dts: microchip: add I3C controller Manikandan Muralidharan
2026-03-12 4:20 ` [PATCH v3 5/5] ARM: configs: at91: sama7: add sama7d65 i3c-hci Manikandan Muralidharan
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