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Lin" , , , , , , , "Alexandre Mergnat" CC: Bear Wang , Pablo Sun , Macpaul Lin , Sen Chu , "Chris-qj chen" , MediaTek Chromebook Upstream , Chen-Yu Tsai References: <20240926111449.9245-1-macpaul.lin@mediatek.com> <20240926111449.9245-2-macpaul.lin@mediatek.com> <8883c84d-8333-4b04-83b5-022be5b6153c@collabora.com> From: Macpaul Lin In-Reply-To: <8883c84d-8333-4b04-83b5-022be5b6153c@collabora.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--7.179900-8.000000 X-TMASE-MatchedRID: L8tZF6zWW2oNtKv7cnNXnSa1MaKuob8PofZV/2Xa0cK+UkTh6A/Dwdno quRwHY3BA5x6HN+sIJp31PcFav1MzrBAQLqGlKiv6/xAZojbl7dbAoaK+wS4jVThXWky81BHWYS 8OrMR6Ddh9M64k1dYu8r9L0WloblybC1/2cudIH8ve6W+IORwrRxl385bjK8qBFepjP4Awbk1Hc Jp3+cWzRvbS1sPuc0r4/I+BK21AaKW0F2DMwRPmbEKX02srTXI0pVrZbbfikggcyGevtftJ6PFj JEFr+oloTCA5Efyn8CNo+PRbWqfRK6NVEWSRWyb+q79xy5JhPV9AN1RR7xHgxUc1EdkGQIHBVEe UwmLhxCRxDbvN0TdZ9Bo5imTamTbF97lgTik4vNK3RdBmL/Uwy3U7y2wGlJPpewvSdi7pYMM6XK FXY+j89UQ5D3w2Dm4IpaqxlxwyA44obSkgSym9A== X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--7.179900-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 5D4F0D16EEB72D54571CE1ADEE61674C0C722E78899534C30E5028FC934A423C2000:8 On 9/30/24 16:49, AngeloGioacchino Del Regno wrote: > Il 26/09/24 13:14, Macpaul Lin ha scritto: >> The infra-iommu node in mt8195.dtsi was triggering a CHECK_DTBS error due >> to an excessively long 'interrupts' property. The error message was: >> [snip] >> >> diff --git >> a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml >> b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml >> index ea6b0f5f24de..fdd2996d2a31 100644 >> --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml >> +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml >> @@ -96,7 +96,8 @@ properties: >>       maxItems: 1 >>     interrupts: >> -    maxItems: 1 >> +    minItems: 1 >> +    maxItems: 5 >>     clocks: >>       items: >> @@ -210,6 +211,28 @@ allOf: >>         required: >>           - mediatek,larbs >> +  - if: >> +      properties: >> +        compatible: >> +          contains: >> +            enum: >> +              - mediatek,mt8195-iommu-infra >> + >> +    then: >> +      properties: >> +        interrupts: >> +          description: | > > Do you really need to keep the formatting? > > If you rephrase that as: > > The infra IOMMU in MT8195 has five banks: each features one set > of APB registers for the normal world (set 0), one Shouldn't we use a 'three' here? Three APB register sets for the protected world 1, protected world 2, and protected world 3. > for the protected > world (sets 1-3) and one for the secure world (set 4), and each set > has its own interrupt. Therefore, five interrupts are needed. > > ...you won't need the bar :-) Thanks for the suggestion. The description has been moved to top common property in v3, and v4, hence the bar is still required to explain the others SOCs. I'll try to rephrase the description for MT8195 also. >> +            The IOMMU of MT8195 has 5 banks: 0/1/2/3/4. >> +            Each bank has a set of APB registers corresponding to the >> +            normal world, protected world 1/2/3, and secure world, >> respectively. >> +            Therefore, 5 interrupt numbers are needed. >> +          maxItems: 5 > > minItems: 5 > > Cheers, > Angelo > > Thanks Macpaul Lin