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Tue, 10 Jun 2025 15:35:51 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 5A9E140045; Tue, 10 Jun 2025 15:34:42 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 7F44EB5F91C; Tue, 10 Jun 2025 15:33:54 +0200 (CEST) Received: from [10.48.86.185] (10.48.86.185) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Tue, 10 Jun 2025 15:33:53 +0200 Message-ID: Date: Tue, 10 Jun 2025 15:33:52 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 5/9] ARM: dts: stm32: add Hardware debug port (HDP) on stm32mp13 To: Krzysztof Kozlowski , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski CC: , , , , References: <20250523-hdp-upstream-v3-0-bd6ca199466a@foss.st.com> <20250523-hdp-upstream-v3-5-bd6ca199466a@foss.st.com> <5b7a2102-ff68-4aab-a88d-0c4f9195ef95@kernel.org> <3c868c4b-8a0e-44b5-9d6e-3a0526d9deeb@foss.st.com> <3ba588ed-1614-4877-b6fc-b5aa853b8c2e@kernel.org> <714ad17d-53f1-4703-8e13-61c290a8da89@foss.st.com> <7000f63e-5e68-465d-9d7f-1a6ca0524222@kernel.org> Content-Language: en-US From: Clement LE GOFFIC In-Reply-To: <7000f63e-5e68-465d-9d7f-1a6ca0524222@kernel.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-06-10_05,2025-06-10_01,2025-03-28_01 On 6/10/25 14:38, Krzysztof Kozlowski wrote: > On 10/06/2025 14:02, Clement LE GOFFIC wrote: >> On 5/29/25 11:01, Krzysztof Kozlowski wrote: >>> On 28/05/2025 14:14, Clement LE GOFFIC wrote: >>>>> >>>>>> + }; >>>>>> + >>>>>> + hdp: pinctrl@5002a000 { >>>>>> + compatible = "st,stm32mp131-hdp"; >>>>>> + reg = <0x5002a000 0x400>; >>>>>> + clocks = <&rcc HDP>; >>>>>> status = "disabled"; >>>>> >>>>> Why are you disabling it? What is missing? >>>> >>>> Nothing is missing just disabled by default. >>>> The node is then enabled when needed in board's dts file. >>> Nodes should not be disabled by default if they are complete. That's why >>> I asked what is missing. Drop. >> >> Hi Krzysztof, OK I better understand now. >> So yes the 'pinctrl-*' properties which are board dependent are lacking. > > These are not properties of this node. Does this mean I should add 'pinctrl-*' properties in bindings yaml file ? I don't get it.. >> >> In the last patch of my serie I add them (only for stm32mp157f-dk2) but >> keep it disabled because the pin is on an external connector (the >> Arduino connector of the board). >> This prevent any issue with a possible connected module. > > Not relevant. Pin control for connector are board specific, but pinctrl > SoC part is SoC. I think we don't understand each other here too. I don't understand the end of your sentence "pinctrl SoC part is SoC". Maybe some informations that could help: The 'pinctrl-*' properties are used in the HDP case to select the internal signal to output AND the alternate function on the pin to output the HDP function. > Best regards, > Krzysztof