From mboxrd@z Thu Jan 1 00:00:00 1970 From: Matthias Brugger Subject: Re: [PATCH 2/2] arm64: dts: mt7622: update a clock property for UART0 Date: Mon, 16 Jul 2018 15:55:44 +0200 Message-ID: References: <2ff39c40ef6bc3054667e63c785a1d28527b5ddf.1531209126.git.ryder.lee@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org To: Ryder Lee Cc: Rob Herring , Sean Wang , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org List-Id: devicetree@vger.kernel.org Hi Ryder, On 10/07/18 09:55, Ryder Lee wrote: > The input clock of UART0 should be CLK_PERI_UART0_PD. > > Signed-off-by: Ryder Lee Can you provide a "Fixes" tag with the commit id of the commit that broke this? Thanks, Matthias > --- > arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi > index 8cdec52..4caa9b4 100644 > --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi > @@ -367,7 +367,7 @@ > reg = <0 0x11002000 0 0x400>; > interrupts = ; > clocks = <&topckgen CLK_TOP_UART_SEL>, > - <&pericfg CLK_PERI_UART1_PD>; > + <&pericfg CLK_PERI_UART0_PD>; > clock-names = "baud", "bus"; > status = "disabled"; > }; >