[PATCH 1/2] arm64: dts: mt7622: add some misc device nodes

[PATCH 1/2] arm64: dts: mt7622: add some misc device nodes

[Ryder Lee]

Add some misc nodes support - timer and ARM CCI-400.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt7622.dtsi | 36 ++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
index 9213c96..8cdec52 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -217,6 +217,16 @@
 		#reset-cells = <1>;
 	};
 
+	timer: timer@10004000 {
+		compatible = "mediatek,mt7622-timer",
+			     "mediatek,mt6577-timer";
+		reg = <0 0x10004000 0 0x80>;
+		interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&infracfg CLK_INFRA_APXGPT_PD>,
+			 <&topckgen CLK_TOP_RTC>;
+		clock-names = "system-clk", "rtc-clk";
+	};
+
 	scpsys: scpsys@10006000 {
 		compatible = "mediatek,mt7622-scpsys",
 			     "syscon";
@@ -317,6 +327,32 @@
 		      <0 0x10360000 0 0x2000>;
 	};
 
+	cci: cci@10390000 {
+		compatible = "arm,cci-400";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0 0x10390000 0 0x1000>;
+		ranges = <0 0 0x10390000 0x10000>;
+
+		cci_control0: slave-if@1000 {
+			compatible = "arm,cci-400-ctrl-if";
+			interface-type = "ace-lite";
+			reg = <0x1000 0x1000>;
+		};
+
+		cci_control1: slave-if@4000 {
+			compatible = "arm,cci-400-ctrl-if";
+			interface-type = "ace";
+			reg = <0x4000 0x1000>;
+		};
+
+		cci_control2: slave-if@5000 {
+			compatible = "arm,cci-400-ctrl-if";
+			interface-type = "ace";
+			reg = <0x5000 0x1000>;
+		};
+	};
+
 	auxadc: adc@11001000 {
 		compatible = "mediatek,mt7622-auxadc";
 		reg = <0 0x11001000 0 0x1000>;
-- 
1.9.1

[PATCH 2/2] arm64: dts: mt7622: update a clock property for UART0

[Ryder Lee]

The input clock of UART0 should be CLK_PERI_UART0_PD.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
index 8cdec52..4caa9b4 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -367,7 +367,7 @@
 		reg = <0 0x11002000 0 0x400>;
 		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
 		clocks = <&topckgen CLK_TOP_UART_SEL>,
-			 <&pericfg CLK_PERI_UART1_PD>;
+			 <&pericfg CLK_PERI_UART0_PD>;
 		clock-names = "baud", "bus";
 		status = "disabled";
 	};
-- 
1.9.1

Re: [PATCH 2/2] arm64: dts: mt7622: update a clock property for UART0

[Matthias Brugger]

Hi Ryder,

On 10/07/18 09:55, Ryder Lee wrote:
> The input clock of UART0 should be CLK_PERI_UART0_PD.
> 
> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>

Can you provide a "Fixes" tag with the commit id of the commit that broke this?

Thanks,
Matthias

> ---
>  arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> index 8cdec52..4caa9b4 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> @@ -367,7 +367,7 @@
>  		reg = <0 0x11002000 0 0x400>;
>  		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
>  		clocks = <&topckgen CLK_TOP_UART_SEL>,
> -			 <&pericfg CLK_PERI_UART1_PD>;
> +			 <&pericfg CLK_PERI_UART0_PD>;
>  		clock-names = "baud", "bus";
>  		status = "disabled";
>  	};
> 

Re: [PATCH 2/2] arm64: dts: mt7622: update a clock property for UART0

[Ryder Lee]

Hi,

On Mon, 2018-07-16 at 15:55 +0200, Matthias Brugger wrote:
> Hi Ryder,
> 
> On 10/07/18 09:55, Ryder Lee wrote:
> > The input clock of UART0 should be CLK_PERI_UART0_PD.
> > 
> > Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
> 
> Can you provide a "Fixes" tag with the commit id of the commit that broke this?
> 
> Thanks,
> Matthias

I've sent a new one with a "Fixes" tag.

Ryder
> 
> > ---
> >  arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> > index 8cdec52..4caa9b4 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> > @@ -367,7 +367,7 @@
> >  		reg = <0 0x11002000 0 0x400>;
> >  		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
> >  		clocks = <&topckgen CLK_TOP_UART_SEL>,
> > -			 <&pericfg CLK_PERI_UART1_PD>;
> > +			 <&pericfg CLK_PERI_UART0_PD>;
> >  		clock-names = "baud", "bus";
> >  		status = "disabled";
> >  	};
> >