From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Sergio Paracuellos <sergio.paracuellos@gmail.com>,
Shiji Yang <yangshiji66@outlook.com>
Cc: arinc.unal@arinc9.com, devicetree@vger.kernel.org,
john@phrozen.org, krzysztof.kozlowski+dt@linaro.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-mips@vger.kernel.org, matthias.bgg@gmail.com,
mturquette@baylibre.com, p.zabel@pengutronix.de,
robh+dt@kernel.org, sboyd@kernel.org, tsbogend@alpha.franken.de
Subject: Re: [PATCH v3 2/9] clk: ralink: add clock and reset driver for MTMIPS SoCs
Date: Sat, 17 Jun 2023 16:43:59 +0200 [thread overview]
Message-ID: <a61180e8-5732-2208-3a0c-e2b0137f9290@linaro.org> (raw)
In-Reply-To: <CAMhs-H8rt3-ffvjkNSORiNXQUVCUHCc7FNwYN7TOyQ0DxCe2fA@mail.gmail.com>
On 17/06/2023 15:26, Sergio Paracuellos wrote:
>>> void __init plat_time_init(void)
>>> {
>>> + struct of_phandle_args clkspec;
>>> struct clk *clk;
>>> + int cpu_clk_idx;
>>>
>>> ralink_of_remap();
>>>
>>> - ralink_clk_init();
>>> - clk = clk_get_sys("cpu", NULL);
>>> + cpu_clk_idx = clk_cpu_index();
>>> + if (cpu_clk_idx == -1)
>>> + panic("unable to get CPU clock index");
>>> +
>>> + of_clk_init(NULL);
>>> + clkspec.np = of_find_node_by_name(NULL, "sysc");
>>
>> The node name should be "syscon" as the example node name in the
>> dt-bindings document is "syscon".
>
> sysc is label to get this node since it is the one shared by all
> different dtsi files.
If it is label, why do you use it to get by name? name != label.
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-06-17 14:44 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-17 5:24 [PATCH v4 0/9] [PATCH v3 0/9] mips: ralink: add complete clock and reset driver for mtmips SoCs Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 1/9] dt-bindings: clock: add mtmips SoCs system controller Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 2/9] clk: ralink: add clock and reset driver for MTMIPS SoCs Sergio Paracuellos
2023-06-17 12:54 ` [PATCH v3 " Shiji Yang
2023-06-17 13:07 ` Krzysztof Kozlowski
2023-06-17 13:31 ` Sergio Paracuellos
2023-06-17 14:43 ` Krzysztof Kozlowski
2023-06-17 15:37 ` Sergio Paracuellos
2023-06-17 17:20 ` Krzysztof Kozlowski
2023-06-17 19:11 ` Sergio Paracuellos
2023-06-18 5:04 ` Sergio Paracuellos
2023-06-17 13:26 ` Sergio Paracuellos
2023-06-17 14:43 ` Krzysztof Kozlowski [this message]
2023-06-17 15:31 ` Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 3/9] mips: ralink: rt288x: remove clock related code Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 4/9] mips: ralink: rt305x: " Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 5/9] mips: ralink: rt3883: " Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 6/9] mips: ralink: mt7620: " Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 7/9] mips: ralink: remove reset " Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 8/9] mips: ralink: get cpu rate from new driver code Sergio Paracuellos
2023-06-17 14:48 ` Krzysztof Kozlowski
2023-06-17 15:35 ` Sergio Paracuellos
2023-06-17 17:27 ` Krzysztof Kozlowski
2023-06-17 19:01 ` Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 9/9] MAINTAINERS: add Mediatek MTMIPS Clock maintainer Sergio Paracuellos
-- strict thread matches above, loose matches on Subject: below --
2023-04-18 9:03 [PATCH v3 0/9] mips: ralink: add complete clock and reset driver for mtmips SoCs Sergio Paracuellos
2023-04-18 9:03 ` [PATCH v3 2/9] clk: ralink: add clock and reset driver for MTMIPS SoCs Sergio Paracuellos
2023-06-16 18:03 ` Stephen Boyd
2023-06-17 4:51 ` yangshiji66
2023-06-17 5:06 ` Sergio Paracuellos
2023-06-17 5:50 ` Shiji Yang
2023-06-17 6:00 ` Sergio Paracuellos
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