Re: [PATCH] arm64: dts: rockchip: Update DWC3 modules on RK3399 SoCs

[Enric Balletbo i Serra <enric.balletbo@collabora.com>]

Hi Robin,

On 13/6/19 18:56, Robin Murphy wrote:
> On 13/06/2019 17:27, Enric Balletbo i Serra wrote:
>> As per binding documentation [1], the DWC3 core should have the "ref",
>> "bus_early" and "suspend" clocks. As explained in the binding, those
>> clocks are required for new platforms but not for existing platforms
>> before commit fe8abf332b8f ("usb: dwc3: support clocks and resets for
>> DWC3 core").
>>
>> However, as those clocks are really treated as required, this ends with
>> having some annoying messages when the "rockchip,rk3399-dwc3" is used:
>>
>> [    1.724107] dwc3 fe800000.dwc3: Failed to get clk 'ref': -2
>> [    1.731893] dwc3 fe900000.dwc3: Failed to get clk 'ref': -2
>> [    2.495937] dwc3 fe800000.dwc3: Failed to get clk 'ref': -2
>> [    2.647239] dwc3 fe900000.dwc3: Failed to get clk 'ref': -2
>>
>> In order to remove those annoying messages, update the DWC3 hardware
>> module node and add all the required clocks. With this change, both, the
>> glue node and the DWC3 core node, have the clocks defined, but that's
>> not really a problem and there isn't a side effect on do this. So, we
>> can get rid of the annoying get clk error messages.
> 
> Can we not just move these clocks entirely from the glue layer to the core
> layer? That didn't seem to break when I tried it, although I'll admit my
> 'testing' was no more than booting and mounting a USB 3.0 flash drive, no
> suspend or anything fancy.
> 

AFAICT usb doesn't break, but we won't break backward compability then? (/me
still doesn't know when backward compability is really important or not)

> My own attempt to shut up these errors got sidetracked into c0c61471ef86 ("usb:
> dwc3: of-simple: Convert to bulk clk API"), then apparently stalled :)
> 

There was any off the record discussion and stalled or simply you didn't get
feedback?

I'll take a look.

Thanks,
~ Enric

> Robin.
> 
>>
>> [1] Documentation/devicetree/bindings/usb/dwc3.txt
>>
>> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
>> ---
>>
>>   arch/arm64/boot/dts/rockchip/rk3399.dtsi | 6 ++++++
>>   1 file changed, 6 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> index 196ac9b78076..a15348d185ce 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> @@ -414,6 +414,9 @@
>>               compatible = "snps,dwc3";
>>               reg = <0x0 0xfe800000 0x0 0x100000>;
>>               interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
>> +            clocks = <&cru SCLK_USB3OTG0_REF>, <&cru ACLK_USB3OTG0>,
>> +                 <&cru SCLK_USB3OTG0_SUSPEND>;
>> +            clock-names = "ref", "bus_early", "suspend";
>>               dr_mode = "otg";
>>               phys = <&u2phy0_otg>, <&tcphy0_usb3>;
>>               phy-names = "usb2-phy", "usb3-phy";
>> @@ -447,6 +450,9 @@
>>               compatible = "snps,dwc3";
>>               reg = <0x0 0xfe900000 0x0 0x100000>;
>>               interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
>> +            clocks = <&cru SCLK_USB3OTG1_REF>, <&cru ACLK_USB3OTG1>,
>> +                 <&cru SCLK_USB3OTG1_SUSPEND>;
>> +            clock-names = "ref", "bus_early", "suspend";
>>               dr_mode = "otg";
>>               phys = <&u2phy1_otg>, <&tcphy1_usb3>;
>>               phy-names = "usb2-phy", "usb3-phy";
>>

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