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smtp.subspace.kernel.org; dkim=pass header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=H257HZkY; arc=none smtp.remote-ip=100.103.45.18 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BDB02606A326; Thu, 5 Nov 2026 20:26:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key, unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=H257HZkY Received: by smtp.kernel.org (Postfix) with ESMTPSA id 755471F0089F; Thu, 5 Nov 2026 20:26:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1793910369; bh=6PhYnOuaolg4JTRnCvQouViB9Tyk3Jhd5dCgyqQ05EE=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=H257HZkY5ZLXLGZh1ay3PnMy0GH0TJ3ZT8gnwBg5Nr15yy1uRkoGszb4bClrp63j4 hUy9r64h25pMvJ25y9cjdvQFXwjSBYjn5gYoAryOUN/AOv1lrprdsfhdMaF/duKzf3 TqtHSZAIaV1N3xZGlxEHIWNyHU3v7DIG/u44+6XO1zpuqdOk6rgBx+63lMdFjiIAiv NK0ZRkVg8vSX1R2RPctHfg3MnBT0ioUhyxSs2rB10Az+2u8ptgr1U4jJ2x+5fVqm19 lP0UnY19PWjgYwOUXLa9pl9PZoemsC7fBxDZ24/eNB4jSzvqr2oX5zNffJw88LDS5v m6fwm7TNfX8dA== Message-ID: Date: Thu, 5 Nov 2026 21:26:00 +0100 X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/4] soc: toshiba: tc9564: config system controller To: Alex Elder , sboyd@kernel.org, bmasney+clk@redhat.com, jbrunet+clk@baylibre.com, p.zabel@pengutronix.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: daniel@riscstar.com, mohd.anwar@oss.qualcomm.com, lorenzo.bianconi@oss.qualcomm.com, fabrice.gasnier@foss.st.com, alexandre.torgue@foss.st.com, marex@nabladev.com, changhuang.liang@starfivetech.com, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org References: <20261104004332.2141282-1-elder@riscstar.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 04/11/2026 01:43, Alex Elder wrote: > This series is comprised of some code that was previously sent > separately. It now incorporates a new system controller driver > that advertises clock and reset functionality, as well as regmap > access to its address range. This combination is being treated > as a new series. (Details of previous versions are below.) > > The Toshiba TC9564 is an SoC that attaches to a host system via PCIe. > It includes a PCIe switch with three downstream ports. To one of > these ports an embedded PCIe endpoint is attached, and that implements > two PCI functions. BAR 4 for both PCI functions provides access to > registers controlling blocks within the SoC. > > The system controller driver adds the clock and reset devices > using the mfd_add_devices() interface. The clocks and resets > are implemented by drivers included in this series. Toshiba TC9564 bindings and DTS should be posted completely. We spent great amount of time on discussing already and I pointed more than once that big picture is missing. You are not describing here parts of a SoC. You are describing one, single device how the host sees it and DT maintainers (and writing bindings) ask for complete picture in such cases. Best regards, Krzysztof