* [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332
@ 2024-12-10 7:41 Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 01/13] dt-bindings: net: wireless: describe the ath12k AHB module Raj Kumar Bhagat
` (13 more replies)
0 siblings, 14 replies; 27+ messages in thread
From: Raj Kumar Bhagat @ 2024-12-10 7:41 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree,
Raj Kumar Bhagat
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="y", Size: 4387 bytes --]
Currently, Ath12k driver only supports WiFi devices that are based on
PCI bus. New Ath12k device IPQ5332 is based on AHB bus. Hence, add
Ath12k AHB support for IPQ5332.
IPQ5332 is IEEE802.11be 2 GHz 2x2 Wifi device. To bring-up IPQ5332
device:
- Add hardware parameters for IPQ5332.
- CE register address space in IPQ5332 is separate from WCSS register
space. Hence, add logic to remap CE register address.
- Add support for fixed QMI firmware memory for IPQ5332.
- Support userPD handling for WCSS secure PIL driver to enable ath12k
AHB support.
v4:
- Missed to include some review list in v3. Hence sending v4 with
all review list as per - scripts/get_maintainers.pl
v3: https://lore.kernel.org/all/20241209165644.1680167-1-quic_rajkbhag@quicinc.com/
- DT binding: clock name changed from gcc_xo_clk to xo.
- DT binding: Upper constraint added for memory-region property.
- DT binding: The description for "qcom,rproc" phandle updated to represent
the hardware aspect.
- DT binding: Added property qcom,ath12k-calibration-variant.
- Squashed patch[2/22] to patch[8/22] of v2 into a single patch.
- Patch reordering is done.
- The hardware parameter "m3_fw_support" renamed to "needs_m3_fw".
- CMEM remap and CMEM register handling are dropped. CMEM registers are
accessed within WCSS register space (ab->mem).
- The devm APIs are used for interrupts handling.
- Logic updated in ath12k_ahb_map_service_to_pipe().
- Dependency path series from other subsystem are dropped.
v2: https://lore.kernel.org/all/20241015182637.955753-1-quic_rajkbhag@quicinc.com/
- "qcom,board_id" property is dropped. This is not the direct dependency
for Ath12k AHB support, hence it can be taken up separately.
- "qcom,bdf-addr" property is dropped in device-tree and moved to ath12k
driver.
- Currently we have only one compatible enum (qcom,ipq5332-wifi), hence
conditional if() check for defining the binding is removed.
- "reserved-memory" node is dropped from example DTS.
- "status" property is dropped in wifi node of example DTS.
- Integrated the “Support userPD handling for WCSS secure PIL driver”
patch series with the Ath12k AHB bring-up patch.
- Removed the RFC tag as all dependency patch series are now compilable.
v1: https://lore.kernel.org/all/20240814094323.3927603-1-quic_rajkbhag@quicinc.com/
Balamurugan S (6):
wifi: ath12k: fix incorrect CE addresses
wifi: ath12k: add ath12k_hw_params for IPQ5332
wifi: ath12k: avoid m3 firmware download in AHB device IPQ5332
wifi: ath12k: Add hw_params to remap CE register space for IPQ5332
wifi: ath12k: add AHB driver support for IPQ5332
wifi: ath12k: enable ath12k AHB support
P Praneesh (1):
wifi: ath12k: refactor ath12k_hw_regs structure
Raj Kumar Bhagat (2):
dt-bindings: net: wireless: describe the ath12k AHB module
wifi: ath12k: add support for fixed QMI firmware memory
Sowmiya Sree Elavalagan (4):
wifi: ath12k: Power up root PD
wifi: ath12k: Register various userPD interrupts and save SMEM entries
wifi: ath12k: Power up userPD
wifi: ath12k: Power down userPD
.../net/wireless/qcom,ath12k-ahb.yaml | 301 ++++
drivers/net/wireless/ath/ath12k/Kconfig | 6 +
drivers/net/wireless/ath/ath12k/Makefile | 1 +
drivers/net/wireless/ath/ath12k/ahb.c | 1254 +++++++++++++++++
drivers/net/wireless/ath/ath12k/ahb.h | 80 ++
drivers/net/wireless/ath/ath12k/ce.c | 92 +-
drivers/net/wireless/ath/ath12k/ce.h | 16 +-
drivers/net/wireless/ath/ath12k/core.c | 35 +-
drivers/net/wireless/ath/ath12k/core.h | 12 +-
drivers/net/wireless/ath/ath12k/hal.c | 82 +-
drivers/net/wireless/ath/ath12k/hal.h | 66 +-
drivers/net/wireless/ath/ath12k/hw.c | 477 +++++++
drivers/net/wireless/ath/ath12k/hw.h | 15 +
drivers/net/wireless/ath/ath12k/pci.c | 12 +-
drivers/net/wireless/ath/ath12k/pci.h | 2 +
drivers/net/wireless/ath/ath12k/qmi.c | 169 ++-
drivers/net/wireless/ath/ath12k/qmi.h | 1 +
17 files changed, 2520 insertions(+), 101 deletions(-)
create mode 100644 Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
create mode 100644 drivers/net/wireless/ath/ath12k/ahb.c
create mode 100644 drivers/net/wireless/ath/ath12k/ahb.h
base-commit: 400568fb3b022247c1603fdbdd6444b3ef14ffce
--
2.34.1
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v4 01/13] dt-bindings: net: wireless: describe the ath12k AHB module
2024-12-10 7:41 [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
@ 2024-12-10 7:41 ` Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 02/13] wifi: ath12k: fix incorrect CE addresses Raj Kumar Bhagat
` (12 subsequent siblings)
13 siblings, 0 replies; 27+ messages in thread
From: Raj Kumar Bhagat @ 2024-12-10 7:41 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree,
Raj Kumar Bhagat
Add device-tree bindings for the ATH12K AHB module found in the IPQ5332
device.
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
.../net/wireless/qcom,ath12k-ahb.yaml | 301 ++++++++++++++++++
1 file changed, 301 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
new file mode 100644
index 000000000000..314a73cebb11
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k-ahb.yaml
@@ -0,0 +1,301 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/wireless/qcom,ath12k-ahb.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies ath12k wireless devices (AHB)
+
+maintainers:
+ - Kalle Valo <kvalo@kernel.org>
+ - Jeff Johnson <jjohnson@kernel.org>
+
+description:
+ Qualcomm Technologies IEEE 802.11be AHB devices.
+
+properties:
+ compatible:
+ enum:
+ - qcom,ipq5332-wifi
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: XO clock used for copy engine
+
+ clock-names:
+ items:
+ - const: xo
+
+ interrupts:
+ items:
+ - description: Ready interrupt
+ - description: Spawn acknowledge interrupt
+ - description: Stop acknowledge interrupt
+ - description: misc-pulse1 interrupt events
+ - description: misc-latch interrupt events
+ - description: sw exception interrupt events
+ - description: interrupt event for ring CE0
+ - description: interrupt event for ring CE1
+ - description: interrupt event for ring CE2
+ - description: interrupt event for ring CE3
+ - description: interrupt event for ring CE4
+ - description: interrupt event for ring CE5
+ - description: interrupt event for ring CE6
+ - description: interrupt event for ring CE7
+ - description: interrupt event for ring CE8
+ - description: interrupt event for ring CE9
+ - description: interrupt event for ring CE10
+ - description: interrupt event for ring CE11
+ - description: interrupt event for ring host2wbm-desc-feed
+ - description: interrupt event for ring host2reo-re-injection
+ - description: interrupt event for ring host2reo-command
+ - description: interrupt event for ring host2rxdma-monitor-ring1
+ - description: interrupt event for ring reo2ost-exception
+ - description: interrupt event for ring wbm2host-rx-release
+ - description: interrupt event for ring reo2host-status
+ - description: interrupt event for ring reo2host-destination-ring4
+ - description: interrupt event for ring reo2host-destination-ring3
+ - description: interrupt event for ring reo2host-destination-ring2
+ - description: interrupt event for ring reo2host-destination-ring1
+ - description: interrupt event for ring rxdma2host-monitor-destination-mac3
+ - description: interrupt event for ring rxdma2host-monitor-destination-mac2
+ - description: interrupt event for ring rxdma2host-monitor-destination-mac1
+ - description: interrupt event for ring host2rxdma-host-buf-ring-mac3
+ - description: interrupt event for ring host2rxdma-host-buf-ring-mac2
+ - description: interrupt event for ring host2rxdma-host-buf-ring-mac1
+ - description: interrupt event for ring host2tcl-input-ring4
+ - description: interrupt event for ring host2tcl-input-ring3
+ - description: interrupt event for ring host2tcl-input-ring2
+ - description: interrupt event for ring host2tcl-input-ring1
+ - description: interrupt event for ring wbm2host-tx-completions-ring4
+ - description: interrupt event for ring wbm2host-tx-completions-ring3
+ - description: interrupt event for ring wbm2host-tx-completions-ring2
+ - description: interrupt event for ring wbm2host-tx-completions-ring1
+ - description: interrupt event for ring host2tx-monitor-ring1
+ - description: interrupt event for ring txmon2host-monitor-destination-mac3
+ - description: interrupt event for ring txmon2host-monitor-destination-mac2
+ - description: interrupt event for ring txmon2host-monitor-destination-mac1
+ - description: interrupt event for umac_reset
+
+ interrupt-names:
+ items:
+ - const: ready
+ - const: spawn
+ - const: stop-ack
+ - const: misc-pulse1
+ - const: misc-latch
+ - const: sw-exception
+ - const: ce0
+ - const: ce1
+ - const: ce2
+ - const: ce3
+ - const: ce4
+ - const: ce5
+ - const: ce6
+ - const: ce7
+ - const: ce8
+ - const: ce9
+ - const: ce10
+ - const: ce11
+ - const: host2wbm-desc-feed
+ - const: host2reo-re-injection
+ - const: host2reo-command
+ - const: host2rxdma-monitor-ring1
+ - const: reo2ost-exception
+ - const: wbm2host-rx-release
+ - const: reo2host-status
+ - const: reo2host-destination-ring4
+ - const: reo2host-destination-ring3
+ - const: reo2host-destination-ring2
+ - const: reo2host-destination-ring1
+ - const: rxdma2host-monitor-destination-mac3
+ - const: rxdma2host-monitor-destination-mac2
+ - const: rxdma2host-monitor-destination-mac1
+ - const: host2rxdma-host-buf-ring-mac3
+ - const: host2rxdma-host-buf-ring-mac2
+ - const: host2rxdma-host-buf-ring-mac1
+ - const: host2tcl-input-ring4
+ - const: host2tcl-input-ring3
+ - const: host2tcl-input-ring2
+ - const: host2tcl-input-ring1
+ - const: wbm2host-tx-completions-ring4
+ - const: wbm2host-tx-completions-ring3
+ - const: wbm2host-tx-completions-ring2
+ - const: wbm2host-tx-completions-ring1
+ - const: host2tx-monitor-ring1
+ - const: txmon2host-monitor-destination-mac3
+ - const: txmon2host-monitor-destination-mac2
+ - const: txmon2host-monitor-destination-mac1
+ - const: umac_reset
+
+ memory-region:
+ minItems: 1
+ maxItems: 2
+ description:
+ phandle to a node describing reserved memory (System RAM memory)
+ used by ath12k firmware (see bindings/reserved-memory/reserved-memory.txt)
+
+ qcom,ath12k-calibration-variant:
+ $ref: /schemas/types.yaml#/definitions/string
+ description:
+ String to uniquely identify variant of the calibration data for designs
+ with colliding bus and device ids
+
+ qcom,rproc:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle to the Qualcomm Hexagon DSP(q6 remote processor), which is utilized
+ for offloading WiFi processing tasks, this q6 remote processor operates in
+ conjunction with WiFi.
+
+ qcom,smem-states:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description: States used by the AP to signal the remote processor
+ items:
+ - description: Shutdown WCSS pd
+ - description: Stop WCSS pd
+ - description: Spawn WCSS pd
+
+ qcom,smem-state-names:
+ description:
+ Names of the states used by the AP to signal the remote processor
+ items:
+ - const: shutdown
+ - const: stop
+ - const: spawn
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - interrupts
+ - interrupt-names
+ - memory-region
+ - qcom,rproc
+ - qcom,smem-states
+ - qcom,smem-state-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/qcom,ipq5332-gcc.h>
+
+ wifi0: wifi@c0000000 {
+ compatible = "qcom,ipq5332-wifi";
+ reg = <0xc000000 0x1000000>;
+ clocks = <&gcc GCC_XO_CLK>;
+ clock-names = "xo";
+ interrupts-extended = <&wcss_smp2p_in 9 IRQ_TYPE_NONE>,
+ <&wcss_smp2p_in 12 IRQ_TYPE_NONE>,
+ <&wcss_smp2p_in 11 IRQ_TYPE_NONE>,
+ <&intc GIC_SPI 559 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 560 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 561 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 422 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 423 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 424 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 425 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 426 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 427 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 428 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 429 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 430 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 431 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 432 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 433 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 491 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 495 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 493 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 544 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 457 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 497 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 454 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 453 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 452 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 451 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 488 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 488 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 484 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 554 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 554 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 549 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 507 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 500 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 499 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 498 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 450 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 449 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 448 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 447 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 543 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 486 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 486 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 482 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 419 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "ready",
+ "spawn",
+ "stop-ack",
+ "misc-pulse1",
+ "misc-latch",
+ "sw-exception",
+ "ce0",
+ "ce1",
+ "ce2",
+ "ce3",
+ "ce4",
+ "ce5",
+ "ce6",
+ "ce7",
+ "ce8",
+ "ce9",
+ "ce10",
+ "ce11",
+ "host2wbm-desc-feed",
+ "host2reo-re-injection",
+ "host2reo-command",
+ "host2rxdma-monitor-ring1",
+ "reo2ost-exception",
+ "wbm2host-rx-release",
+ "reo2host-status",
+ "reo2host-destination-ring4",
+ "reo2host-destination-ring3",
+ "reo2host-destination-ring2",
+ "reo2host-destination-ring1",
+ "rxdma2host-monitor-destination-mac3",
+ "rxdma2host-monitor-destination-mac2",
+ "rxdma2host-monitor-destination-mac1",
+ "host2rxdma-host-buf-ring-mac3",
+ "host2rxdma-host-buf-ring-mac2",
+ "host2rxdma-host-buf-ring-mac1",
+ "host2tcl-input-ring4",
+ "host2tcl-input-ring3",
+ "host2tcl-input-ring2",
+ "host2tcl-input-ring1",
+ "wbm2host-tx-completions-ring4",
+ "wbm2host-tx-completions-ring3",
+ "wbm2host-tx-completions-ring2",
+ "wbm2host-tx-completions-ring1",
+ "host2tx-monitor-ring1",
+ "txmon2host-monitor-destination-mac3",
+ "txmon2host-monitor-destination-mac2",
+ "txmon2host-monitor-destination-mac1",
+ "umac_reset";
+
+ memory-region = <&q6_region>;
+ qcom,ath12k-calibration-variant = "RDP441_1";
+ qcom,rproc = <&q6v5_wcss>;
+ qcom,smem-states = <&wcss_smp2p_out 8>,
+ <&wcss_smp2p_out 9>,
+ <&wcss_smp2p_out 10>;
+ qcom,smem-state-names = "shutdown",
+ "stop",
+ "spawn";
+ };
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v4 02/13] wifi: ath12k: fix incorrect CE addresses
2024-12-10 7:41 [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 01/13] dt-bindings: net: wireless: describe the ath12k AHB module Raj Kumar Bhagat
@ 2024-12-10 7:41 ` Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 03/13] wifi: ath12k: refactor ath12k_hw_regs structure Raj Kumar Bhagat
` (11 subsequent siblings)
13 siblings, 0 replies; 27+ messages in thread
From: Raj Kumar Bhagat @ 2024-12-10 7:41 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree,
Balamurugan S, Raj Kumar Bhagat
From: Balamurugan S <quic_bselvara@quicinc.com>
In the current ath12k implementation, the CE addresses
CE_HOST_IE_ADDRESS and CE_HOST_IE_2_ADDRESS are incorrect. These
values were inherited from ath11k, but ath12k does not currently use
them.
However, the Ath12k AHB support relies on these addresses. Therefore,
corrects the CE addresses for ath12k.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1
Signed-off-by: Balamurugan S <quic_bselvara@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/ce.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/ce.h b/drivers/net/wireless/ath/ath12k/ce.h
index 1a14b9fb86b8..f6ed98dd31a3 100644
--- a/drivers/net/wireless/ath/ath12k/ce.h
+++ b/drivers/net/wireless/ath/ath12k/ce.h
@@ -39,8 +39,8 @@
#define PIPEDIR_INOUT_H2H 4 /* bidirectional, host to host */
/* CE address/mask */
-#define CE_HOST_IE_ADDRESS 0x00A1803C
-#define CE_HOST_IE_2_ADDRESS 0x00A18040
+#define CE_HOST_IE_ADDRESS 0x75804C
+#define CE_HOST_IE_2_ADDRESS 0x758050
#define CE_HOST_IE_3_ADDRESS CE_HOST_IE_ADDRESS
#define CE_HOST_IE_3_SHIFT 0xC
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v4 03/13] wifi: ath12k: refactor ath12k_hw_regs structure
2024-12-10 7:41 [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 01/13] dt-bindings: net: wireless: describe the ath12k AHB module Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 02/13] wifi: ath12k: fix incorrect CE addresses Raj Kumar Bhagat
@ 2024-12-10 7:41 ` Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 04/13] wifi: ath12k: add ath12k_hw_params for IPQ5332 Raj Kumar Bhagat
` (10 subsequent siblings)
13 siblings, 0 replies; 27+ messages in thread
From: Raj Kumar Bhagat @ 2024-12-10 7:41 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree, P Praneesh,
Balamurugan S, Raj Kumar Bhagat
From: P Praneesh <quic_ppranees@quicinc.com>
IPQ5332 device have different register address values for the below
registers:
HAL_TCL1_RING_BASE_LSB
HAL_TCL1_RING_BASE_MSB
HAL_TCL2_RING_BASE_LSB
HAL_SEQ_WCSS_UMAC_CE0_SRC_REG
HAL_SEQ_WCSS_UMAC_CE0_DST_REG
HAL_SEQ_WCSS_UMAC_CE1_SRC_REG
HAL_SEQ_WCSS_UMAC_CE1_DST_REG
Hence, refactor ath12k_hw_regs structure to accommodate these changes
in IPQ5332.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1
Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
Co-developed-by: Balamurugan S <quic_bselvara@quicinc.com>
Signed-off-by: Balamurugan S <quic_bselvara@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/hal.c | 82 +++++++++++++--------------
drivers/net/wireless/ath/ath12k/hal.h | 61 +++++++++++---------
drivers/net/wireless/ath/ath12k/hw.c | 27 +++++++++
drivers/net/wireless/ath/ath12k/hw.h | 8 +++
4 files changed, 110 insertions(+), 68 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/hal.c b/drivers/net/wireless/ath/ath12k/hal.c
index fd98fac16dd5..9e949b0691e5 100644
--- a/drivers/net/wireless/ath/ath12k/hal.c
+++ b/drivers/net/wireless/ath/ath12k/hal.c
@@ -552,9 +552,9 @@ static int ath12k_hal_srng_create_config_qcn9274(struct ath12k_base *ab)
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_STATUS_HP;
s = &hal->srng_config[HAL_TCL_DATA];
- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_BASE_LSB;
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_BASE_LSB(ab);
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_HP;
- s->reg_size[0] = HAL_TCL2_RING_BASE_LSB - HAL_TCL1_RING_BASE_LSB;
+ s->reg_size[0] = HAL_TCL2_RING_BASE_LSB(ab) - HAL_TCL1_RING_BASE_LSB(ab);
s->reg_size[1] = HAL_TCL2_RING_HP - HAL_TCL1_RING_HP;
s = &hal->srng_config[HAL_TCL_CMD];
@@ -566,29 +566,29 @@ static int ath12k_hal_srng_create_config_qcn9274(struct ath12k_base *ab)
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_STATUS_RING_HP;
s = &hal->srng_config[HAL_CE_SRC];
- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG + HAL_CE_DST_RING_BASE_LSB;
- s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG + HAL_CE_DST_RING_HP;
- s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG -
- HAL_SEQ_WCSS_UMAC_CE0_SRC_REG;
- s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG -
- HAL_SEQ_WCSS_UMAC_CE0_SRC_REG;
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_BASE_LSB;
+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_HP;
+ s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab);
+ s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab);
s = &hal->srng_config[HAL_CE_DST];
- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_BASE_LSB;
- s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_HP;
- s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
- HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
- s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
- HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_BASE_LSB;
+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_HP;
+ s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
+ s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
s = &hal->srng_config[HAL_CE_DST_STATUS];
- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG +
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) +
HAL_CE_DST_STATUS_RING_BASE_LSB;
- s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_STATUS_RING_HP;
- s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
- HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
- s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
- HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_STATUS_RING_HP;
+ s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
+ s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
s = &hal->srng_config[HAL_WBM_IDLE_LINK];
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_IDLE_LINK_RING_BASE_LSB(ab);
@@ -1371,9 +1371,9 @@ static int ath12k_hal_srng_create_config_wcn7850(struct ath12k_base *ab)
s = &hal->srng_config[HAL_TCL_DATA];
s->max_rings = 5;
- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_BASE_LSB;
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_BASE_LSB(ab);
s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_HP;
- s->reg_size[0] = HAL_TCL2_RING_BASE_LSB - HAL_TCL1_RING_BASE_LSB;
+ s->reg_size[0] = HAL_TCL2_RING_BASE_LSB(ab) - HAL_TCL1_RING_BASE_LSB(ab);
s->reg_size[1] = HAL_TCL2_RING_HP - HAL_TCL1_RING_HP;
s = &hal->srng_config[HAL_TCL_CMD];
@@ -1386,31 +1386,31 @@ static int ath12k_hal_srng_create_config_wcn7850(struct ath12k_base *ab)
s = &hal->srng_config[HAL_CE_SRC];
s->max_rings = 12;
- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG + HAL_CE_DST_RING_BASE_LSB;
- s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG + HAL_CE_DST_RING_HP;
- s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG -
- HAL_SEQ_WCSS_UMAC_CE0_SRC_REG;
- s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG -
- HAL_SEQ_WCSS_UMAC_CE0_SRC_REG;
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_BASE_LSB;
+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_HP;
+ s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab);
+ s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab);
s = &hal->srng_config[HAL_CE_DST];
s->max_rings = 12;
- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_BASE_LSB;
- s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_HP;
- s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
- HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
- s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
- HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_BASE_LSB;
+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_HP;
+ s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
+ s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
s = &hal->srng_config[HAL_CE_DST_STATUS];
s->max_rings = 12;
- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG +
+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) +
HAL_CE_DST_STATUS_RING_BASE_LSB;
- s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_STATUS_RING_HP;
- s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
- HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
- s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG -
- HAL_SEQ_WCSS_UMAC_CE0_DST_REG;
+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_STATUS_RING_HP;
+ s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
+ s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
+ HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
s = &hal->srng_config[HAL_WBM_IDLE_LINK];
s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_IDLE_LINK_RING_BASE_LSB(ab);
@@ -1756,7 +1756,7 @@ static void ath12k_hal_srng_src_hw_init(struct ath12k_base *ab,
HAL_TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB) |
u32_encode_bits((srng->entry_size * srng->num_entries),
HAL_TCL1_RING_BASE_MSB_RING_SIZE);
- ath12k_hif_write32(ab, reg_base + HAL_TCL1_RING_BASE_MSB_OFFSET, val);
+ ath12k_hif_write32(ab, reg_base + HAL_TCL1_RING_BASE_MSB_OFFSET(ab), val);
val = u32_encode_bits(srng->entry_size, HAL_REO1_RING_ID_ENTRY_SIZE);
ath12k_hif_write32(ab, reg_base + HAL_TCL1_RING_ID_OFFSET(ab), val);
diff --git a/drivers/net/wireless/ath/ath12k/hal.h b/drivers/net/wireless/ath/ath12k/hal.h
index 8a78bb9a10bc..69579f118b81 100644
--- a/drivers/net/wireless/ath/ath12k/hal.h
+++ b/drivers/net/wireless/ath/ath12k/hal.h
@@ -44,10 +44,14 @@ struct ath12k_base;
#define HAL_SEQ_WCSS_UMAC_OFFSET 0x00a00000
#define HAL_SEQ_WCSS_UMAC_REO_REG 0x00a38000
#define HAL_SEQ_WCSS_UMAC_TCL_REG 0x00a44000
-#define HAL_SEQ_WCSS_UMAC_CE0_SRC_REG 0x01b80000
-#define HAL_SEQ_WCSS_UMAC_CE0_DST_REG 0x01b81000
-#define HAL_SEQ_WCSS_UMAC_CE1_SRC_REG 0x01b82000
-#define HAL_SEQ_WCSS_UMAC_CE1_DST_REG 0x01b83000
+#define HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) \
+ ((ab)->hw_params->regs->hal_umac_ce0_src_reg_base)
+#define HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) \
+ ((ab)->hw_params->regs->hal_umac_ce0_dest_reg_base)
+#define HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) \
+ ((ab)->hw_params->regs->hal_umac_ce1_src_reg_base)
+#define HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) \
+ ((ab)->hw_params->regs->hal_umac_ce1_dest_reg_base)
#define HAL_SEQ_WCSS_UMAC_WBM_REG 0x00a34000
#define HAL_CE_WFSS_CE_REG_BASE 0x01b80000
@@ -57,8 +61,10 @@ struct ath12k_base;
/* SW2TCL(x) R0 ring configuration address */
#define HAL_TCL1_RING_CMN_CTRL_REG 0x00000020
#define HAL_TCL1_RING_DSCP_TID_MAP 0x00000240
-#define HAL_TCL1_RING_BASE_LSB 0x00000900
-#define HAL_TCL1_RING_BASE_MSB 0x00000904
+#define HAL_TCL1_RING_BASE_LSB(ab) \
+ ((ab)->hw_params->regs->hal_tcl1_ring_base_lsb)
+#define HAL_TCL1_RING_BASE_MSB(ab) \
+ ((ab)->hw_params->regs->hal_tcl1_ring_base_msb)
#define HAL_TCL1_RING_ID(ab) ((ab)->hw_params->regs->hal_tcl1_ring_id)
#define HAL_TCL1_RING_MISC(ab) \
((ab)->hw_params->regs->hal_tcl1_ring_misc)
@@ -76,30 +82,31 @@ struct ath12k_base;
((ab)->hw_params->regs->hal_tcl1_ring_msi1_base_msb)
#define HAL_TCL1_RING_MSI1_DATA(ab) \
((ab)->hw_params->regs->hal_tcl1_ring_msi1_data)
-#define HAL_TCL2_RING_BASE_LSB 0x00000978
+#define HAL_TCL2_RING_BASE_LSB(ab) \
+ ((ab)->hw_params->regs->hal_tcl2_ring_base_lsb)
#define HAL_TCL_RING_BASE_LSB(ab) \
((ab)->hw_params->regs->hal_tcl_ring_base_lsb)
-#define HAL_TCL1_RING_MSI1_BASE_LSB_OFFSET(ab) \
- (HAL_TCL1_RING_MSI1_BASE_LSB(ab) - HAL_TCL1_RING_BASE_LSB)
-#define HAL_TCL1_RING_MSI1_BASE_MSB_OFFSET(ab) \
- (HAL_TCL1_RING_MSI1_BASE_MSB(ab) - HAL_TCL1_RING_BASE_LSB)
-#define HAL_TCL1_RING_MSI1_DATA_OFFSET(ab) \
- (HAL_TCL1_RING_MSI1_DATA(ab) - HAL_TCL1_RING_BASE_LSB)
-#define HAL_TCL1_RING_BASE_MSB_OFFSET \
- (HAL_TCL1_RING_BASE_MSB - HAL_TCL1_RING_BASE_LSB)
-#define HAL_TCL1_RING_ID_OFFSET(ab) \
- (HAL_TCL1_RING_ID(ab) - HAL_TCL1_RING_BASE_LSB)
-#define HAL_TCL1_RING_CONSR_INT_SETUP_IX0_OFFSET(ab) \
- (HAL_TCL1_RING_CONSUMER_INT_SETUP_IX0(ab) - HAL_TCL1_RING_BASE_LSB)
-#define HAL_TCL1_RING_CONSR_INT_SETUP_IX1_OFFSET(ab) \
- (HAL_TCL1_RING_CONSUMER_INT_SETUP_IX1(ab) - HAL_TCL1_RING_BASE_LSB)
-#define HAL_TCL1_RING_TP_ADDR_LSB_OFFSET(ab) \
- (HAL_TCL1_RING_TP_ADDR_LSB(ab) - HAL_TCL1_RING_BASE_LSB)
-#define HAL_TCL1_RING_TP_ADDR_MSB_OFFSET(ab) \
- (HAL_TCL1_RING_TP_ADDR_MSB(ab) - HAL_TCL1_RING_BASE_LSB)
-#define HAL_TCL1_RING_MISC_OFFSET(ab) \
- (HAL_TCL1_RING_MISC(ab) - HAL_TCL1_RING_BASE_LSB)
+#define HAL_TCL1_RING_MSI1_BASE_LSB_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
+ (HAL_TCL1_RING_MSI1_BASE_LSB(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
+#define HAL_TCL1_RING_MSI1_BASE_MSB_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
+ (HAL_TCL1_RING_MSI1_BASE_MSB(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
+#define HAL_TCL1_RING_MSI1_DATA_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
+ (HAL_TCL1_RING_MSI1_DATA(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
+#define HAL_TCL1_RING_BASE_MSB_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
+ (HAL_TCL1_RING_BASE_MSB(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
+#define HAL_TCL1_RING_ID_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
+ (HAL_TCL1_RING_ID(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
+#define HAL_TCL1_RING_CONSR_INT_SETUP_IX0_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
+ (HAL_TCL1_RING_CONSUMER_INT_SETUP_IX0(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
+#define HAL_TCL1_RING_CONSR_INT_SETUP_IX1_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
+ (HAL_TCL1_RING_CONSUMER_INT_SETUP_IX1(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
+#define HAL_TCL1_RING_TP_ADDR_LSB_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
+ (HAL_TCL1_RING_TP_ADDR_LSB(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
+#define HAL_TCL1_RING_TP_ADDR_MSB_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
+ (HAL_TCL1_RING_TP_ADDR_MSB(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
+#define HAL_TCL1_RING_MISC_OFFSET(ab) ({ typeof(ab) _ab = (ab); \
+ (HAL_TCL1_RING_MISC(_ab) - HAL_TCL1_RING_BASE_LSB(_ab)); })
/* SW2TCL(x) R2 ring pointers (head/tail) address */
#define HAL_TCL1_RING_HP 0x00002000
diff --git a/drivers/net/wireless/ath/ath12k/hw.c b/drivers/net/wireless/ath/ath12k/hw.c
index b7b583fadb5a..d01df118991d 100644
--- a/drivers/net/wireless/ath/ath12k/hw.c
+++ b/drivers/net/wireless/ath/ath12k/hw.c
@@ -615,6 +615,9 @@ static const struct ath12k_hw_regs qcn9274_v1_regs = {
.hal_tcl1_ring_msi1_base_msb = 0x0000094c,
.hal_tcl1_ring_msi1_data = 0x00000950,
.hal_tcl_ring_base_lsb = 0x00000b58,
+ .hal_tcl1_ring_base_lsb = 0x00000900,
+ .hal_tcl1_ring_base_msb = 0x00000904,
+ .hal_tcl2_ring_base_lsb = 0x00000978,
/* TCL STATUS ring address */
.hal_tcl_status_ring_base_lsb = 0x00000d38,
@@ -677,6 +680,12 @@ static const struct ath12k_hw_regs qcn9274_v1_regs = {
/* REO status ring address */
.hal_reo_status_ring_base = 0x00000a84,
+
+ /* CE base address */
+ .hal_umac_ce0_src_reg_base = 0x01b80000,
+ .hal_umac_ce0_dest_reg_base = 0x01b81000,
+ .hal_umac_ce1_src_reg_base = 0x01b82000,
+ .hal_umac_ce1_dest_reg_base = 0x01b83000,
};
static const struct ath12k_hw_regs qcn9274_v2_regs = {
@@ -691,6 +700,9 @@ static const struct ath12k_hw_regs qcn9274_v2_regs = {
.hal_tcl1_ring_msi1_base_msb = 0x0000094c,
.hal_tcl1_ring_msi1_data = 0x00000950,
.hal_tcl_ring_base_lsb = 0x00000b58,
+ .hal_tcl1_ring_base_lsb = 0x00000900,
+ .hal_tcl1_ring_base_msb = 0x00000904,
+ .hal_tcl2_ring_base_lsb = 0x00000978,
/* TCL STATUS ring address */
.hal_tcl_status_ring_base_lsb = 0x00000d38,
@@ -757,6 +769,12 @@ static const struct ath12k_hw_regs qcn9274_v2_regs = {
/* REO status ring address */
.hal_reo_status_ring_base = 0x00000aa0,
+
+ /* CE base address */
+ .hal_umac_ce0_src_reg_base = 0x01b80000,
+ .hal_umac_ce0_dest_reg_base = 0x01b81000,
+ .hal_umac_ce1_src_reg_base = 0x01b82000,
+ .hal_umac_ce1_dest_reg_base = 0x01b83000,
};
static const struct ath12k_hw_regs wcn7850_regs = {
@@ -771,6 +789,9 @@ static const struct ath12k_hw_regs wcn7850_regs = {
.hal_tcl1_ring_msi1_base_msb = 0x0000094c,
.hal_tcl1_ring_msi1_data = 0x00000950,
.hal_tcl_ring_base_lsb = 0x00000b58,
+ .hal_tcl1_ring_base_lsb = 0x00000900,
+ .hal_tcl1_ring_base_msb = 0x00000904,
+ .hal_tcl2_ring_base_lsb = 0x00000978,
/* TCL STATUS ring address */
.hal_tcl_status_ring_base_lsb = 0x00000d38,
@@ -833,6 +854,12 @@ static const struct ath12k_hw_regs wcn7850_regs = {
/* REO status ring address */
.hal_reo_status_ring_base = 0x00000a84,
+
+ /* CE base address */
+ .hal_umac_ce0_src_reg_base = 0x01b80000,
+ .hal_umac_ce0_dest_reg_base = 0x01b81000,
+ .hal_umac_ce1_src_reg_base = 0x01b82000,
+ .hal_umac_ce1_dest_reg_base = 0x01b83000,
};
static const struct ath12k_hw_hal_params ath12k_hw_hal_params_qcn9274 = {
diff --git a/drivers/net/wireless/ath/ath12k/hw.h b/drivers/net/wireless/ath/ath12k/hw.h
index 8d52182e28ae..36bec99e9e4d 100644
--- a/drivers/net/wireless/ath/ath12k/hw.h
+++ b/drivers/net/wireless/ath/ath12k/hw.h
@@ -293,6 +293,9 @@ struct ath12k_hw_regs {
u32 hal_tcl1_ring_msi1_base_msb;
u32 hal_tcl1_ring_msi1_data;
u32 hal_tcl_ring_base_lsb;
+ u32 hal_tcl1_ring_base_lsb;
+ u32 hal_tcl1_ring_base_msb;
+ u32 hal_tcl2_ring_base_lsb;
u32 hal_tcl_status_ring_base_lsb;
@@ -316,6 +319,11 @@ struct ath12k_hw_regs {
u32 pcie_qserdes_sysclk_en_sel;
u32 pcie_pcs_osc_dtct_config_base;
+ u32 hal_umac_ce0_src_reg_base;
+ u32 hal_umac_ce0_dest_reg_base;
+ u32 hal_umac_ce1_src_reg_base;
+ u32 hal_umac_ce1_dest_reg_base;
+
u32 hal_ppe_rel_ring_base;
u32 hal_reo2_ring_base;
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v4 04/13] wifi: ath12k: add ath12k_hw_params for IPQ5332
2024-12-10 7:41 [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (2 preceding siblings ...)
2024-12-10 7:41 ` [PATCH v4 03/13] wifi: ath12k: refactor ath12k_hw_regs structure Raj Kumar Bhagat
@ 2024-12-10 7:41 ` Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 05/13] wifi: ath12k: avoid m3 firmware download in AHB device IPQ5332 Raj Kumar Bhagat
` (9 subsequent siblings)
13 siblings, 0 replies; 27+ messages in thread
From: Raj Kumar Bhagat @ 2024-12-10 7:41 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree,
Balamurugan S, P Praneesh, Raj Kumar Bhagat
From: Balamurugan S <quic_bselvara@quicinc.com>
Add ath12k_hw_params for new ath12k AHB based WiFi device IPQ5332.
Some hardware parameters like hw_ops, wmi_init & hal_ops are same
between IPQ5332 and QCN9274, hence use these same parameters for
IPQ5332.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1
Signed-off-by: Balamurugan S <quic_bselvara@quicinc.com>
Co-developed-by: P Praneesh <quic_ppranees@quicinc.com>
Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/ce.c | 92 +++++-
drivers/net/wireless/ath/ath12k/ce.h | 1 +
drivers/net/wireless/ath/ath12k/core.h | 3 +-
drivers/net/wireless/ath/ath12k/hw.c | 415 +++++++++++++++++++++++++
drivers/net/wireless/ath/ath12k/qmi.h | 1 +
5 files changed, 510 insertions(+), 2 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/ce.c b/drivers/net/wireless/ath/ath12k/ce.c
index be0d669d31fc..49321906ec81 100644
--- a/drivers/net/wireless/ath/ath12k/ce.c
+++ b/drivers/net/wireless/ath/ath12k/ce.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
- * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2022, 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "dp_rx.h"
@@ -219,6 +219,96 @@ const struct ce_attr ath12k_host_ce_config_wcn7850[] = {
};
+const struct ce_attr ath12k_host_ce_config_ipq5332[] = {
+ /* CE0: host->target HTC control and raw streams */
+ {
+ .flags = CE_ATTR_FLAGS,
+ .src_nentries = 16,
+ .src_sz_max = 2048,
+ .dest_nentries = 0,
+ },
+ /* CE1: target->host HTT + HTC control */
+ {
+ .flags = CE_ATTR_FLAGS,
+ .src_nentries = 0,
+ .src_sz_max = 2048,
+ .dest_nentries = 512,
+ .recv_cb = ath12k_htc_rx_completion_handler,
+ },
+ /* CE2: target->host WMI */
+ {
+ .flags = CE_ATTR_FLAGS,
+ .src_nentries = 0,
+ .src_sz_max = 2048,
+ .dest_nentries = 128,
+ .recv_cb = ath12k_htc_rx_completion_handler,
+ },
+ /* CE3: host->target WMI */
+ {
+ .flags = CE_ATTR_FLAGS,
+ .src_nentries = 32,
+ .src_sz_max = 2048,
+ .dest_nentries = 0,
+ },
+ /* CE4: host->target HTT */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 2048,
+ .src_sz_max = 256,
+ .dest_nentries = 0,
+ },
+ /* CE5: target -> host PKTLOG */
+ {
+ .flags = CE_ATTR_FLAGS,
+ .src_nentries = 0,
+ .src_sz_max = 2048,
+ .dest_nentries = 512,
+ .recv_cb = ath12k_dp_htt_htc_t2h_msg_handler,
+ },
+ /* CE6: Target autonomous HIF_memcpy */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 0,
+ .src_sz_max = 0,
+ .dest_nentries = 0,
+ },
+ /* CE7: CV Prefetch */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 0,
+ .src_sz_max = 0,
+ .dest_nentries = 0,
+ },
+ /* CE8: Target HIF memcpy (Generic HIF memcypy) */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 0,
+ .src_sz_max = 0,
+ .dest_nentries = 0,
+ },
+ /* CE9: WMI logging/CFR/Spectral/Radar */
+ {
+ .flags = CE_ATTR_FLAGS,
+ .src_nentries = 0,
+ .src_sz_max = 2048,
+ .dest_nentries = 128,
+ },
+ /* CE10: Unused */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 0,
+ .src_sz_max = 0,
+ .dest_nentries = 0,
+ },
+ /* CE11: Unused */
+ {
+ .flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,
+ .src_nentries = 0,
+ .src_sz_max = 0,
+ .dest_nentries = 0,
+ },
+};
+
static int ath12k_ce_rx_buf_enqueue_pipe(struct ath12k_ce_pipe *pipe,
struct sk_buff *skb, dma_addr_t paddr)
{
diff --git a/drivers/net/wireless/ath/ath12k/ce.h b/drivers/net/wireless/ath/ath12k/ce.h
index f6ed98dd31a3..6b1a356f43be 100644
--- a/drivers/net/wireless/ath/ath12k/ce.h
+++ b/drivers/net/wireless/ath/ath12k/ce.h
@@ -164,6 +164,7 @@ struct ath12k_ce {
extern const struct ce_attr ath12k_host_ce_config_qcn9274[];
extern const struct ce_attr ath12k_host_ce_config_wcn7850[];
+extern const struct ce_attr ath12k_host_ce_config_ipq5332[];
void ath12k_ce_cleanup_pipes(struct ath12k_base *ab);
void ath12k_ce_rx_replenish_retry(struct timer_list *t);
diff --git a/drivers/net/wireless/ath/ath12k/core.h b/drivers/net/wireless/ath/ath12k/core.h
index 458e3d0071a8..1737fb8f765d 100644
--- a/drivers/net/wireless/ath/ath12k/core.h
+++ b/drivers/net/wireless/ath/ath12k/core.h
@@ -146,7 +146,8 @@ struct ath12k_skb_rxcb {
enum ath12k_hw_rev {
ATH12K_HW_QCN9274_HW10,
ATH12K_HW_QCN9274_HW20,
- ATH12K_HW_WCN7850_HW20
+ ATH12K_HW_WCN7850_HW20,
+ ATH12K_HW_IPQ5332_HW10,
};
enum ath12k_firmware_mode {
diff --git a/drivers/net/wireless/ath/ath12k/hw.c b/drivers/net/wireless/ath/ath12k/hw.c
index d01df118991d..c9cddb1417df 100644
--- a/drivers/net/wireless/ath/ath12k/hw.c
+++ b/drivers/net/wireless/ath/ath12k/hw.c
@@ -535,6 +535,217 @@ static const struct service_to_pipe ath12k_target_service_to_ce_map_wlan_wcn7850
},
};
+static const struct ce_pipe_config ath12k_target_ce_config_wlan_ipq5332[] = {
+ /* host->target HTC control and raw streams */
+ {
+ .pipenum = __cpu_to_le32(0),
+ .pipedir = __cpu_to_le32(PIPEDIR_OUT),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* target->host HTT */
+ {
+ .pipenum = __cpu_to_le32(1),
+ .pipedir = __cpu_to_le32(PIPEDIR_IN),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* target->host WMI + HTC control */
+ {
+ .pipenum = __cpu_to_le32(2),
+ .pipedir = __cpu_to_le32(PIPEDIR_IN),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* host->target WMI */
+ {
+ .pipenum = __cpu_to_le32(3),
+ .pipedir = __cpu_to_le32(PIPEDIR_OUT),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* host->target HTT */
+ {
+ .pipenum = __cpu_to_le32(4),
+ .pipedir = __cpu_to_le32(PIPEDIR_OUT),
+ .nentries = __cpu_to_le32(256),
+ .nbytes_max = __cpu_to_le32(256),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS | CE_ATTR_DIS_INTR),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* Target -> host PKTLOG */
+ {
+ .pipenum = __cpu_to_le32(5),
+ .pipedir = __cpu_to_le32(PIPEDIR_IN),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* Reserved for target autonomous HIF_memcpy */
+ {
+ .pipenum = __cpu_to_le32(6),
+ .pipedir = __cpu_to_le32(PIPEDIR_INOUT),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(16384),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* CE7 Reserved for CV Prefetch */
+ {
+ .pipenum = __cpu_to_le32(7),
+ .pipedir = __cpu_to_le32(PIPEDIR_OUT),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* CE8 Reserved for target generic HIF memcpy */
+ {
+ .pipenum = __cpu_to_le32(8),
+ .pipedir = __cpu_to_le32(PIPEDIR_INOUT),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(16384),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* CE9 WMI logging/CFR/Spectral/Radar/ */
+ {
+ .pipenum = __cpu_to_le32(9),
+ .pipedir = __cpu_to_le32(PIPEDIR_IN),
+ .nentries = __cpu_to_le32(32),
+ .nbytes_max = __cpu_to_le32(2048),
+ .flags = __cpu_to_le32(CE_ATTR_FLAGS),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* Unused TBD */
+ {
+ .pipenum = __cpu_to_le32(10),
+ .pipedir = __cpu_to_le32(PIPEDIR_NONE),
+ .nentries = __cpu_to_le32(0),
+ .nbytes_max = __cpu_to_le32(0),
+ .flags = __cpu_to_le32(0),
+ .reserved = __cpu_to_le32(0),
+ },
+ /* Unused TBD */
+ {
+ .pipenum = __cpu_to_le32(11),
+ .pipedir = __cpu_to_le32(PIPEDIR_NONE),
+ .nentries = __cpu_to_le32(0),
+ .nbytes_max = __cpu_to_le32(0),
+ .flags = __cpu_to_le32(0),
+ .reserved = __cpu_to_le32(0),
+ },
+};
+
+static const struct service_to_pipe ath12k_target_service_to_ce_map_wlan_ipq5332[] = {
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_VO),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(3),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_VO),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(2),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_BK),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(3),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_BK),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(2),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_BE),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(3),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_BE),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(2),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_VI),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(3),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_DATA_VI),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(2),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_CONTROL),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(3),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_CONTROL),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(2),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_RSVD_CTRL),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(0),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_RSVD_CTRL),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(1),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_TEST_RAW_STREAMS),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(0),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_TEST_RAW_STREAMS),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(1),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_HTT_DATA_MSG),
+ __cpu_to_le32(PIPEDIR_OUT),
+ __cpu_to_le32(4),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_HTT_DATA_MSG),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(1),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_PKT_LOG),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(5),
+ },
+ {
+ __cpu_to_le32(ATH12K_HTC_SVC_ID_WMI_CONTROL_DIAG),
+ __cpu_to_le32(PIPEDIR_IN),
+ __cpu_to_le32(9),
+ },
+ /* (Additions here) */
+
+ { /* must be last */
+ __cpu_to_le32(0),
+ __cpu_to_le32(0),
+ __cpu_to_le32(0),
+ },
+};
+
static const struct ath12k_hw_ring_mask ath12k_hw_ring_mask_qcn9274 = {
.tx = {
ATH12K_TX_RING_MASK_0,
@@ -573,6 +784,46 @@ static const struct ath12k_hw_ring_mask ath12k_hw_ring_mask_qcn9274 = {
},
};
+static const struct ath12k_hw_ring_mask ath12k_hw_ring_mask_ipq5332 = {
+ .tx = {
+ ATH12K_TX_RING_MASK_0,
+ ATH12K_TX_RING_MASK_1,
+ ATH12K_TX_RING_MASK_2,
+ ATH12K_TX_RING_MASK_3,
+ },
+ .rx_mon_dest = {
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ ATH12K_RX_MON_RING_MASK_0,
+ },
+ .rx = {
+ 0, 0, 0, 0,
+ ATH12K_RX_RING_MASK_0,
+ ATH12K_RX_RING_MASK_1,
+ ATH12K_RX_RING_MASK_2,
+ ATH12K_RX_RING_MASK_3,
+ },
+ .rx_err = {
+ 0, 0, 0,
+ ATH12K_RX_ERR_RING_MASK_0,
+ },
+ .rx_wbm_rel = {
+ 0, 0, 0,
+ ATH12K_RX_WBM_REL_RING_MASK_0,
+ },
+ .reo_status = {
+ 0, 0, 0,
+ ATH12K_REO_STATUS_RING_MASK_0,
+ },
+ .host2rxdma = {
+ 0, 0, 0,
+ ATH12K_HOST2RXDMA_RING_MASK_0,
+ },
+ .tx_mon_dest = {
+ ATH12K_TX_MON_RING_MASK_0,
+ ATH12K_TX_MON_RING_MASK_1,
+ },
+};
+
static const struct ath12k_hw_ring_mask ath12k_hw_ring_mask_wcn7850 = {
.tx = {
ATH12K_TX_RING_MASK_0,
@@ -777,6 +1028,90 @@ static const struct ath12k_hw_regs qcn9274_v2_regs = {
.hal_umac_ce1_dest_reg_base = 0x01b83000,
};
+static const struct ath12k_hw_regs ipq5332_regs = {
+ /* SW2TCL(x) R0 ring configuration address */
+ .hal_tcl1_ring_id = 0x00000918,
+ .hal_tcl1_ring_misc = 0x00000920,
+ .hal_tcl1_ring_tp_addr_lsb = 0x0000092c,
+ .hal_tcl1_ring_tp_addr_msb = 0x00000930,
+ .hal_tcl1_ring_consumer_int_setup_ix0 = 0x00000940,
+ .hal_tcl1_ring_consumer_int_setup_ix1 = 0x00000944,
+ .hal_tcl1_ring_msi1_base_lsb = 0x00000958,
+ .hal_tcl1_ring_msi1_base_msb = 0x0000095c,
+ .hal_tcl1_ring_base_lsb = 0x00000910,
+ .hal_tcl1_ring_base_msb = 0x00000914,
+ .hal_tcl1_ring_msi1_data = 0x00000960,
+ .hal_tcl2_ring_base_lsb = 0x00000988,
+ .hal_tcl_ring_base_lsb = 0x00000b68,
+
+ /* TCL STATUS ring address */
+ .hal_tcl_status_ring_base_lsb = 0x00000d48,
+
+ /* REO DEST ring address */
+ .hal_reo2_ring_base = 0x00000578,
+ .hal_reo1_misc_ctrl_addr = 0x00000b9c,
+ .hal_reo1_sw_cookie_cfg0 = 0x0000006c,
+ .hal_reo1_sw_cookie_cfg1 = 0x00000070,
+ .hal_reo1_qdesc_lut_base0 = 0x00000074,
+ .hal_reo1_qdesc_lut_base1 = 0x00000078,
+ .hal_reo1_ring_base_lsb = 0x00000500,
+ .hal_reo1_ring_base_msb = 0x00000504,
+ .hal_reo1_ring_id = 0x00000508,
+ .hal_reo1_ring_misc = 0x00000510,
+ .hal_reo1_ring_hp_addr_lsb = 0x00000514,
+ .hal_reo1_ring_hp_addr_msb = 0x00000518,
+ .hal_reo1_ring_producer_int_setup = 0x00000524,
+ .hal_reo1_ring_msi1_base_lsb = 0x00000548,
+ .hal_reo1_ring_msi1_base_msb = 0x0000054C,
+ .hal_reo1_ring_msi1_data = 0x00000550,
+ .hal_reo1_aging_thres_ix0 = 0x00000B28,
+ .hal_reo1_aging_thres_ix1 = 0x00000B2C,
+ .hal_reo1_aging_thres_ix2 = 0x00000B30,
+ .hal_reo1_aging_thres_ix3 = 0x00000B34,
+
+ /* REO Exception ring address */
+ .hal_reo2_sw0_ring_base = 0x000008c0,
+
+ /* REO Reinject ring address */
+ .hal_sw2reo_ring_base = 0x00000320,
+ .hal_sw2reo1_ring_base = 0x00000398,
+
+ /* REO cmd ring address */
+ .hal_reo_cmd_ring_base = 0x000002A8,
+
+ /* REO status ring address */
+ .hal_reo_status_ring_base = 0x00000aa0,
+
+ /* WBM idle link ring address */
+ .hal_wbm_idle_ring_base_lsb = 0x00000d3c,
+ .hal_wbm_idle_ring_misc_addr = 0x00000d4c,
+ .hal_wbm_r0_idle_list_cntl_addr = 0x00000240,
+ .hal_wbm_r0_idle_list_size_addr = 0x00000244,
+ .hal_wbm_scattered_ring_base_lsb = 0x00000250,
+ .hal_wbm_scattered_ring_base_msb = 0x00000254,
+ .hal_wbm_scattered_desc_head_info_ix0 = 0x00000260,
+ .hal_wbm_scattered_desc_head_info_ix1 = 0x00000264,
+ .hal_wbm_scattered_desc_tail_info_ix0 = 0x00000270,
+ .hal_wbm_scattered_desc_tail_info_ix1 = 0x00000274,
+ .hal_wbm_scattered_desc_ptr_hp_addr = 0x0000027c,
+
+ /* SW2WBM release ring address */
+ .hal_wbm_sw_release_ring_base_lsb = 0x0000037c,
+
+ /* WBM2SW release ring address */
+ .hal_wbm0_release_ring_base_lsb = 0x00000e08,
+ .hal_wbm1_release_ring_base_lsb = 0x00000e80,
+
+ /* PPE release ring address */
+ .hal_ppe_rel_ring_base = 0x0000046c,
+
+ /* CE address */
+ .hal_umac_ce0_src_reg_base = 0x00740000,
+ .hal_umac_ce0_dest_reg_base = 0x00741000,
+ .hal_umac_ce1_src_reg_base = 0x00742000,
+ .hal_umac_ce1_dest_reg_base = 0x00743000,
+};
+
static const struct ath12k_hw_regs wcn7850_regs = {
/* SW2TCL(x) R0 ring configuration address */
.hal_tcl1_ring_id = 0x00000908,
@@ -879,6 +1214,15 @@ static const struct ath12k_hw_hal_params ath12k_hw_hal_params_wcn7850 = {
HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW4_EN,
};
+static const struct ath12k_hw_hal_params ath12k_hw_hal_params_ipq5332 = {
+ .rx_buf_rbm = HAL_RX_BUF_RBM_SW3_BM,
+ .wbm2sw_cc_enable = HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW0_EN |
+ HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW1_EN |
+ HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW2_EN |
+ HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW3_EN |
+ HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW4_EN,
+};
+
static const struct ath12k_hw_params ath12k_hw_params[] = {
{
.name = "qcn9274 hw1.0",
@@ -1112,6 +1456,77 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.supports_aspm = false,
},
+ {
+ .name = "ipq5332 hw1.0",
+ .hw_rev = ATH12K_HW_IPQ5332_HW10,
+ .fw = {
+ .dir = "IPQ5332/hw1.0",
+ .board_size = 256 * 1024,
+ .cal_offset = 128 * 1024,
+ },
+ .max_radios = 1,
+ .single_pdev_only = false,
+ .qmi_service_ins_id = ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ5332,
+ .internal_sleep_clock = false,
+
+ .hw_ops = &qcn9274_ops,
+ .regs = &ipq5332_regs,
+ .ring_mask = &ath12k_hw_ring_mask_ipq5332,
+
+ .host_ce_config = ath12k_host_ce_config_ipq5332,
+ .ce_count = 12,
+ .target_ce_config = ath12k_target_ce_config_wlan_ipq5332,
+ .target_ce_count = 12,
+ .svc_to_ce_map = ath12k_target_service_to_ce_map_wlan_ipq5332,
+ .svc_to_ce_map_len = 18,
+
+ .hal_params = &ath12k_hw_hal_params_ipq5332,
+
+ .rxdma1_enable = false,
+ .num_rxdma_per_pdev = 1,
+ .num_rxdma_dst_ring = 0,
+ .rx_mac_buf_ring = false,
+ .vdev_start_delay = false,
+
+ .interface_modes = BIT(NL80211_IFTYPE_STATION) |
+ BIT(NL80211_IFTYPE_AP) |
+ BIT(NL80211_IFTYPE_MESH_POINT),
+ .supports_monitor = false,
+
+ .idle_ps = false,
+ .download_calib = true,
+ .supports_suspend = false,
+ .tcl_ring_retry = true,
+ .reoq_lut_support = false,
+ .supports_shadow_regs = false,
+
+ .num_tcl_banks = 48,
+ .max_tx_ring = 4,
+
+ .wmi_init = &ath12k_wmi_init_qcn9274,
+
+ .hal_ops = &hal_qcn9274_ops,
+
+ .qmi_cnss_feature_bitmap = BIT(CNSS_QDSS_CFG_MISS_V01),
+
+ .rfkill_pin = 0,
+ .rfkill_cfg = 0,
+ .rfkill_on_level = 0,
+
+ .rddm_size = 0,
+
+ .def_num_link = 0,
+ .max_mlo_peer = 256,
+
+ .otp_board_id_register = 0,
+
+ .supports_sta_ps = false,
+
+ .acpi_guid = NULL,
+ .supports_dynamic_smps_6ghz = false,
+ .iova_mask = 0,
+ .supports_aspm = false,
+ },
};
int ath12k_hw_init(struct ath12k_base *ab)
diff --git a/drivers/net/wireless/ath/ath12k/qmi.h b/drivers/net/wireless/ath/ath12k/qmi.h
index 98f6009ab21e..7c6aa69a876b 100644
--- a/drivers/net/wireless/ath/ath12k/qmi.h
+++ b/drivers/net/wireless/ath/ath12k/qmi.h
@@ -21,6 +21,7 @@
#define ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_WCN7850 0x1
#define ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9274 0x07
+#define ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ5332 0x2
#define ATH12K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 32
#define ATH12K_QMI_RESP_LEN_MAX 8192
#define ATH12K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01 52
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v4 05/13] wifi: ath12k: avoid m3 firmware download in AHB device IPQ5332
2024-12-10 7:41 [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (3 preceding siblings ...)
2024-12-10 7:41 ` [PATCH v4 04/13] wifi: ath12k: add ath12k_hw_params for IPQ5332 Raj Kumar Bhagat
@ 2024-12-10 7:41 ` Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 06/13] wifi: ath12k: Add hw_params to remap CE register space for IPQ5332 Raj Kumar Bhagat
` (8 subsequent siblings)
13 siblings, 0 replies; 27+ messages in thread
From: Raj Kumar Bhagat @ 2024-12-10 7:41 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree,
Balamurugan S, P Praneesh, Raj Kumar Bhagat
From: Balamurugan S <quic_bselvara@quicinc.com>
Current ath12k devices, QCN9274 and WCN7850, supports m3.bin firmware
download through ath12k driver. The new ath12k AHB based device
IPQ5332 supports m3 firmware download through remoteproc driver.
Hence, add new parameter (needs_m3_fw) in ath12k_hw_params to avoid
m3 firmware download in IPQ5332.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1
Signed-off-by: Balamurugan S <quic_bselvara@quicinc.com>
Co-developed-by: P Praneesh <quic_ppranees@quicinc.com>
Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/hw.c | 8 ++++++++
drivers/net/wireless/ath/ath12k/hw.h | 2 ++
drivers/net/wireless/ath/ath12k/qmi.c | 28 ++++++++++++++++-----------
3 files changed, 27 insertions(+), 11 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/hw.c b/drivers/net/wireless/ath/ath12k/hw.c
index c9cddb1417df..f7035669bc6f 100644
--- a/drivers/net/wireless/ath/ath12k/hw.c
+++ b/drivers/net/wireless/ath/ath12k/hw.c
@@ -1299,6 +1299,8 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.iova_mask = 0,
.supports_aspm = false,
+
+ .needs_m3_fw = true,
},
{
.name = "wcn7850 hw2.0",
@@ -1379,6 +1381,8 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.iova_mask = ATH12K_PCIE_MAX_PAYLOAD_SIZE - 1,
.supports_aspm = true,
+
+ .needs_m3_fw = true,
},
{
.name = "qcn9274 hw2.0",
@@ -1455,6 +1459,8 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.iova_mask = 0,
.supports_aspm = false,
+
+ .needs_m3_fw = true,
},
{
.name = "ipq5332 hw1.0",
@@ -1526,6 +1532,8 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.supports_dynamic_smps_6ghz = false,
.iova_mask = 0,
.supports_aspm = false,
+
+ .needs_m3_fw = false,
},
};
diff --git a/drivers/net/wireless/ath/ath12k/hw.h b/drivers/net/wireless/ath/ath12k/hw.h
index 36bec99e9e4d..241aa83ddbdd 100644
--- a/drivers/net/wireless/ath/ath12k/hw.h
+++ b/drivers/net/wireless/ath/ath12k/hw.h
@@ -220,6 +220,8 @@ struct ath12k_hw_params {
bool supports_dynamic_smps_6ghz;
u32 iova_mask;
+
+ bool needs_m3_fw;
};
struct ath12k_hw_ops {
diff --git a/drivers/net/wireless/ath/ath12k/qmi.c b/drivers/net/wireless/ath/ath12k/qmi.c
index ba3cd2342465..7a29a24b9268 100644
--- a/drivers/net/wireless/ath/ath12k/qmi.c
+++ b/drivers/net/wireless/ath/ath12k/qmi.c
@@ -2082,10 +2082,12 @@ int ath12k_qmi_host_cap_send(struct ath12k_base *ab)
req.bdf_support_valid = 1;
req.bdf_support = 1;
- req.m3_support_valid = 1;
- req.m3_support = 1;
- req.m3_cache_support_valid = 1;
- req.m3_cache_support = 1;
+ if (ab->hw_params->needs_m3_fw) {
+ req.m3_support_valid = 1;
+ req.m3_support = 1;
+ req.m3_cache_support_valid = 1;
+ req.m3_cache_support = 1;
+ }
req.cal_done_valid = 1;
req.cal_done = ab->qmi.cal_done;
@@ -2726,6 +2728,9 @@ static void ath12k_qmi_m3_free(struct ath12k_base *ab)
{
struct m3_mem_region *m3_mem = &ab->qmi.m3_mem;
+ if (!ab->hw_params->needs_m3_fw)
+ return;
+
if (!m3_mem->vaddr)
return;
@@ -2806,15 +2811,16 @@ int ath12k_qmi_wlanfw_m3_info_send(struct ath12k_base *ab)
struct qmi_txn txn;
int ret = 0;
- ret = ath12k_qmi_m3_load(ab);
- if (ret) {
- ath12k_err(ab, "failed to load m3 firmware: %d", ret);
- return ret;
+ if (ab->hw_params->needs_m3_fw) {
+ ret = ath12k_qmi_m3_load(ab);
+ if (ret) {
+ ath12k_err(ab, "failed to load m3 firmware: %d", ret);
+ return ret;
+ }
+ req.addr = m3_mem->paddr;
+ req.size = m3_mem->size;
}
- req.addr = m3_mem->paddr;
- req.size = m3_mem->size;
-
ret = qmi_txn_init(&ab->qmi.handle, &txn,
qmi_wlanfw_m3_info_resp_msg_v01_ei, &resp);
if (ret < 0)
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v4 06/13] wifi: ath12k: Add hw_params to remap CE register space for IPQ5332
2024-12-10 7:41 [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (4 preceding siblings ...)
2024-12-10 7:41 ` [PATCH v4 05/13] wifi: ath12k: avoid m3 firmware download in AHB device IPQ5332 Raj Kumar Bhagat
@ 2024-12-10 7:41 ` Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 07/13] wifi: ath12k: add support for fixed QMI firmware memory Raj Kumar Bhagat
` (7 subsequent siblings)
13 siblings, 0 replies; 27+ messages in thread
From: Raj Kumar Bhagat @ 2024-12-10 7:41 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree,
Balamurugan S, P Praneesh, Raj Kumar Bhagat
From: Balamurugan S <quic_bselvara@quicinc.com>
For IPQ5332 CE register space is moved out of WCSS region and the
space is not contiguous. Hence, add hardware params (ce_ie_addr &
ce_remap) for IPQ5332. These parameters would be used by Ath12k
AHB driver (in subsequent patches) to remap the CE registers to a
new space for accessing them.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1
Signed-off-by: Balamurugan S <quic_bselvara@quicinc.com>
Co-developed-by: P Praneesh <quic_ppranees@quicinc.com>
Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/ce.h | 11 +++++++++
drivers/net/wireless/ath/ath12k/core.h | 4 ++++
drivers/net/wireless/ath/ath12k/hal.h | 4 ++++
drivers/net/wireless/ath/ath12k/hw.c | 31 ++++++++++++++++++++++----
drivers/net/wireless/ath/ath12k/hw.h | 2 ++
5 files changed, 48 insertions(+), 4 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/ce.h b/drivers/net/wireless/ath/ath12k/ce.h
index 6b1a356f43be..75c9f8f1f7c6 100644
--- a/drivers/net/wireless/ath/ath12k/ce.h
+++ b/drivers/net/wireless/ath/ath12k/ce.h
@@ -76,6 +76,17 @@ struct ce_pipe_config {
__le32 reserved;
};
+struct ce_ie_addr {
+ u32 ie1_reg_addr;
+ u32 ie2_reg_addr;
+ u32 ie3_reg_addr;
+};
+
+struct ce_remap {
+ u32 base;
+ u32 size;
+};
+
struct ce_attr {
/* CE_ATTR_* values */
unsigned int flags;
diff --git a/drivers/net/wireless/ath/ath12k/core.h b/drivers/net/wireless/ath/ath12k/core.h
index 1737fb8f765d..e45ff85b675d 100644
--- a/drivers/net/wireless/ath/ath12k/core.h
+++ b/drivers/net/wireless/ath/ath12k/core.h
@@ -872,6 +872,10 @@ struct ath12k_base {
void __iomem *mem;
unsigned long mem_len;
+ void __iomem *mem_ce;
+ u32 ce_remap_base_addr;
+ bool ce_remap;
+
struct {
enum ath12k_bus bus;
const struct ath12k_hif_ops *ops;
diff --git a/drivers/net/wireless/ath/ath12k/hal.h b/drivers/net/wireless/ath/ath12k/hal.h
index 69579f118b81..70dbd460dae3 100644
--- a/drivers/net/wireless/ath/ath12k/hal.h
+++ b/drivers/net/wireless/ath/ath12k/hal.h
@@ -11,6 +11,7 @@
#include "rx_desc.h"
struct ath12k_base;
+#define HAL_CE_REMAP_REG_BASE (ab->ce_remap_base_addr)
#define HAL_LINK_DESC_SIZE (32 << 2)
#define HAL_LINK_DESC_ALIGN 128
@@ -372,6 +373,9 @@ struct ath12k_base;
* ath12k_hal_rx_desc_get_err().
*/
+#define HAL_IPQ5332_CE_WFSS_REG_BASE 0x740000
+#define HAL_IPQ5332_CE_SIZE 0x100000
+
enum hal_srng_ring_id {
HAL_SRNG_RING_ID_REO2SW0 = 0,
HAL_SRNG_RING_ID_REO2SW1,
diff --git a/drivers/net/wireless/ath/ath12k/hw.c b/drivers/net/wireless/ath/ath12k/hw.c
index f7035669bc6f..494963b19fe9 100644
--- a/drivers/net/wireless/ath/ath12k/hw.c
+++ b/drivers/net/wireless/ath/ath12k/hw.c
@@ -1106,10 +1106,14 @@ static const struct ath12k_hw_regs ipq5332_regs = {
.hal_ppe_rel_ring_base = 0x0000046c,
/* CE address */
- .hal_umac_ce0_src_reg_base = 0x00740000,
- .hal_umac_ce0_dest_reg_base = 0x00741000,
- .hal_umac_ce1_src_reg_base = 0x00742000,
- .hal_umac_ce1_dest_reg_base = 0x00743000,
+ .hal_umac_ce0_src_reg_base = 0x00740000 -
+ HAL_IPQ5332_CE_WFSS_REG_BASE,
+ .hal_umac_ce0_dest_reg_base = 0x00741000 -
+ HAL_IPQ5332_CE_WFSS_REG_BASE,
+ .hal_umac_ce1_src_reg_base = 0x00742000 -
+ HAL_IPQ5332_CE_WFSS_REG_BASE,
+ .hal_umac_ce1_dest_reg_base = 0x00743000 -
+ HAL_IPQ5332_CE_WFSS_REG_BASE,
};
static const struct ath12k_hw_regs wcn7850_regs = {
@@ -1223,6 +1227,17 @@ static const struct ath12k_hw_hal_params ath12k_hw_hal_params_ipq5332 = {
HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW4_EN,
};
+static const struct ce_ie_addr ath12k_ce_ie_addr_ipq5332 = {
+ .ie1_reg_addr = CE_HOST_IE_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE,
+ .ie2_reg_addr = CE_HOST_IE_2_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE,
+ .ie3_reg_addr = CE_HOST_IE_3_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE,
+};
+
+static const struct ce_remap ath12k_ce_remap_ipq5332 = {
+ .base = HAL_IPQ5332_CE_WFSS_REG_BASE,
+ .size = HAL_IPQ5332_CE_SIZE,
+};
+
static const struct ath12k_hw_params ath12k_hw_params[] = {
{
.name = "qcn9274 hw1.0",
@@ -1301,6 +1316,8 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.supports_aspm = false,
.needs_m3_fw = true,
+ .ce_ie_addr = NULL,
+ .ce_remap = NULL,
},
{
.name = "wcn7850 hw2.0",
@@ -1383,6 +1400,8 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.supports_aspm = true,
.needs_m3_fw = true,
+ .ce_ie_addr = NULL,
+ .ce_remap = NULL,
},
{
.name = "qcn9274 hw2.0",
@@ -1461,6 +1480,8 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.supports_aspm = false,
.needs_m3_fw = true,
+ .ce_ie_addr = NULL,
+ .ce_remap = NULL,
},
{
.name = "ipq5332 hw1.0",
@@ -1534,6 +1555,8 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.supports_aspm = false,
.needs_m3_fw = false,
+ .ce_ie_addr = &ath12k_ce_ie_addr_ipq5332,
+ .ce_remap = &ath12k_ce_remap_ipq5332,
},
};
diff --git a/drivers/net/wireless/ath/ath12k/hw.h b/drivers/net/wireless/ath/ath12k/hw.h
index 241aa83ddbdd..ee37e50476a4 100644
--- a/drivers/net/wireless/ath/ath12k/hw.h
+++ b/drivers/net/wireless/ath/ath12k/hw.h
@@ -222,6 +222,8 @@ struct ath12k_hw_params {
u32 iova_mask;
bool needs_m3_fw;
+ const struct ce_ie_addr *ce_ie_addr;
+ const struct ce_remap *ce_remap;
};
struct ath12k_hw_ops {
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v4 07/13] wifi: ath12k: add support for fixed QMI firmware memory
2024-12-10 7:41 [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (5 preceding siblings ...)
2024-12-10 7:41 ` [PATCH v4 06/13] wifi: ath12k: Add hw_params to remap CE register space for IPQ5332 Raj Kumar Bhagat
@ 2024-12-10 7:41 ` Raj Kumar Bhagat
2024-12-10 14:43 ` Krzysztof Kozlowski
2024-12-10 7:41 ` [PATCH v4 08/13] wifi: ath12k: add AHB driver support for IPQ5332 Raj Kumar Bhagat
` (6 subsequent siblings)
13 siblings, 1 reply; 27+ messages in thread
From: Raj Kumar Bhagat @ 2024-12-10 7:41 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree,
Raj Kumar Bhagat
IPQ5332 firmware supports only fixed QMI firmware memory.
Hence, add support to read reserved fixed memory region from
device-tree and provide the reserved memory segments for
firmware to use during QMI firmware memory request.
Note that the ability to set the fixed memory will be introduced in
a subsequent patch. Currently, the flag remains unset by default,
ensuring that existing chipsets are unaffected.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/core.h | 1 +
drivers/net/wireless/ath/ath12k/hw.c | 4 +
drivers/net/wireless/ath/ath12k/hw.h | 1 +
drivers/net/wireless/ath/ath12k/qmi.c | 141 +++++++++++++++++++++++--
4 files changed, 141 insertions(+), 6 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/core.h b/drivers/net/wireless/ath/ath12k/core.h
index e45ff85b675d..5e49fd6c8bc9 100644
--- a/drivers/net/wireless/ath/ath12k/core.h
+++ b/drivers/net/wireless/ath/ath12k/core.h
@@ -235,6 +235,7 @@ enum ath12k_dev_flags {
ATH12K_FLAG_CE_IRQ_ENABLED,
ATH12K_FLAG_EXT_IRQ_ENABLED,
ATH12K_FLAG_QMI_FW_READY_COMPLETE,
+ ATH12K_FLAG_FIXED_MEM_REGION,
};
struct ath12k_tx_conf {
diff --git a/drivers/net/wireless/ath/ath12k/hw.c b/drivers/net/wireless/ath/ath12k/hw.c
index 494963b19fe9..4db4bb1bea95 100644
--- a/drivers/net/wireless/ath/ath12k/hw.c
+++ b/drivers/net/wireless/ath/ath12k/hw.c
@@ -1318,6 +1318,7 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.needs_m3_fw = true,
.ce_ie_addr = NULL,
.ce_remap = NULL,
+ .bdf_addr = 0,
},
{
.name = "wcn7850 hw2.0",
@@ -1402,6 +1403,7 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.needs_m3_fw = true,
.ce_ie_addr = NULL,
.ce_remap = NULL,
+ .bdf_addr = 0,
},
{
.name = "qcn9274 hw2.0",
@@ -1482,6 +1484,7 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.needs_m3_fw = true,
.ce_ie_addr = NULL,
.ce_remap = NULL,
+ .bdf_addr = 0,
},
{
.name = "ipq5332 hw1.0",
@@ -1557,6 +1560,7 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
.needs_m3_fw = false,
.ce_ie_addr = &ath12k_ce_ie_addr_ipq5332,
.ce_remap = &ath12k_ce_remap_ipq5332,
+ .bdf_addr = 0x4B500000,
},
};
diff --git a/drivers/net/wireless/ath/ath12k/hw.h b/drivers/net/wireless/ath/ath12k/hw.h
index ee37e50476a4..524fab05768f 100644
--- a/drivers/net/wireless/ath/ath12k/hw.h
+++ b/drivers/net/wireless/ath/ath12k/hw.h
@@ -224,6 +224,7 @@ struct ath12k_hw_params {
bool needs_m3_fw;
const struct ce_ie_addr *ce_ie_addr;
const struct ce_remap *ce_remap;
+ u32 bdf_addr;
};
struct ath12k_hw_ops {
diff --git a/drivers/net/wireless/ath/ath12k/qmi.c b/drivers/net/wireless/ath/ath12k/qmi.c
index 7a29a24b9268..337347035605 100644
--- a/drivers/net/wireless/ath/ath12k/qmi.c
+++ b/drivers/net/wireless/ath/ath12k/qmi.c
@@ -11,6 +11,8 @@
#include "debug.h"
#include <linux/of.h>
#include <linux/firmware.h>
+#include <linux/of_address.h>
+#include <linux/ioport.h>
#define SLEEP_CLOCK_SELECT_INTERNAL_BIT 0x02
#define HOST_CSTATE_BIT 0x04
@@ -2295,7 +2297,8 @@ int ath12k_qmi_respond_fw_mem_request(struct ath12k_base *ab)
* failure to firmware and firmware then request multiple blocks of
* small chunk size memory.
*/
- if (ab->qmi.target_mem_delayed) {
+ if (!test_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags) &&
+ ab->qmi.target_mem_delayed) {
delayed = true;
ath12k_dbg(ab, ATH12K_DBG_QMI, "qmi delays mem_request %d\n",
ab->qmi.mem_seg_count);
@@ -2358,6 +2361,11 @@ static void ath12k_qmi_free_target_mem_chunk(struct ath12k_base *ab)
int i;
for (i = 0; i < ab->qmi.mem_seg_count; i++) {
+ if (test_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags) &&
+ ab->qmi.target_mem[i].v.ioaddr) {
+ iounmap(ab->qmi.target_mem[i].v.ioaddr);
+ ab->qmi.target_mem[i].v.ioaddr = NULL;
+ }
if (!ab->qmi.target_mem[i].v.addr)
continue;
@@ -2436,6 +2444,118 @@ static int ath12k_qmi_alloc_target_mem_chunk(struct ath12k_base *ab)
return 0;
}
+static int ath12k_qmi_assign_target_mem_chunk(struct ath12k_base *ab)
+{
+ struct device *dev = ab->dev;
+ struct device_node *mem_node, *dev_node;
+ struct resource res, m3_res;
+ int i, idx, ret;
+
+ for (i = 0, idx = 0; i < ab->qmi.mem_seg_count; i++) {
+ switch (ab->qmi.target_mem[i].type) {
+ case HOST_DDR_REGION_TYPE:
+ mem_node = of_parse_phandle(dev->of_node, "memory-region", 0);
+ if (!mem_node) {
+ ath12k_dbg(ab, ATH12K_DBG_QMI,
+ "memory-region not defined in device-tree\n");
+ ret = -ENODEV;
+ goto out;
+ }
+
+ ret = of_address_to_resource(mem_node, 0, &res);
+ of_node_put(mem_node);
+ if (ret) {
+ ath12k_dbg(ab, ATH12K_DBG_QMI,
+ "fail to get reg from memory-region\n");
+ goto out;
+ }
+
+ if (res.end - res.start + 1 < ab->qmi.target_mem[i].size) {
+ ath12k_dbg(ab, ATH12K_DBG_QMI,
+ "failed to assign mem type %d req size %d avail size %lld\n",
+ ab->qmi.target_mem[i].type,
+ ab->qmi.target_mem[i].size,
+ (res.end - res.start + 1));
+ ret = -EINVAL;
+ goto out;
+ }
+
+ ab->qmi.target_mem[idx].paddr = res.start;
+ ab->qmi.target_mem[idx].v.ioaddr =
+ ioremap(ab->qmi.target_mem[idx].paddr,
+ ab->qmi.target_mem[i].size);
+ if (!ab->qmi.target_mem[idx].v.ioaddr) {
+ ret = -EIO;
+ goto out;
+ }
+ ab->qmi.target_mem[idx].size = ab->qmi.target_mem[i].size;
+ ab->qmi.target_mem[idx].type = ab->qmi.target_mem[i].type;
+ idx++;
+ break;
+ case BDF_MEM_REGION_TYPE:
+ ab->qmi.target_mem[idx].paddr = ab->hw_params->bdf_addr;
+ ab->qmi.target_mem[idx].v.ioaddr = NULL;
+ ab->qmi.target_mem[idx].size = ab->qmi.target_mem[i].size;
+ ab->qmi.target_mem[idx].type = ab->qmi.target_mem[i].type;
+ idx++;
+ break;
+
+ case CALDB_MEM_REGION_TYPE:
+ /* Cold boot calibration is not enabled in Ath12k. Hence,
+ * assign paddr = 0.
+ * Once cold boot calibration is enabled add support to
+ * assign reserved memory from DT.
+ */
+ ab->qmi.target_mem[idx].paddr = 0;
+ ab->qmi.target_mem[idx].v.ioaddr = NULL;
+ ab->qmi.target_mem[idx].size = ab->qmi.target_mem[i].size;
+ ab->qmi.target_mem[idx].type = ab->qmi.target_mem[i].type;
+ idx++;
+ break;
+ case M3_DUMP_REGION_TYPE:
+ dev_node = of_find_node_by_name(NULL, "m3_dump");
+ if (!dev_node || of_address_to_resource(dev_node, 0, &m3_res)) {
+ ath12k_err(ab, "m3_dump not defined in device-tree\n");
+ ret = -EINVAL;
+ goto out;
+ }
+
+ if (m3_res.end - m3_res.start + 1 < ab->qmi.target_mem[i].size) {
+ ath12k_dbg(ab, ATH12K_DBG_QMI,
+ "failed to assign mem type %d req size %d avail size %lld\n",
+ ab->qmi.target_mem[i].type,
+ ab->qmi.target_mem[i].size,
+ (m3_res.end - m3_res.start + 1));
+ ret = -EINVAL;
+ goto out;
+ }
+
+ ab->qmi.target_mem[idx].paddr = m3_res.start;
+ ab->qmi.target_mem[idx].v.ioaddr =
+ ioremap(ab->qmi.target_mem[idx].paddr,
+ ab->qmi.target_mem[i].size);
+ if (!ab->qmi.target_mem[idx].v.ioaddr) {
+ ret = -EIO;
+ goto out;
+ }
+ ab->qmi.target_mem[idx].size = ab->qmi.target_mem[i].size;
+ ab->qmi.target_mem[idx].type = ab->qmi.target_mem[i].type;
+ idx++;
+ break;
+ default:
+ ath12k_warn(ab, "qmi ignore invalid mem req type %d\n",
+ ab->qmi.target_mem[i].type);
+ break;
+ }
+ }
+ ab->qmi.mem_seg_count = idx;
+
+ return 0;
+out:
+ ath12k_qmi_free_target_mem_chunk(ab);
+ return ret;
+}
+
/* clang stack usage explodes if this is inlined */
static noinline_for_stack
int ath12k_qmi_request_target_cap(struct ath12k_base *ab)
@@ -3270,11 +3390,20 @@ static void ath12k_qmi_msg_mem_request_cb(struct qmi_handle *qmi_hdl,
msg->mem_seg[i].type, msg->mem_seg[i].size);
}
- ret = ath12k_qmi_alloc_target_mem_chunk(ab);
- if (ret) {
- ath12k_warn(ab, "qmi failed to alloc target memory: %d\n",
- ret);
- return;
+ if (test_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags)) {
+ ret = ath12k_qmi_assign_target_mem_chunk(ab);
+ if (ret) {
+ ath12k_warn(ab, "failed to assign qmi target memory: %d\n",
+ ret);
+ return;
+ }
+ } else {
+ ret = ath12k_qmi_alloc_target_mem_chunk(ab);
+ if (ret) {
+ ath12k_warn(ab, "qmi failed to alloc target memory: %d\n",
+ ret);
+ return;
+ }
}
ath12k_qmi_driver_event_post(qmi, ATH12K_QMI_EVENT_REQUEST_MEM, NULL);
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v4 08/13] wifi: ath12k: add AHB driver support for IPQ5332
2024-12-10 7:41 [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (6 preceding siblings ...)
2024-12-10 7:41 ` [PATCH v4 07/13] wifi: ath12k: add support for fixed QMI firmware memory Raj Kumar Bhagat
@ 2024-12-10 7:41 ` Raj Kumar Bhagat
2024-12-10 14:47 ` Krzysztof Kozlowski
2024-12-10 7:41 ` [PATCH v4 09/13] wifi: ath12k: Power up root PD Raj Kumar Bhagat
` (5 subsequent siblings)
13 siblings, 1 reply; 27+ messages in thread
From: Raj Kumar Bhagat @ 2024-12-10 7:41 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree,
Balamurugan S, P Praneesh, Raj Kumar Bhagat
From: Balamurugan S <quic_bselvara@quicinc.com>
Add Initial Ath12k AHB driver support for IPQ5332. IPQ5332 is AHB
based IEEE802.11be 2 GHz 2x2 WiFi device.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1
Signed-off-by: Balamurugan S <quic_bselvara@quicinc.com>
Co-developed-by: P Praneesh <quic_ppranees@quicinc.com>
Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
Co-developed-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/ahb.c | 878 +++++++++++++++++++++++++
drivers/net/wireless/ath/ath12k/ahb.h | 37 ++
drivers/net/wireless/ath/ath12k/core.h | 4 +
drivers/net/wireless/ath/ath12k/hal.h | 1 +
drivers/net/wireless/ath/ath12k/hw.h | 1 +
5 files changed, 921 insertions(+)
create mode 100644 drivers/net/wireless/ath/ath12k/ahb.c
create mode 100644 drivers/net/wireless/ath/ath12k/ahb.h
diff --git a/drivers/net/wireless/ath/ath12k/ahb.c b/drivers/net/wireless/ath/ath12k/ahb.c
new file mode 100644
index 000000000000..fcd949faea9f
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/ahb.c
@@ -0,0 +1,878 @@
+// SPDX-License-Identifier: BSD-3-Clause-Clear
+/*
+ * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <linux/dma-mapping.h>
+#include <linux/iommu.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/remoteproc.h>
+#include <linux/soc/qcom/smem.h>
+#include <linux/soc/qcom/smem_state.h>
+#include "ahb.h"
+#include "debug.h"
+#include "hif.h"
+
+static const struct of_device_id ath12k_ahb_of_match[] = {
+ { .compatible = "qcom,ipq5332-wifi",
+ .data = (void *)ATH12K_HW_IPQ5332_HW10,
+ },
+ { }
+};
+
+MODULE_DEVICE_TABLE(of, ath12k_ahb_of_match);
+
+#define ATH12K_IRQ_CE0_OFFSET 4
+
+static const char *irq_name[ATH12K_IRQ_NUM_MAX] = {
+ "misc-pulse1",
+ "misc-latch",
+ "sw-exception",
+ "watchdog",
+ "ce0",
+ "ce1",
+ "ce2",
+ "ce3",
+ "ce4",
+ "ce5",
+ "ce6",
+ "ce7",
+ "ce8",
+ "ce9",
+ "ce10",
+ "ce11",
+ "host2wbm-desc-feed",
+ "host2reo-re-injection",
+ "host2reo-command",
+ "host2rxdma-monitor-ring3",
+ "host2rxdma-monitor-ring2",
+ "host2rxdma-monitor-ring1",
+ "reo2ost-exception",
+ "wbm2host-rx-release",
+ "reo2host-status",
+ "reo2host-destination-ring4",
+ "reo2host-destination-ring3",
+ "reo2host-destination-ring2",
+ "reo2host-destination-ring1",
+ "rxdma2host-monitor-destination-mac3",
+ "rxdma2host-monitor-destination-mac2",
+ "rxdma2host-monitor-destination-mac1",
+ "ppdu-end-interrupts-mac3",
+ "ppdu-end-interrupts-mac2",
+ "ppdu-end-interrupts-mac1",
+ "rxdma2host-monitor-status-ring-mac3",
+ "rxdma2host-monitor-status-ring-mac2",
+ "rxdma2host-monitor-status-ring-mac1",
+ "host2rxdma-host-buf-ring-mac3",
+ "host2rxdma-host-buf-ring-mac2",
+ "host2rxdma-host-buf-ring-mac1",
+ "rxdma2host-destination-ring-mac3",
+ "rxdma2host-destination-ring-mac2",
+ "rxdma2host-destination-ring-mac1",
+ "host2tcl-input-ring4",
+ "host2tcl-input-ring3",
+ "host2tcl-input-ring2",
+ "host2tcl-input-ring1",
+ "wbm2host-tx-completions-ring4",
+ "wbm2host-tx-completions-ring3",
+ "wbm2host-tx-completions-ring2",
+ "wbm2host-tx-completions-ring1",
+ "tcl2host-status-ring",
+};
+
+enum ext_irq_num {
+ host2wbm_desc_feed = 16,
+ host2reo_re_injection,
+ host2reo_command,
+ host2rxdma_monitor_ring3,
+ host2rxdma_monitor_ring2,
+ host2rxdma_monitor_ring1,
+ reo2host_exception,
+ wbm2host_rx_release,
+ reo2host_status,
+ reo2host_destination_ring4,
+ reo2host_destination_ring3,
+ reo2host_destination_ring2,
+ reo2host_destination_ring1,
+ rxdma2host_monitor_destination_mac3,
+ rxdma2host_monitor_destination_mac2,
+ rxdma2host_monitor_destination_mac1,
+ ppdu_end_interrupts_mac3,
+ ppdu_end_interrupts_mac2,
+ ppdu_end_interrupts_mac1,
+ rxdma2host_monitor_status_ring_mac3,
+ rxdma2host_monitor_status_ring_mac2,
+ rxdma2host_monitor_status_ring_mac1,
+ host2rxdma_host_buf_ring_mac3,
+ host2rxdma_host_buf_ring_mac2,
+ host2rxdma_host_buf_ring_mac1,
+ rxdma2host_destination_ring_mac3,
+ rxdma2host_destination_ring_mac2,
+ rxdma2host_destination_ring_mac1,
+ host2tcl_input_ring4,
+ host2tcl_input_ring3,
+ host2tcl_input_ring2,
+ host2tcl_input_ring1,
+ wbm2host_tx_completions_ring4,
+ wbm2host_tx_completions_ring3,
+ wbm2host_tx_completions_ring2,
+ wbm2host_tx_completions_ring1,
+ tcl2host_status_ring,
+};
+
+static u32 ath12k_ahb_read32(struct ath12k_base *ab, u32 offset)
+{
+ if (ab->ce_remap && offset < HAL_SEQ_WCSS_CMEM_OFFSET)
+ return ioread32(ab->mem_ce + offset);
+ return ioread32(ab->mem + offset);
+}
+
+static void ath12k_ahb_write32(struct ath12k_base *ab, u32 offset,
+ u32 value)
+{
+ if (ab->ce_remap && offset < HAL_SEQ_WCSS_CMEM_OFFSET)
+ iowrite32(value, ab->mem_ce + offset);
+ else
+ iowrite32(value, ab->mem + offset);
+}
+
+static void ath12k_ahb_cancel_workqueue(struct ath12k_base *ab)
+{
+ int i;
+
+ for (i = 0; i < ab->hw_params->ce_count; i++) {
+ struct ath12k_ce_pipe *ce_pipe = &ab->ce.ce_pipe[i];
+
+ if (ath12k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
+ continue;
+
+ cancel_work_sync(&ce_pipe->intr_wq);
+ }
+}
+
+static void ath12k_ahb_ext_grp_disable(struct ath12k_ext_irq_grp *irq_grp)
+{
+ int i;
+
+ for (i = 0; i < irq_grp->num_irq; i++)
+ disable_irq_nosync(irq_grp->ab->irq_num[irq_grp->irqs[i]]);
+}
+
+static void __ath12k_ahb_ext_irq_disable(struct ath12k_base *ab)
+{
+ int i;
+
+ for (i = 0; i < ATH12K_EXT_IRQ_GRP_NUM_MAX; i++) {
+ struct ath12k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i];
+
+ ath12k_ahb_ext_grp_disable(irq_grp);
+ if (irq_grp->napi_enabled) {
+ napi_synchronize(&irq_grp->napi);
+ napi_disable(&irq_grp->napi);
+ irq_grp->napi_enabled = false;
+ }
+ }
+}
+
+static void ath12k_ahb_ext_grp_enable(struct ath12k_ext_irq_grp *irq_grp)
+{
+ int i;
+
+ for (i = 0; i < irq_grp->num_irq; i++)
+ enable_irq(irq_grp->ab->irq_num[irq_grp->irqs[i]]);
+}
+
+static void ath12k_ahb_setbit32(struct ath12k_base *ab, u8 bit, u32 offset)
+{
+ u32 val;
+
+ val = ath12k_ahb_read32(ab, offset);
+ ath12k_ahb_write32(ab, offset, val | BIT(bit));
+}
+
+static void ath12k_ahb_clearbit32(struct ath12k_base *ab, u8 bit, u32 offset)
+{
+ u32 val;
+
+ val = ath12k_ahb_read32(ab, offset);
+ ath12k_ahb_write32(ab, offset, val & ~BIT(bit));
+}
+
+static void ath12k_ahb_ce_irq_enable(struct ath12k_base *ab, u16 ce_id)
+{
+ const struct ce_attr *ce_attr;
+ const struct ce_ie_addr *ce_ie_addr = ab->hw_params->ce_ie_addr;
+ u32 ie1_reg_addr, ie2_reg_addr, ie3_reg_addr;
+
+ ie1_reg_addr = ce_ie_addr->ie1_reg_addr;
+ ie2_reg_addr = ce_ie_addr->ie2_reg_addr;
+ ie3_reg_addr = ce_ie_addr->ie3_reg_addr;
+
+ ce_attr = &ab->hw_params->host_ce_config[ce_id];
+ if (ce_attr->src_nentries)
+ ath12k_ahb_setbit32(ab, ce_id, ie1_reg_addr);
+
+ if (ce_attr->dest_nentries) {
+ ath12k_ahb_setbit32(ab, ce_id, ie2_reg_addr);
+ ath12k_ahb_setbit32(ab, ce_id + CE_HOST_IE_3_SHIFT,
+ ie3_reg_addr);
+ }
+}
+
+static void ath12k_ahb_ce_irq_disable(struct ath12k_base *ab, u16 ce_id)
+{
+ const struct ce_attr *ce_attr;
+ const struct ce_ie_addr *ce_ie_addr = ab->hw_params->ce_ie_addr;
+ u32 ie1_reg_addr, ie2_reg_addr, ie3_reg_addr;
+
+ ie1_reg_addr = ce_ie_addr->ie1_reg_addr;
+ ie2_reg_addr = ce_ie_addr->ie2_reg_addr;
+ ie3_reg_addr = ce_ie_addr->ie3_reg_addr;
+
+ ce_attr = &ab->hw_params->host_ce_config[ce_id];
+ if (ce_attr->src_nentries)
+ ath12k_ahb_clearbit32(ab, ce_id, ie1_reg_addr);
+
+ if (ce_attr->dest_nentries) {
+ ath12k_ahb_clearbit32(ab, ce_id, ie2_reg_addr);
+ ath12k_ahb_clearbit32(ab, ce_id + CE_HOST_IE_3_SHIFT,
+ ie3_reg_addr);
+ }
+}
+
+static void ath12k_ahb_sync_ce_irqs(struct ath12k_base *ab)
+{
+ int i;
+ int irq_idx;
+
+ for (i = 0; i < ab->hw_params->ce_count; i++) {
+ if (ath12k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
+ continue;
+
+ irq_idx = ATH12K_IRQ_CE0_OFFSET + i;
+ synchronize_irq(ab->irq_num[irq_idx]);
+ }
+}
+
+static void ath12k_ahb_sync_ext_irqs(struct ath12k_base *ab)
+{
+ int i, j;
+ int irq_idx;
+
+ for (i = 0; i < ATH12K_EXT_IRQ_GRP_NUM_MAX; i++) {
+ struct ath12k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i];
+
+ for (j = 0; j < irq_grp->num_irq; j++) {
+ irq_idx = irq_grp->irqs[j];
+ synchronize_irq(ab->irq_num[irq_idx]);
+ }
+ }
+}
+
+static void ath12k_ahb_ce_irqs_enable(struct ath12k_base *ab)
+{
+ int i;
+
+ for (i = 0; i < ab->hw_params->ce_count; i++) {
+ if (ath12k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
+ continue;
+ ath12k_ahb_ce_irq_enable(ab, i);
+ }
+}
+
+static void ath12k_ahb_ce_irqs_disable(struct ath12k_base *ab)
+{
+ int i;
+
+ for (i = 0; i < ab->hw_params->ce_count; i++) {
+ if (ath12k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
+ continue;
+ ath12k_ahb_ce_irq_disable(ab, i);
+ }
+}
+
+static int ath12k_ahb_start(struct ath12k_base *ab)
+{
+ ath12k_ahb_ce_irqs_enable(ab);
+ ath12k_ce_rx_post_buf(ab);
+
+ return 0;
+}
+
+static void ath12k_ahb_ext_irq_enable(struct ath12k_base *ab)
+{
+ struct ath12k_ext_irq_grp *irq_grp;
+ int i;
+
+ for (i = 0; i < ATH12K_EXT_IRQ_GRP_NUM_MAX; i++) {
+ irq_grp = &ab->ext_irq_grp[i];
+ if (!irq_grp->napi_enabled) {
+ napi_enable(&irq_grp->napi);
+ irq_grp->napi_enabled = true;
+ }
+ ath12k_ahb_ext_grp_enable(irq_grp);
+ }
+}
+
+static void ath12k_ahb_ext_irq_disable(struct ath12k_base *ab)
+{
+ __ath12k_ahb_ext_irq_disable(ab);
+ ath12k_ahb_sync_ext_irqs(ab);
+}
+
+static void ath12k_ahb_stop(struct ath12k_base *ab)
+{
+ if (!test_bit(ATH12K_FLAG_CRASH_FLUSH, &ab->dev_flags))
+ ath12k_ahb_ce_irqs_disable(ab);
+ ath12k_ahb_sync_ce_irqs(ab);
+ ath12k_ahb_cancel_workqueue(ab);
+ del_timer_sync(&ab->rx_replenish_retry);
+ ath12k_ce_cleanup_pipes(ab);
+}
+
+static void ath12k_ahb_init_qmi_ce_config(struct ath12k_base *ab)
+{
+ struct ath12k_qmi_ce_cfg *cfg = &ab->qmi.ce_cfg;
+
+ cfg->tgt_ce_len = ab->hw_params->target_ce_count;
+ cfg->tgt_ce = ab->hw_params->target_ce_config;
+ cfg->svc_to_ce_map_len = ab->hw_params->svc_to_ce_map_len;
+ cfg->svc_to_ce_map = ab->hw_params->svc_to_ce_map;
+ ab->qmi.service_ins_id = ab->hw_params->qmi_service_ins_id;
+}
+
+static void ath12k_ahb_ce_workqueue(struct work_struct *work)
+{
+ struct ath12k_ce_pipe *ce_pipe = from_work(ce_pipe, work, intr_wq);
+
+ ath12k_ce_per_engine_service(ce_pipe->ab, ce_pipe->pipe_num);
+
+ ath12k_ahb_ce_irq_enable(ce_pipe->ab, ce_pipe->pipe_num);
+}
+
+static irqreturn_t ath12k_ahb_ce_interrupt_handler(int irq, void *arg)
+{
+ struct ath12k_ce_pipe *ce_pipe = arg;
+
+ /* last interrupt received for this CE */
+ ce_pipe->timestamp = jiffies;
+
+ ath12k_ahb_ce_irq_disable(ce_pipe->ab, ce_pipe->pipe_num);
+
+ queue_work(system_bh_wq, &ce_pipe->intr_wq);
+
+ return IRQ_HANDLED;
+}
+
+static int ath12k_ahb_ext_grp_napi_poll(struct napi_struct *napi, int budget)
+{
+ struct ath12k_ext_irq_grp *irq_grp = container_of(napi,
+ struct ath12k_ext_irq_grp,
+ napi);
+ struct ath12k_base *ab = irq_grp->ab;
+ int work_done;
+
+ work_done = ath12k_dp_service_srng(ab, irq_grp, budget);
+ if (work_done < budget) {
+ napi_complete_done(napi, work_done);
+ ath12k_ahb_ext_grp_enable(irq_grp);
+ }
+
+ if (work_done > budget)
+ work_done = budget;
+
+ return work_done;
+}
+
+static irqreturn_t ath12k_ahb_ext_interrupt_handler(int irq, void *arg)
+{
+ struct ath12k_ext_irq_grp *irq_grp = arg;
+
+ /* last interrupt received for this group */
+ irq_grp->timestamp = jiffies;
+
+ ath12k_ahb_ext_grp_disable(irq_grp);
+
+ napi_schedule(&irq_grp->napi);
+
+ return IRQ_HANDLED;
+}
+
+static int ath12k_ahb_config_ext_irq(struct ath12k_base *ab)
+{
+ const struct ath12k_hw_ring_mask *ring_mask;
+ struct ath12k_ext_irq_grp *irq_grp;
+ const struct hal_ops *hal_ops;
+ int i, j, irq, irq_idx, ret;
+ u32 num_irq;
+
+ ring_mask = ab->hw_params->ring_mask;
+ hal_ops = ab->hw_params->hal_ops;
+ for (i = 0; i < ATH12K_EXT_IRQ_GRP_NUM_MAX; i++) {
+ irq_grp = &ab->ext_irq_grp[i];
+ num_irq = 0;
+
+ irq_grp->ab = ab;
+ irq_grp->grp_id = i;
+
+ irq_grp->napi_ndev = alloc_netdev_dummy(0);
+ if (!irq_grp->napi_ndev)
+ return -ENOMEM;
+
+ netif_napi_add(irq_grp->napi_ndev, &irq_grp->napi,
+ ath12k_ahb_ext_grp_napi_poll);
+
+ for (j = 0; j < ATH12K_EXT_IRQ_NUM_MAX; j++) {
+ /* For TX ring, ensure that the ring mask and the
+ * tcl_to_wbm_rbm_map point to the same ring number.
+ */
+ if (ring_mask->tx[i] &
+ BIT(hal_ops->tcl_to_wbm_rbm_map[j].wbm_ring_num)) {
+ irq_grp->irqs[num_irq++] =
+ wbm2host_tx_completions_ring1 - j;
+ }
+
+ if (ring_mask->rx[i] & BIT(j)) {
+ irq_grp->irqs[num_irq++] =
+ reo2host_destination_ring1 - j;
+ }
+
+ if (ring_mask->rx_err[i] & BIT(j))
+ irq_grp->irqs[num_irq++] = reo2host_exception;
+
+ if (ring_mask->rx_wbm_rel[i] & BIT(j))
+ irq_grp->irqs[num_irq++] = wbm2host_rx_release;
+
+ if (ring_mask->reo_status[i] & BIT(j))
+ irq_grp->irqs[num_irq++] = reo2host_status;
+
+ if (ring_mask->rx_mon_dest[i] & BIT(j))
+ irq_grp->irqs[num_irq++] =
+ rxdma2host_monitor_destination_mac1;
+ }
+
+ irq_grp->num_irq = num_irq;
+
+ for (j = 0; j < irq_grp->num_irq; j++) {
+ irq_idx = irq_grp->irqs[j];
+
+ irq = platform_get_irq_byname(ab->pdev,
+ irq_name[irq_idx]);
+ ab->irq_num[irq_idx] = irq;
+ irq_set_status_flags(irq, IRQ_NOAUTOEN | IRQ_DISABLE_UNLAZY);
+ ret = devm_request_irq(ab->dev, irq,
+ ath12k_ahb_ext_interrupt_handler,
+ IRQF_TRIGGER_RISING,
+ irq_name[irq_idx], irq_grp);
+ if (ret) {
+ ath12k_err(ab, "failed request_irq for %d\n",
+ irq);
+ }
+ }
+ }
+
+ return 0;
+}
+
+static int ath12k_ahb_config_irq(struct ath12k_base *ab)
+{
+ int irq, irq_idx, i;
+ int ret;
+
+ /* Configure CE irqs */
+ for (i = 0; i < ab->hw_params->ce_count; i++) {
+ struct ath12k_ce_pipe *ce_pipe = &ab->ce.ce_pipe[i];
+
+ if (ath12k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
+ continue;
+
+ irq_idx = ATH12K_IRQ_CE0_OFFSET + i;
+
+ INIT_WORK(&ce_pipe->intr_wq, ath12k_ahb_ce_workqueue);
+ irq = platform_get_irq_byname(ab->pdev, irq_name[irq_idx]);
+ ret = devm_request_irq(ab->dev, irq, ath12k_ahb_ce_interrupt_handler,
+ IRQF_TRIGGER_RISING, irq_name[irq_idx],
+ ce_pipe);
+ if (ret)
+ return ret;
+
+ ab->irq_num[irq_idx] = irq;
+ }
+
+ /* Configure external interrupts */
+ ret = ath12k_ahb_config_ext_irq(ab);
+
+ return ret;
+}
+
+static int ath12k_ahb_map_service_to_pipe(struct ath12k_base *ab, u16 service_id,
+ u8 *ul_pipe, u8 *dl_pipe)
+{
+ const struct service_to_pipe *entry;
+ bool ul_set = false, dl_set = false;
+ u32 pipedir;
+ int i;
+
+ for (i = 0; i < ab->hw_params->svc_to_ce_map_len; i++) {
+ entry = &ab->hw_params->svc_to_ce_map[i];
+
+ if (__le32_to_cpu(entry->service_id) != service_id)
+ continue;
+
+ pipedir = __le32_to_cpu(entry->pipedir);
+ if (pipedir == PIPEDIR_IN || pipedir == PIPEDIR_INOUT) {
+ WARN_ON(dl_set);
+ *dl_pipe = __le32_to_cpu(entry->pipenum);
+ dl_set = true;
+ }
+
+ if (pipedir == PIPEDIR_OUT || pipedir == PIPEDIR_INOUT) {
+ WARN_ON(ul_set);
+ *ul_pipe = __le32_to_cpu(entry->pipenum);
+ ul_set = true;
+ }
+ }
+
+ if (WARN_ON(!ul_set || !dl_set))
+ return -ENOENT;
+
+ return 0;
+}
+
+static const struct ath12k_hif_ops ath12k_ahb_hif_ops_ipq5332 = {
+ .start = ath12k_ahb_start,
+ .stop = ath12k_ahb_stop,
+ .read32 = ath12k_ahb_read32,
+ .write32 = ath12k_ahb_write32,
+ .irq_enable = ath12k_ahb_ext_irq_enable,
+ .irq_disable = ath12k_ahb_ext_irq_disable,
+ .map_service_to_pipe = ath12k_ahb_map_service_to_pipe,
+};
+
+static int ath12k_ahb_clock_init(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+ int ret;
+
+ ab_ahb->xo_clk = devm_clk_get(ab->dev, "xo");
+ if (IS_ERR_OR_NULL(ab_ahb->xo_clk)) {
+ ath12k_err(ab, "failed to get xo clock: %d\n",
+ PTR_ERR_OR_ZERO(ab_ahb->xo_clk));
+ ret = ab_ahb->xo_clk ? PTR_ERR(ab_ahb->xo_clk) : -ENODEV;
+ ab_ahb->xo_clk = NULL;
+ return ret;
+ }
+
+ return 0;
+}
+
+static void ath12k_ahb_clock_deinit(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+
+ devm_clk_put(ab->dev, ab_ahb->xo_clk);
+ ab_ahb->xo_clk = NULL;
+}
+
+static int ath12k_ahb_clock_enable(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+ int ret;
+
+ if (IS_ERR_OR_NULL(ab_ahb->xo_clk)) {
+ ath12k_err(ab, "clock is not initialized\n");
+ return -EIO;
+ }
+
+ ret = clk_prepare_enable(ab_ahb->xo_clk);
+ if (ret) {
+ ath12k_err(ab, "failed to enable gcc_xo_clk: %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static void ath12k_ahb_clock_disable(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+
+ clk_disable_unprepare(ab_ahb->xo_clk);
+}
+
+static int ath12k_ahb_resource_init(struct ath12k_base *ab)
+{
+ struct platform_device *pdev = ab->pdev;
+ struct resource *mem_res;
+ int ret;
+
+ ab->mem = devm_platform_get_and_ioremap_resource(pdev, 0, &mem_res);
+ if (IS_ERR(ab->mem)) {
+ dev_err(&pdev->dev, "ioremap error\n");
+ ret = PTR_ERR(ab->mem);
+ goto out;
+ }
+
+ ab->mem_len = resource_size(mem_res);
+
+ if (ab->hw_params->ce_remap) {
+ const struct ce_remap *ce_remap = ab->hw_params->ce_remap;
+ /* CE register space is moved out of WCSS and the space is not
+ * contiguous, hence remapping the CE registers to a new space
+ * for accessing them.
+ */
+ ab->mem_ce = ioremap(ce_remap->base, ce_remap->size);
+ if (IS_ERR(ab->mem_ce)) {
+ dev_err(&pdev->dev, "ce ioremap error\n");
+ ret = -ENOMEM;
+ goto err_mem_unmap;
+ }
+ ab->ce_remap = true;
+ ab->ce_remap_base_addr = HAL_IPQ5332_CE_WFSS_REG_BASE;
+ }
+
+ ret = ath12k_ahb_clock_init(ab);
+ if (ret)
+ goto err_mem_ce_unmap;
+
+ ret = ath12k_ahb_clock_enable(ab);
+ if (ret)
+ goto err_clock_deinit;
+
+ return 0;
+
+err_clock_deinit:
+ ath12k_ahb_clock_deinit(ab);
+
+err_mem_ce_unmap:
+ if (ab->hw_params->ce_remap)
+ iounmap(ab->mem_ce);
+
+err_mem_unmap:
+ ab->mem_ce = NULL;
+ devm_iounmap(ab->dev, ab->mem);
+
+out:
+ ab->mem = NULL;
+ return ret;
+}
+
+static void ath12k_ahb_resource_deinit(struct ath12k_base *ab)
+{
+ if (ab->mem)
+ devm_iounmap(ab->dev, ab->mem);
+
+ if (ab->mem_ce)
+ iounmap(ab->mem_ce);
+
+ ab->mem = NULL;
+ ab->mem_ce = NULL;
+
+ ath12k_ahb_clock_disable(ab);
+ ath12k_ahb_clock_deinit(ab);
+}
+
+static enum ath12k_hw_rev ath12k_ahb_get_hw_rev(struct platform_device *pdev)
+{
+ const struct of_device_id *of_id;
+
+ of_id = of_match_device(ath12k_ahb_of_match, &pdev->dev);
+ if (!of_id) {
+ dev_err(&pdev->dev, "Failed to find matching device tree id\n");
+ return -EINVAL;
+ }
+
+ return (enum ath12k_hw_rev)of_id->data;
+}
+
+static int ath12k_ahb_probe(struct platform_device *pdev)
+{
+ struct ath12k_base *ab;
+ const struct ath12k_hif_ops *hif_ops;
+ struct device_node *mem_node;
+ enum ath12k_hw_rev hw_rev;
+ u32 addr;
+ int ret;
+
+ hw_rev = ath12k_ahb_get_hw_rev(pdev);
+ switch (hw_rev) {
+ case ATH12K_HW_IPQ5332_HW10:
+ hif_ops = &ath12k_ahb_hif_ops_ipq5332;
+ break;
+ default:
+ dev_err(&pdev->dev, "Unsupported device type %d\n", hw_rev);
+ return -EOPNOTSUPP;
+ }
+
+ ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to set 32-bit coherent dma\n");
+ return ret;
+ }
+
+ ab = ath12k_core_alloc(&pdev->dev, sizeof(struct ath12k_ahb),
+ ATH12K_BUS_AHB);
+ if (!ab) {
+ dev_err(&pdev->dev, "failed to allocate ath12k base\n");
+ return -ENOMEM;
+ }
+
+ ab->hif.ops = hif_ops;
+ ab->pdev = pdev;
+ ab->hw_rev = hw_rev;
+ platform_set_drvdata(pdev, ab);
+
+ /* Set fixed_mem_region to true for platforms that support fixed memory
+ * reservation from DT. If memory is reserved from DT for FW, ath12k driver
+ * need not to allocate memory.
+ */
+ if (!of_property_read_u32(ab->dev->of_node, "memory-region", &addr)) {
+ set_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags);
+
+ /* If the platform supports fixed memory, then it should define/
+ * reserve MLO global memory in DT to support Multi Link Operation
+ * (IEEE 802.11be).
+ * If MLO global memory is not reserved in fixed memory mode, then
+ * MLO cannot be supported.
+ */
+ mem_node = of_find_node_by_name(NULL, "mlo_global_mem_0");
+ if (!mem_node)
+ ab->single_chip_mlo_supp = false;
+ }
+
+ ret = ath12k_core_pre_init(ab);
+ if (ret)
+ goto err_core_free;
+
+ ret = ath12k_ahb_resource_init(ab);
+ if (ret)
+ goto err_core_free;
+
+ ret = ath12k_hal_srng_init(ab);
+ if (ret)
+ goto err_resource_deinit;
+
+ ret = ath12k_ce_alloc_pipes(ab);
+ if (ret) {
+ ath12k_err(ab, "failed to allocate ce pipes: %d\n", ret);
+ goto err_hal_srng_deinit;
+ }
+
+ ath12k_ahb_init_qmi_ce_config(ab);
+
+ ret = ath12k_ahb_config_irq(ab);
+ if (ret) {
+ ath12k_err(ab, "failed to configure irq: %d\n", ret);
+ goto err_ce_free;
+ }
+
+ ret = ath12k_core_init(ab);
+ if (ret) {
+ ath12k_err(ab, "failed to init core: %d\n", ret);
+ goto err_ce_free;
+ }
+
+ return 0;
+
+err_ce_free:
+ ath12k_ce_free_pipes(ab);
+
+err_hal_srng_deinit:
+ ath12k_hal_srng_deinit(ab);
+
+err_resource_deinit:
+ ath12k_ahb_resource_deinit(ab);
+
+err_core_free:
+ ath12k_core_free(ab);
+ platform_set_drvdata(pdev, NULL);
+
+ return ret;
+}
+
+static void ath12k_ahb_remove_prepare(struct ath12k_base *ab)
+{
+ unsigned long left;
+
+ if (test_bit(ATH12K_FLAG_RECOVERY, &ab->dev_flags)) {
+ left = wait_for_completion_timeout(&ab->driver_recovery,
+ ATH12K_AHB_RECOVERY_TIMEOUT);
+ if (!left)
+ ath12k_warn(ab, "failed to receive recovery response completion\n");
+ }
+
+ set_bit(ATH12K_FLAG_UNREGISTERING, &ab->dev_flags);
+ cancel_work_sync(&ab->restart_work);
+ cancel_work_sync(&ab->qmi.event_work);
+}
+
+static void ath12k_ahb_free_resources(struct ath12k_base *ab)
+{
+ struct platform_device *pdev = ab->pdev;
+
+ ath12k_hal_srng_deinit(ab);
+ ath12k_ce_free_pipes(ab);
+ ath12k_ahb_resource_deinit(ab);
+ ath12k_core_free(ab);
+ platform_set_drvdata(pdev, NULL);
+}
+
+static void ath12k_ahb_remove(struct platform_device *pdev)
+{
+ struct ath12k_base *ab = platform_get_drvdata(pdev);
+
+ if (test_bit(ATH12K_FLAG_QMI_FAIL, &ab->dev_flags)) {
+ ath12k_qmi_deinit_service(ab);
+ goto qmi_fail;
+ }
+
+ ath12k_ahb_remove_prepare(ab);
+ ath12k_core_deinit(ab);
+
+qmi_fail:
+ ath12k_ahb_free_resources(ab);
+}
+
+static void ath12k_ahb_shutdown(struct platform_device *pdev)
+{
+ struct ath12k_base *ab = platform_get_drvdata(pdev);
+
+ /* platform shutdown() & remove() are mutually exclusive.
+ * remove() is invoked during rmmod & shutdown() during
+ * system reboot/shutdown.
+ */
+ ath12k_ahb_remove_prepare(ab);
+
+ if (!(test_bit(ATH12K_FLAG_REGISTERED, &ab->dev_flags)))
+ goto free_resources;
+
+ ath12k_core_deinit(ab);
+
+free_resources:
+ ath12k_ahb_free_resources(ab);
+}
+
+static struct platform_driver ath12k_ahb_driver = {
+ .driver = {
+ .name = "ath12k_ahb",
+ .of_match_table = ath12k_ahb_of_match,
+ },
+ .probe = ath12k_ahb_probe,
+ .remove = ath12k_ahb_remove,
+ .shutdown = ath12k_ahb_shutdown,
+};
+
+int ath12k_ahb_init(void)
+{
+ return platform_driver_register(&ath12k_ahb_driver);
+}
+
+void ath12k_ahb_exit(void)
+{
+ platform_driver_unregister(&ath12k_ahb_driver);
+}
diff --git a/drivers/net/wireless/ath/ath12k/ahb.h b/drivers/net/wireless/ath/ath12k/ahb.h
new file mode 100644
index 000000000000..bd0366a79587
--- /dev/null
+++ b/drivers/net/wireless/ath/ath12k/ahb.h
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: BSD-3-Clause-Clear */
+/*
+ * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022-2024, Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+#ifndef ATH12K_AHB_H
+#define ATH12K_AHB_H
+
+#include <linux/clk.h>
+#include "core.h"
+
+#define ATH12K_AHB_RECOVERY_TIMEOUT (3 * HZ)
+
+#define ATH12K_AHB_SMP2P_SMEM_MSG GENMASK(15, 0)
+#define ATH12K_AHB_SMP2P_SMEM_SEQ_NO GENMASK(31, 16)
+#define ATH12K_AHB_SMP2P_SMEM_VALUE_MASK 0xFFFFFFFF
+#define ATH12K_PCI_CE_WAKE_IRQ 2
+#define ATH12K_PCI_IRQ_CE0_OFFSET 3
+
+enum ath12k_ahb_smp2p_msg_id {
+ ATH12K_AHB_POWER_SAVE_ENTER = 1,
+ ATH12K_AHB_POWER_SAVE_EXIT,
+};
+
+struct ath12k_base;
+
+struct ath12k_ahb {
+ struct rproc *tgt_rproc;
+ struct clk *xo_clk;
+};
+
+static inline struct ath12k_ahb *ath12k_ab_to_ahb(struct ath12k_base *ab)
+{
+ return (struct ath12k_ahb *)ab->drv_priv;
+}
+
+#endif
diff --git a/drivers/net/wireless/ath/ath12k/core.h b/drivers/net/wireless/ath/ath12k/core.h
index 5e49fd6c8bc9..8b9413b42705 100644
--- a/drivers/net/wireless/ath/ath12k/core.h
+++ b/drivers/net/wireless/ath/ath12k/core.h
@@ -160,6 +160,7 @@ enum ath12k_firmware_mode {
#define ATH12K_IRQ_NUM_MAX 57
#define ATH12K_EXT_IRQ_NUM_MAX 16
+#define ATH12K_MAX_TCL_RING_NUM 3
struct ath12k_ext_irq_grp {
struct ath12k_base *ab;
@@ -167,6 +168,7 @@ struct ath12k_ext_irq_grp {
u32 num_irq;
u32 grp_id;
u64 timestamp;
+ bool napi_enabled;
struct napi_struct napi;
struct net_device *napi_ndev;
};
@@ -1143,6 +1145,8 @@ static inline const char *ath12k_bus_str(enum ath12k_bus bus)
switch (bus) {
case ATH12K_BUS_PCI:
return "pci";
+ case ATH12K_BUS_AHB:
+ return "ahb";
}
return "unknown";
diff --git a/drivers/net/wireless/ath/ath12k/hal.h b/drivers/net/wireless/ath/ath12k/hal.h
index 70dbd460dae3..609b10a17400 100644
--- a/drivers/net/wireless/ath/ath12k/hal.h
+++ b/drivers/net/wireless/ath/ath12k/hal.h
@@ -42,6 +42,7 @@ struct ath12k_base;
#define HAL_SHADOW_REG(x) (HAL_SHADOW_BASE_ADDR + (4 * (x)))
/* WCSS Relative address */
+#define HAL_SEQ_WCSS_CMEM_OFFSET 0x00100000
#define HAL_SEQ_WCSS_UMAC_OFFSET 0x00a00000
#define HAL_SEQ_WCSS_UMAC_REO_REG 0x00a38000
#define HAL_SEQ_WCSS_UMAC_TCL_REG 0x00a44000
diff --git a/drivers/net/wireless/ath/ath12k/hw.h b/drivers/net/wireless/ath/ath12k/hw.h
index 524fab05768f..43d6006b0fd3 100644
--- a/drivers/net/wireless/ath/ath12k/hw.h
+++ b/drivers/net/wireless/ath/ath12k/hw.h
@@ -121,6 +121,7 @@ enum ath12k_hw_rate_ofdm {
enum ath12k_bus {
ATH12K_BUS_PCI,
+ ATH12K_BUS_AHB,
};
#define ATH12K_EXT_IRQ_GRP_NUM_MAX 11
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v4 09/13] wifi: ath12k: Power up root PD
2024-12-10 7:41 [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (7 preceding siblings ...)
2024-12-10 7:41 ` [PATCH v4 08/13] wifi: ath12k: add AHB driver support for IPQ5332 Raj Kumar Bhagat
@ 2024-12-10 7:41 ` Raj Kumar Bhagat
2024-12-10 14:50 ` Krzysztof Kozlowski
2024-12-10 7:41 ` [PATCH v4 10/13] wifi: ath12k: Register various userPD interrupts and save SMEM entries Raj Kumar Bhagat
` (4 subsequent siblings)
13 siblings, 1 reply; 27+ messages in thread
From: Raj Kumar Bhagat @ 2024-12-10 7:41 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree,
Sowmiya Sree Elavalagan, Raj Kumar Bhagat
From: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
Q6 processor acts as rootPD, other hardware like IPQ5332 which are
attached to Q6 act as userPDs. WCSS driver handles loading and booting
of rootPD, while the ath12k driver boots the userPD.
Get the rproc handle from the DTS entry and boot the rootPD if it
is not already powered on. Register to the rproc notifier to monitor
the rproc state, this allows ath12k driver to know power up/down
sequence of the rootPD. Power up the rootPD and wait for a power-up
notification from the notifier callback before powering up the userPDs.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Signed-off-by: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/ahb.c | 128 ++++++++++++++++++++++++++
drivers/net/wireless/ath/ath12k/ahb.h | 7 ++
2 files changed, 135 insertions(+)
diff --git a/drivers/net/wireless/ath/ath12k/ahb.c b/drivers/net/wireless/ath/ath12k/ahb.c
index fcd949faea9f..82bfd675b45b 100644
--- a/drivers/net/wireless/ath/ath12k/ahb.c
+++ b/drivers/net/wireless/ath/ath12k/ahb.c
@@ -554,6 +554,124 @@ static const struct ath12k_hif_ops ath12k_ahb_hif_ops_ipq5332 = {
.map_service_to_pipe = ath12k_ahb_map_service_to_pipe,
};
+static int ath12k_ahb_root_pd_state_notifier(struct notifier_block *nb,
+ const unsigned long event, void *data)
+{
+ struct ath12k_ahb *ab_ahb = container_of(nb, struct ath12k_ahb, root_pd_nb);
+ struct ath12k_base *ab = ab_ahb->ab;
+
+ if (event == ATH12K_RPROC_AFTER_POWERUP) {
+ ath12k_dbg(ab, ATH12K_DBG_AHB, "Root PD is UP\n");
+ complete(&ab_ahb->rootpd_ready);
+ }
+
+ return 0;
+}
+
+static int ath12k_ahb_register_rproc_notifier(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+
+ ab_ahb->root_pd_nb.notifier_call = ath12k_ahb_root_pd_state_notifier;
+ init_completion(&ab_ahb->rootpd_ready);
+
+ ab_ahb->root_pd_notifier = qcom_register_ssr_notifier(ab_ahb->tgt_rproc->name,
+ &ab_ahb->root_pd_nb);
+
+ if (!ab_ahb->root_pd_notifier)
+ return -EINVAL;
+
+ return 0;
+}
+
+static void ath12k_ahb_unregister_rproc_notifier(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+
+ if (!ab_ahb->root_pd_notifier) {
+ ath12k_err(ab, "Rproc notifier not registered\n");
+ return;
+ }
+
+ qcom_unregister_ssr_notifier(ab_ahb->root_pd_notifier,
+ &ab_ahb->root_pd_nb);
+}
+
+static int ath12k_ahb_get_rproc(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+ struct device *dev = ab->dev;
+ struct rproc *prproc;
+ phandle rproc_phandle;
+
+ if (of_property_read_u32(dev->of_node, "qcom,rproc", &rproc_phandle)) {
+ ath12k_err(ab, "failed to get q6_rproc handle\n");
+ return -ENOENT;
+ }
+
+ prproc = rproc_get_by_phandle(rproc_phandle);
+ if (!prproc) {
+ ath12k_err(ab, "failed to get rproc\n");
+ return -EINVAL;
+ }
+ ab_ahb->tgt_rproc = prproc;
+
+ return 0;
+}
+
+static int ath12k_ahb_boot_root_pd(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+ unsigned long time_left;
+ int ret;
+
+ ret = rproc_boot(ab_ahb->tgt_rproc);
+ if (ret < 0) {
+ ath12k_err(ab, "RootPD boot failed\n");
+ return ret;
+ }
+
+ time_left = wait_for_completion_timeout(&ab_ahb->rootpd_ready,
+ ATH12K_ROOTPD_READY_TIMEOUT);
+ if (!time_left) {
+ ath12k_err(ab, "RootPD ready wait timed out\n");
+ return -ETIMEDOUT;
+ }
+
+ return 0;
+}
+
+static int ath12k_ahb_configure_rproc(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+ int ret;
+
+ ret = ath12k_ahb_get_rproc(ab);
+ if (ret < 0) {
+ ath12k_err(ab, "failed to get rproc: %d\n", ret);
+ return ret;
+ }
+
+ ret = ath12k_ahb_register_rproc_notifier(ab);
+ if (ret < 0) {
+ ath12k_err(ab, "failed to register rproc notifier\n");
+ return ret;
+ }
+
+ if (ab_ahb->tgt_rproc->state != RPROC_RUNNING) {
+ ret = ath12k_ahb_boot_root_pd(ab);
+ if (ret < 0) {
+ ath12k_err(ab, "failed to boot the remote processor Q6\n");
+ goto unreg_notifier;
+ }
+ }
+ return 0;
+
+unreg_notifier:
+ ath12k_ahb_unregister_rproc_notifier(ab);
+ return ret;
+}
+
static int ath12k_ahb_clock_init(struct ath12k_base *ab)
{
struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
@@ -695,6 +813,7 @@ static int ath12k_ahb_probe(struct platform_device *pdev)
struct ath12k_base *ab;
const struct ath12k_hif_ops *hif_ops;
struct device_node *mem_node;
+ struct ath12k_ahb *ab_ahb;
enum ath12k_hw_rev hw_rev;
u32 addr;
int ret;
@@ -726,6 +845,8 @@ static int ath12k_ahb_probe(struct platform_device *pdev)
ab->pdev = pdev;
ab->hw_rev = hw_rev;
platform_set_drvdata(pdev, ab);
+ ab_ahb = ath12k_ab_to_ahb(ab);
+ ab_ahb->ab = ab;
/* Set fixed_mem_region to true for platforms that support fixed memory
* reservation from DT. If memory is reserved from DT for FW, ath12k driver
@@ -765,6 +886,12 @@ static int ath12k_ahb_probe(struct platform_device *pdev)
ath12k_ahb_init_qmi_ce_config(ab);
+ ret = ath12k_ahb_configure_rproc(ab);
+ if (ret) {
+ ath12k_err(ab, "failed to configure rproc: %d\n", ret);
+ goto err_ce_free;
+ }
+
ret = ath12k_ahb_config_irq(ab);
if (ret) {
ath12k_err(ab, "failed to configure irq: %d\n", ret);
@@ -809,6 +936,7 @@ static void ath12k_ahb_remove_prepare(struct ath12k_base *ab)
set_bit(ATH12K_FLAG_UNREGISTERING, &ab->dev_flags);
cancel_work_sync(&ab->restart_work);
cancel_work_sync(&ab->qmi.event_work);
+ ath12k_ahb_unregister_rproc_notifier(ab);
}
static void ath12k_ahb_free_resources(struct ath12k_base *ab)
diff --git a/drivers/net/wireless/ath/ath12k/ahb.h b/drivers/net/wireless/ath/ath12k/ahb.h
index bd0366a79587..d1fc63091fb0 100644
--- a/drivers/net/wireless/ath/ath12k/ahb.h
+++ b/drivers/net/wireless/ath/ath12k/ahb.h
@@ -7,6 +7,7 @@
#define ATH12K_AHB_H
#include <linux/clk.h>
+#include <linux/remoteproc/qcom_rproc.h>
#include "core.h"
#define ATH12K_AHB_RECOVERY_TIMEOUT (3 * HZ)
@@ -16,6 +17,8 @@
#define ATH12K_AHB_SMP2P_SMEM_VALUE_MASK 0xFFFFFFFF
#define ATH12K_PCI_CE_WAKE_IRQ 2
#define ATH12K_PCI_IRQ_CE0_OFFSET 3
+#define ATH12K_ROOTPD_READY_TIMEOUT (5 * HZ)
+#define ATH12K_RPROC_AFTER_POWERUP QCOM_SSR_AFTER_POWERUP
enum ath12k_ahb_smp2p_msg_id {
ATH12K_AHB_POWER_SAVE_ENTER = 1,
@@ -25,8 +28,12 @@ enum ath12k_ahb_smp2p_msg_id {
struct ath12k_base;
struct ath12k_ahb {
+ struct ath12k_base *ab;
struct rproc *tgt_rproc;
struct clk *xo_clk;
+ struct completion rootpd_ready;
+ struct notifier_block root_pd_nb;
+ void *root_pd_notifier;
};
static inline struct ath12k_ahb *ath12k_ab_to_ahb(struct ath12k_base *ab)
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v4 10/13] wifi: ath12k: Register various userPD interrupts and save SMEM entries
2024-12-10 7:41 [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (8 preceding siblings ...)
2024-12-10 7:41 ` [PATCH v4 09/13] wifi: ath12k: Power up root PD Raj Kumar Bhagat
@ 2024-12-10 7:41 ` Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 11/13] wifi: ath12k: Power up userPD Raj Kumar Bhagat
` (3 subsequent siblings)
13 siblings, 0 replies; 27+ messages in thread
From: Raj Kumar Bhagat @ 2024-12-10 7:41 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree,
Sowmiya Sree Elavalagan, Raj Kumar Bhagat
From: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
Q6 and ath12k driver communicates using SMEM and IRQs. Spawn interrupt
is triggered once the userPD thread is spawned. Ready interrupts denotes
userPD is completely powered up and ready. Stop-ack is to acknowledge
the ath12k driver that userPD is stopped. Ath12k driver needs to set spawn
bit in SMEM to instruct Q6 to spawn a userPD. Similarly stop bit is
set when userPD needs to be stopped.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Signed-off-by: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/ahb.c | 84 ++++++++++++++++++++++++++-
drivers/net/wireless/ath/ath12k/ahb.h | 16 +++++
drivers/net/wireless/ath/ath12k/hw.h | 1 +
3 files changed, 99 insertions(+), 2 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/ahb.c b/drivers/net/wireless/ath/ath12k/ahb.c
index 82bfd675b45b..c944915ad08a 100644
--- a/drivers/net/wireless/ath/ath12k/ahb.c
+++ b/drivers/net/wireless/ath/ath12k/ahb.c
@@ -28,6 +28,11 @@ static const struct of_device_id ath12k_ahb_of_match[] = {
MODULE_DEVICE_TABLE(of, ath12k_ahb_of_match);
#define ATH12K_IRQ_CE0_OFFSET 4
+#define ATH12K_MAX_UPDS 1
+#define ATH12K_UPD_IRQ_WRD_LEN 18
+static const char ath12k_userpd_irq[][9] = {"spawn",
+ "ready",
+ "stop-ack"};
static const char *irq_name[ATH12K_IRQ_NUM_MAX] = {
"misc-pulse1",
@@ -554,6 +559,78 @@ static const struct ath12k_hif_ops ath12k_ahb_hif_ops_ipq5332 = {
.map_service_to_pipe = ath12k_ahb_map_service_to_pipe,
};
+static irqreturn_t ath12k_userpd_irq_handler(int irq, void *data)
+{
+ struct ath12k_base *ab = data;
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+
+ if (irq == ab_ahb->userpd_irq_num[ATH12K_USERPD_SPAWN_IRQ]) {
+ complete(&ab_ahb->userpd_spawned);
+ } else if (irq == ab_ahb->userpd_irq_num[ATH12K_USERPD_READY_IRQ]) {
+ complete(&ab_ahb->userpd_ready);
+ } else if (irq == ab_ahb->userpd_irq_num[ATH12K_USERPD_STOP_ACK_IRQ]) {
+ complete(&ab_ahb->userpd_stopped);
+ } else {
+ ath12k_err(ab, "Invalid userpd interrupt\n");
+ return IRQ_NONE;
+ }
+
+ return IRQ_HANDLED;
+}
+
+static int ath12k_ahb_config_rproc_irq(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+ int i, ret;
+ char *upd_irq_name;
+
+ for (i = 0; i < ATH12K_USERPD_MAX_IRQ; i++) {
+ ab_ahb->userpd_irq_num[i] = platform_get_irq_byname(ab->pdev,
+ ath12k_userpd_irq[i]);
+ if (ab_ahb->userpd_irq_num[i] < 0) {
+ ath12k_err(ab, "Failed to get %s irq: %d", ath12k_userpd_irq[i],
+ ab_ahb->userpd_irq_num[i]);
+ return -EINVAL;
+ }
+
+ upd_irq_name = devm_kzalloc(&ab->pdev->dev, ATH12K_UPD_IRQ_WRD_LEN,
+ GFP_KERNEL);
+ if (!upd_irq_name)
+ return -ENOMEM;
+
+ scnprintf(upd_irq_name, ATH12K_UPD_IRQ_WRD_LEN, "UserPD%u-%s",
+ ab_ahb->userpd_id, ath12k_userpd_irq[i]);
+ ret = devm_request_threaded_irq(&ab->pdev->dev, ab_ahb->userpd_irq_num[i],
+ NULL, ath12k_userpd_irq_handler,
+ IRQF_TRIGGER_RISING | IRQF_ONESHOT,
+ upd_irq_name, ab);
+ if (ret) {
+ ath12k_err(ab, "Request %s irq failed: %d\n",
+ ath12k_userpd_irq[i], ret);
+ return ret;
+ }
+ }
+
+ ab_ahb->spawn_state = devm_qcom_smem_state_get(&ab->pdev->dev, "spawn",
+ &ab_ahb->spawn_bit);
+ if (IS_ERR(ab_ahb->spawn_state)) {
+ ath12k_err(ab, "Failed to acquire spawn state\n");
+ return PTR_ERR(ab_ahb->spawn_state);
+ }
+
+ ab_ahb->stop_state = devm_qcom_smem_state_get(&ab->pdev->dev, "stop",
+ &ab_ahb->stop_bit);
+ if (IS_ERR(ab_ahb->stop_state)) {
+ ath12k_err(ab, "Failed to acquire stop state\n");
+ return PTR_ERR(ab_ahb->stop_state);
+ }
+
+ init_completion(&ab_ahb->userpd_spawned);
+ init_completion(&ab_ahb->userpd_ready);
+ init_completion(&ab_ahb->userpd_stopped);
+ return 0;
+}
+
static int ath12k_ahb_root_pd_state_notifier(struct notifier_block *nb,
const unsigned long event, void *data)
{
@@ -665,7 +742,8 @@ static int ath12k_ahb_configure_rproc(struct ath12k_base *ab)
goto unreg_notifier;
}
}
- return 0;
+
+ return ath12k_ahb_config_rproc_irq(ab);
unreg_notifier:
ath12k_ahb_unregister_rproc_notifier(ab);
@@ -815,13 +893,14 @@ static int ath12k_ahb_probe(struct platform_device *pdev)
struct device_node *mem_node;
struct ath12k_ahb *ab_ahb;
enum ath12k_hw_rev hw_rev;
- u32 addr;
+ u32 addr, userpd_id;
int ret;
hw_rev = ath12k_ahb_get_hw_rev(pdev);
switch (hw_rev) {
case ATH12K_HW_IPQ5332_HW10:
hif_ops = &ath12k_ahb_hif_ops_ipq5332;
+ userpd_id = ATH12K_IPQ5332_USERPD_ID;
break;
default:
dev_err(&pdev->dev, "Unsupported device type %d\n", hw_rev);
@@ -847,6 +926,7 @@ static int ath12k_ahb_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, ab);
ab_ahb = ath12k_ab_to_ahb(ab);
ab_ahb->ab = ab;
+ ab_ahb->userpd_id = userpd_id;
/* Set fixed_mem_region to true for platforms that support fixed memory
* reservation from DT. If memory is reserved from DT for FW, ath12k driver
diff --git a/drivers/net/wireless/ath/ath12k/ahb.h b/drivers/net/wireless/ath/ath12k/ahb.h
index d1fc63091fb0..0999e2bbe970 100644
--- a/drivers/net/wireless/ath/ath12k/ahb.h
+++ b/drivers/net/wireless/ath/ath12k/ahb.h
@@ -25,6 +25,13 @@ enum ath12k_ahb_smp2p_msg_id {
ATH12K_AHB_POWER_SAVE_EXIT,
};
+enum ath12k_ahb_userpd_irq {
+ ATH12K_USERPD_SPAWN_IRQ,
+ ATH12K_USERPD_READY_IRQ,
+ ATH12K_USERPD_STOP_ACK_IRQ,
+ ATH12K_USERPD_MAX_IRQ,
+};
+
struct ath12k_base;
struct ath12k_ahb {
@@ -34,6 +41,15 @@ struct ath12k_ahb {
struct completion rootpd_ready;
struct notifier_block root_pd_nb;
void *root_pd_notifier;
+ struct qcom_smem_state *spawn_state;
+ struct qcom_smem_state *stop_state;
+ struct completion userpd_spawned;
+ struct completion userpd_ready;
+ struct completion userpd_stopped;
+ u32 userpd_id;
+ u32 spawn_bit;
+ u32 stop_bit;
+ int userpd_irq_num[ATH12K_USERPD_MAX_IRQ];
};
static inline struct ath12k_ahb *ath12k_ab_to_ahb(struct ath12k_base *ab)
diff --git a/drivers/net/wireless/ath/ath12k/hw.h b/drivers/net/wireless/ath/ath12k/hw.h
index 43d6006b0fd3..209672ca83fb 100644
--- a/drivers/net/wireless/ath/ath12k/hw.h
+++ b/drivers/net/wireless/ath/ath12k/hw.h
@@ -97,6 +97,7 @@
#define ATH12K_REGDB_FILE_NAME "regdb.bin"
#define ATH12K_PCIE_MAX_PAYLOAD_SIZE 128
+#define ATH12K_IPQ5332_USERPD_ID 1
enum ath12k_hw_rate_cck {
ATH12K_HW_RATE_CCK_LP_11M = 0,
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v4 11/13] wifi: ath12k: Power up userPD
2024-12-10 7:41 [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (9 preceding siblings ...)
2024-12-10 7:41 ` [PATCH v4 10/13] wifi: ath12k: Register various userPD interrupts and save SMEM entries Raj Kumar Bhagat
@ 2024-12-10 7:41 ` Raj Kumar Bhagat
2024-12-10 14:52 ` Krzysztof Kozlowski
2024-12-10 7:41 ` [PATCH v4 12/13] wifi: ath12k: Power down userPD Raj Kumar Bhagat
` (2 subsequent siblings)
13 siblings, 1 reply; 27+ messages in thread
From: Raj Kumar Bhagat @ 2024-12-10 7:41 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree,
Sowmiya Sree Elavalagan, Raj Kumar Bhagat
From: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
UserPD firmware image is loaded and booted by ath12k driver. Get the userPD
memory region from DTS and load the firmware for userPD from pre-defined
path into io-remapped address of this region. Authenticate this image
using pasid which is a peripheral ID. Set the spawn bit to instruct Q6
to spawn userPD thread. Wait for userPD to spawn which is indicated by
spawn interrupt. Ready interrupt is triggered once the userPD is powered
up completely.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Signed-off-by: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/ahb.c | 138 ++++++++++++++++++++++++++
drivers/net/wireless/ath/ath12k/ahb.h | 10 +-
2 files changed, 147 insertions(+), 1 deletion(-)
diff --git a/drivers/net/wireless/ath/ath12k/ahb.c b/drivers/net/wireless/ath/ath12k/ahb.c
index c944915ad08a..74d10af6591f 100644
--- a/drivers/net/wireless/ath/ath12k/ahb.c
+++ b/drivers/net/wireless/ath/ath12k/ahb.c
@@ -5,13 +5,17 @@
*/
#include <linux/dma-mapping.h>
+#include <linux/firmware.h>
+#include <linux/firmware/qcom/qcom_scm.h>
#include <linux/iommu.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_device.h>
+#include <linux/of_reserved_mem.h>
#include <linux/platform_device.h>
#include <linux/remoteproc.h>
+#include <linux/soc/qcom/mdt_loader.h>
#include <linux/soc/qcom/smem.h>
#include <linux/soc/qcom/smem_state.h>
#include "ahb.h"
@@ -340,6 +344,139 @@ static void ath12k_ahb_stop(struct ath12k_base *ab)
ath12k_ce_cleanup_pipes(ab);
}
+static int ath12k_ahb_power_up(struct ath12k_base *ab)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+ u32 pasid;
+ char fw_name[ATH12K_USERPD_FW_NAME_LEN];
+ char fw2_name[ATH12K_USERPD_FW_NAME_LEN];
+ struct device *dev = ab->dev;
+ const struct firmware *fw, *fw2;
+ struct device_node *fw_mem_node;
+ struct reserved_mem *rmem = NULL;
+ unsigned long time_left;
+ phys_addr_t mem_phys;
+ void *mem_region;
+ size_t mem_size;
+ int ret;
+
+ fw_mem_node = of_parse_phandle(dev->of_node, "memory-region", 0);
+ if (fw_mem_node)
+ rmem = of_reserved_mem_lookup(fw_mem_node);
+
+ of_node_put(fw_mem_node);
+
+ if (!rmem) {
+ ath12k_err(ab, "Failed to acquire Q6 memory-region\n");
+ return -EINVAL;
+ }
+
+ mem_phys = rmem->base;
+ mem_size = rmem->size;
+ mem_region = (void *)devm_ioremap_wc(dev, mem_phys, mem_size);
+ if (!mem_region) {
+ ath12k_err(ab, "unable to map memory region: %pa+%pa\n",
+ &rmem->base, &rmem->size);
+ return -ENOMEM;
+ }
+
+ snprintf(fw_name, sizeof(fw_name), "%s/%s/%s%d%s", ATH12K_FW_DIR,
+ ab->hw_params->fw.dir, ATH12K_AHB_FW_PREFIX, ab_ahb->userpd_id,
+ ATH12K_AHB_FW_SUFFIX);
+
+ ret = request_firmware(&fw, fw_name, dev);
+ if (ret < 0) {
+ ath12k_err(ab, "request_firmware failed\n");
+ return ret;
+ }
+
+ ath12k_dbg(ab, ATH12K_DBG_AHB, "Booting fw image %s, size %zd\n", fw_name,
+ fw->size);
+
+ if (!fw->size) {
+ ath12k_err(ab, "Invalid firmware size\n");
+ ret = -EINVAL;
+ goto err_fw;
+ }
+
+ pasid = (u32_encode_bits(ab_ahb->userpd_id, ATH12K_USERPD_ID_MASK)) |
+ ATH12K_AHB_UPD_SWID;
+
+ /* Load FW image to a reserved memory location */
+ ret = qcom_mdt_load(dev, fw, fw_name, pasid, mem_region, mem_phys, mem_size,
+ &mem_phys);
+ if (ret) {
+ ath12k_err(ab, "Failed to load MDT segments: %d\n", ret);
+ goto err_fw;
+ }
+
+ snprintf(fw2_name, sizeof(fw2_name), "%s/%s/%s", ATH12K_FW_DIR,
+ ab->hw_params->fw.dir, ATH12K_AHB_FW2);
+
+ ret = request_firmware(&fw2, fw2_name, dev);
+ if (ret < 0) {
+ ath12k_err(ab, "request_firmware failed\n");
+ goto err_fw;
+ }
+
+ ath12k_dbg(ab, ATH12K_DBG_AHB, "Booting fw image %s, size %zd\n", fw2_name,
+ fw2->size);
+
+ if (!fw2->size) {
+ ath12k_err(ab, "Invalid firmware size\n");
+ ret = -EINVAL;
+ goto err_fw2;
+ }
+
+ ret = qcom_mdt_load_no_init(dev, fw2, fw2_name, pasid, mem_region, mem_phys,
+ mem_size, &mem_phys);
+ if (ret) {
+ ath12k_err(ab, "Failed to load MDT segments: %d\n", ret);
+ goto err_fw2;
+ }
+
+ /* Authenticate FW image using peripheral ID */
+ ret = qcom_scm_pas_auth_and_reset(pasid);
+ if (ret) {
+ ath12k_err(ab, "failed to boot the remote processor %d\n", ret);
+ goto err_fw2;
+ }
+
+ /* Instruct Q6 to spawn userPD thread */
+ ret = qcom_smem_state_update_bits(ab_ahb->spawn_state, BIT(ab_ahb->spawn_bit),
+ BIT(ab_ahb->spawn_bit));
+ if (ret) {
+ ath12k_err(ab, "Failed to update spawn state %d\n", ret);
+ goto err_fw2;
+ }
+
+ time_left = wait_for_completion_timeout(&ab_ahb->userpd_spawned,
+ ATH12K_USERPD_SPAWN_TIMEOUT);
+ if (!time_left) {
+ ath12k_err(ab, "UserPD spawn wait timed out\n");
+ ret = -ETIMEDOUT;
+ goto err_fw2;
+ }
+
+ time_left = wait_for_completion_timeout(&ab_ahb->userpd_ready,
+ ATH12K_USERPD_READY_TIMEOUT);
+ if (!time_left) {
+ ath12k_err(ab, "UserPD ready wait timed out\n");
+ ret = -ETIMEDOUT;
+ goto err_fw2;
+ }
+
+ qcom_smem_state_update_bits(ab_ahb->spawn_state, BIT(ab_ahb->spawn_bit), 0);
+
+ ath12k_info(ab, "UserPD%d is now UP\n", ab_ahb->userpd_id);
+
+err_fw2:
+ release_firmware(fw2);
+err_fw:
+ release_firmware(fw);
+ return ret;
+}
+
static void ath12k_ahb_init_qmi_ce_config(struct ath12k_base *ab)
{
struct ath12k_qmi_ce_cfg *cfg = &ab->qmi.ce_cfg;
@@ -557,6 +694,7 @@ static const struct ath12k_hif_ops ath12k_ahb_hif_ops_ipq5332 = {
.irq_enable = ath12k_ahb_ext_irq_enable,
.irq_disable = ath12k_ahb_ext_irq_disable,
.map_service_to_pipe = ath12k_ahb_map_service_to_pipe,
+ .power_up = ath12k_ahb_power_up,
};
static irqreturn_t ath12k_userpd_irq_handler(int irq, void *data)
diff --git a/drivers/net/wireless/ath/ath12k/ahb.h b/drivers/net/wireless/ath/ath12k/ahb.h
index 0999e2bbe970..0dbbbfd45eab 100644
--- a/drivers/net/wireless/ath/ath12k/ahb.h
+++ b/drivers/net/wireless/ath/ath12k/ahb.h
@@ -19,7 +19,15 @@
#define ATH12K_PCI_IRQ_CE0_OFFSET 3
#define ATH12K_ROOTPD_READY_TIMEOUT (5 * HZ)
#define ATH12K_RPROC_AFTER_POWERUP QCOM_SSR_AFTER_POWERUP
-
+#define ATH12K_AHB_FW_PREFIX "q6_fw"
+#define ATH12K_AHB_FW_SUFFIX ".mdt"
+#define ATH12K_AHB_FW2 "iu_fw.mdt"
+#define ATH12K_AHB_UPD_SWID 0x12
+#define ATH12K_USERPD_SPAWN_TIMEOUT (5 * HZ)
+#define ATH12K_USERPD_READY_TIMEOUT (10 * HZ)
+#define ATH12K_USERPD_STOP_TIMEOUT (5 * HZ)
+#define ATH12K_USERPD_ID_MASK GENMASK(9, 8)
+#define ATH12K_USERPD_FW_NAME_LEN 35
enum ath12k_ahb_smp2p_msg_id {
ATH12K_AHB_POWER_SAVE_ENTER = 1,
ATH12K_AHB_POWER_SAVE_EXIT,
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v4 12/13] wifi: ath12k: Power down userPD
2024-12-10 7:41 [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (10 preceding siblings ...)
2024-12-10 7:41 ` [PATCH v4 11/13] wifi: ath12k: Power up userPD Raj Kumar Bhagat
@ 2024-12-10 7:41 ` Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 13/13] wifi: ath12k: enable ath12k AHB support Raj Kumar Bhagat
2024-12-10 15:08 ` [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Krzysztof Kozlowski
13 siblings, 0 replies; 27+ messages in thread
From: Raj Kumar Bhagat @ 2024-12-10 7:41 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree,
Sowmiya Sree Elavalagan, Raj Kumar Bhagat
From: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
Set the stop bit in SMEM to power down the userPD. Wait for stop-ack IRQ
to indicate power down completion. Release the userPD firmware using its
peripheral ID.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Signed-off-by: Sowmiya Sree Elavalagan <quic_ssreeela@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/ahb.c | 30 +++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/drivers/net/wireless/ath/ath12k/ahb.c b/drivers/net/wireless/ath/ath12k/ahb.c
index 74d10af6591f..1015b422e263 100644
--- a/drivers/net/wireless/ath/ath12k/ahb.c
+++ b/drivers/net/wireless/ath/ath12k/ahb.c
@@ -477,6 +477,34 @@ static int ath12k_ahb_power_up(struct ath12k_base *ab)
return ret;
}
+static void ath12k_ahb_power_down(struct ath12k_base *ab, bool is_suspend)
+{
+ struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
+ unsigned long time_left;
+ u32 pasid;
+ int ret;
+
+ qcom_smem_state_update_bits(ab_ahb->stop_state, BIT(ab_ahb->stop_bit),
+ BIT(ab_ahb->stop_bit));
+
+ time_left = wait_for_completion_timeout(&ab_ahb->userpd_stopped,
+ ATH12K_USERPD_STOP_TIMEOUT);
+ if (!time_left) {
+ ath12k_err(ab, "UserPD stop wait timed out\n");
+ return;
+ }
+
+ qcom_smem_state_update_bits(ab_ahb->stop_state, BIT(ab_ahb->stop_bit), 0);
+
+ pasid = (u32_encode_bits(ab_ahb->userpd_id, ATH12K_USERPD_ID_MASK)) |
+ ATH12K_AHB_UPD_SWID;
+ /* Release the firmware */
+ ret = qcom_scm_pas_shutdown(pasid);
+ if (ret)
+ ath12k_err(ab, "scm pas shutdown failed for userPD%d\n",
+ ab_ahb->userpd_id);
+}
+
static void ath12k_ahb_init_qmi_ce_config(struct ath12k_base *ab)
{
struct ath12k_qmi_ce_cfg *cfg = &ab->qmi.ce_cfg;
@@ -695,6 +723,7 @@ static const struct ath12k_hif_ops ath12k_ahb_hif_ops_ipq5332 = {
.irq_disable = ath12k_ahb_ext_irq_disable,
.map_service_to_pipe = ath12k_ahb_map_service_to_pipe,
.power_up = ath12k_ahb_power_up,
+ .power_down = ath12k_ahb_power_down,
};
static irqreturn_t ath12k_userpd_irq_handler(int irq, void *data)
@@ -1173,6 +1202,7 @@ static void ath12k_ahb_remove(struct platform_device *pdev)
struct ath12k_base *ab = platform_get_drvdata(pdev);
if (test_bit(ATH12K_FLAG_QMI_FAIL, &ab->dev_flags)) {
+ ath12k_ahb_power_down(ab, false);
ath12k_qmi_deinit_service(ab);
goto qmi_fail;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v4 13/13] wifi: ath12k: enable ath12k AHB support
2024-12-10 7:41 [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (11 preceding siblings ...)
2024-12-10 7:41 ` [PATCH v4 12/13] wifi: ath12k: Power down userPD Raj Kumar Bhagat
@ 2024-12-10 7:41 ` Raj Kumar Bhagat
2024-12-10 15:08 ` [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Krzysztof Kozlowski
13 siblings, 0 replies; 27+ messages in thread
From: Raj Kumar Bhagat @ 2024-12-10 7:41 UTC (permalink / raw)
To: ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree,
Balamurugan S, P Praneesh, Raj Kumar Bhagat
From: Balamurugan S <quic_bselvara@quicinc.com>
Currently only PCI devices are supported in Ath12k driver. Refactor
Ath12k module_init and module_exit to include Ath12k AHB support.
Add Ath12k AHB support in Kconfig with dependency on Remoteproc
driver. Ath12k AHB support relies on remoteproc driver for firmware
download, power up/down etc.
Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1
Signed-off-by: Balamurugan S <quic_bselvara@quicinc.com>
Co-developed-by: P Praneesh <quic_ppranees@quicinc.com>
Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
---
drivers/net/wireless/ath/ath12k/Kconfig | 6 ++++
drivers/net/wireless/ath/ath12k/Makefile | 1 +
drivers/net/wireless/ath/ath12k/ahb.h | 12 ++++++++
drivers/net/wireless/ath/ath12k/core.c | 35 ++++++++++++++++++++++--
drivers/net/wireless/ath/ath12k/pci.c | 12 ++------
drivers/net/wireless/ath/ath12k/pci.h | 2 ++
6 files changed, 56 insertions(+), 12 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/Kconfig b/drivers/net/wireless/ath/ath12k/Kconfig
index 52a1bb19e3da..b2bfcaca00b3 100644
--- a/drivers/net/wireless/ath/ath12k/Kconfig
+++ b/drivers/net/wireless/ath/ath12k/Kconfig
@@ -15,6 +15,12 @@ config ATH12K
If you choose to build a module, it'll be called ath12k.
+config ATH12K_AHB
+ bool "QTI ath12k AHB support"
+ depends on ATH12K && REMOTEPROC && QCOM_Q6V5_WCSS_SEC
+ help
+ Enable support for Ath12k AHB bus chipsets, example IPQ5332.
+
config ATH12K_DEBUG
bool "ath12k debugging"
depends on ATH12K
diff --git a/drivers/net/wireless/ath/ath12k/Makefile b/drivers/net/wireless/ath/ath12k/Makefile
index b5bb3e2599cd..4aeb6b95baa4 100644
--- a/drivers/net/wireless/ath/ath12k/Makefile
+++ b/drivers/net/wireless/ath/ath12k/Makefile
@@ -23,6 +23,7 @@ ath12k-y += core.o \
fw.o \
p2p.o
+ath12k-$(CONFIG_ATH12K_AHB) += ahb.o
ath12k-$(CONFIG_ATH12K_DEBUGFS) += debugfs.o debugfs_htt_stats.o
ath12k-$(CONFIG_ACPI) += acpi.o
ath12k-$(CONFIG_ATH12K_TRACING) += trace.o
diff --git a/drivers/net/wireless/ath/ath12k/ahb.h b/drivers/net/wireless/ath/ath12k/ahb.h
index 0dbbbfd45eab..fc21211c01dd 100644
--- a/drivers/net/wireless/ath/ath12k/ahb.h
+++ b/drivers/net/wireless/ath/ath12k/ahb.h
@@ -65,4 +65,16 @@ static inline struct ath12k_ahb *ath12k_ab_to_ahb(struct ath12k_base *ab)
return (struct ath12k_ahb *)ab->drv_priv;
}
+#ifdef CONFIG_ATH12K_AHB
+int ath12k_ahb_init(void);
+void ath12k_ahb_exit(void);
+#else
+static inline int ath12k_ahb_init(void)
+{
+ return 0;
+}
+
+static inline void ath12k_ahb_exit(void) {};
+#endif
+
#endif
diff --git a/drivers/net/wireless/ath/ath12k/core.c b/drivers/net/wireless/ath/ath12k/core.c
index 49d1ac15cb7a..941924630bcb 100644
--- a/drivers/net/wireless/ath/ath12k/core.c
+++ b/drivers/net/wireless/ath/ath12k/core.c
@@ -9,15 +9,18 @@
#include <linux/remoteproc.h>
#include <linux/firmware.h>
#include <linux/of.h>
+#include "ahb.h"
#include "core.h"
#include "dp_tx.h"
#include "dp_rx.h"
#include "debug.h"
-#include "hif.h"
-#include "fw.h"
#include "debugfs.h"
+#include "fw.h"
+#include "hif.h"
+#include "pci.h"
#include "wow.h"
+static int ahb_err, pci_err;
unsigned int ath12k_debug_mask;
module_param_named(debug_mask, ath12k_debug_mask, uint, 0644);
MODULE_PARM_DESC(debug_mask, "Debugging mask");
@@ -1685,5 +1688,31 @@ struct ath12k_base *ath12k_core_alloc(struct device *dev, size_t priv_size,
return NULL;
}
-MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11be wireless LAN cards.");
+static int ath12k_init(void)
+{
+ ahb_err = ath12k_ahb_init();
+ if (ahb_err)
+ pr_warn("Failed to initialize ath12k AHB device: %d\n", ahb_err);
+
+ pci_err = ath12k_pci_init();
+ if (pci_err)
+ pr_warn("Failed to initialize ath12k PCI device: %d\n", pci_err);
+
+ /* If both failed, return one of the failures (arbitrary) */
+ return ahb_err && pci_err ? ahb_err : 0;
+}
+
+static void ath12k_exit(void)
+{
+ if (!pci_err)
+ ath12k_pci_exit();
+
+ if (!ahb_err)
+ ath12k_ahb_exit();
+}
+
+module_init(ath12k_init)
+module_exit(ath12k_exit)
+
+MODULE_DESCRIPTION("Driver support for Qualcomm Technologies 802.11be WLAN devices");
MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/ath/ath12k/pci.c b/drivers/net/wireless/ath/ath12k/pci.c
index 06cff3849ab8..a5ae66f0ee1f 100644
--- a/drivers/net/wireless/ath/ath12k/pci.c
+++ b/drivers/net/wireless/ath/ath12k/pci.c
@@ -1821,7 +1821,7 @@ static struct pci_driver ath12k_pci_driver = {
.driver.pm = &ath12k_pci_pm_ops,
};
-static int ath12k_pci_init(void)
+int ath12k_pci_init(void)
{
int ret;
@@ -1832,16 +1832,10 @@ static int ath12k_pci_init(void)
return ret;
}
- return 0;
+ return ret;
}
-module_init(ath12k_pci_init);
-static void ath12k_pci_exit(void)
+void ath12k_pci_exit(void)
{
pci_unregister_driver(&ath12k_pci_driver);
}
-
-module_exit(ath12k_pci_exit);
-
-MODULE_DESCRIPTION("Driver support for Qualcomm Technologies PCIe 802.11be WLAN devices");
-MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/ath/ath12k/pci.h b/drivers/net/wireless/ath/ath12k/pci.h
index 31584a7ad80e..18648ca11dfc 100644
--- a/drivers/net/wireless/ath/ath12k/pci.h
+++ b/drivers/net/wireless/ath/ath12k/pci.h
@@ -145,4 +145,6 @@ void ath12k_pci_stop(struct ath12k_base *ab);
int ath12k_pci_start(struct ath12k_base *ab);
int ath12k_pci_power_up(struct ath12k_base *ab);
void ath12k_pci_power_down(struct ath12k_base *ab, bool is_suspend);
+int ath12k_pci_init(void);
+void ath12k_pci_exit(void);
#endif /* ATH12K_PCI_H */
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH v4 07/13] wifi: ath12k: add support for fixed QMI firmware memory
2024-12-10 7:41 ` [PATCH v4 07/13] wifi: ath12k: add support for fixed QMI firmware memory Raj Kumar Bhagat
@ 2024-12-10 14:43 ` Krzysztof Kozlowski
2024-12-10 17:00 ` Raj Kumar Bhagat
0 siblings, 1 reply; 27+ messages in thread
From: Krzysztof Kozlowski @ 2024-12-10 14:43 UTC (permalink / raw)
To: Raj Kumar Bhagat, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree
On 10/12/2024 08:41, Raj Kumar Bhagat wrote:
> + case CALDB_MEM_REGION_TYPE:
> + /* Cold boot calibration is not enabled in Ath12k. Hence,
> + * assign paddr = 0.
> + * Once cold boot calibration is enabled add support to
> + * assign reserved memory from DT.
> + */
> + ab->qmi.target_mem[idx].paddr = 0;
> + ab->qmi.target_mem[idx].v.ioaddr = NULL;
> + ab->qmi.target_mem[idx].size = ab->qmi.target_mem[i].size;
> + ab->qmi.target_mem[idx].type = ab->qmi.target_mem[i].type;
> + idx++;
> + break;
> + case M3_DUMP_REGION_TYPE:
> + dev_node = of_find_node_by_name(NULL, "m3_dump");
NAK
That's neither correct name nor documented in the bindings. You created
now undocumented ABI. Even with incorrect name. :/
> + if (!dev_node || of_address_to_resource(dev_node, 0, &m3_res)) {
> + ath12k_err(ab, "m3_dump not defined in device-tree\n");
> + ret = -EINVAL;
> + goto out;
> + }
> +
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v4 08/13] wifi: ath12k: add AHB driver support for IPQ5332
2024-12-10 7:41 ` [PATCH v4 08/13] wifi: ath12k: add AHB driver support for IPQ5332 Raj Kumar Bhagat
@ 2024-12-10 14:47 ` Krzysztof Kozlowski
2025-01-29 18:28 ` Raj Kumar Bhagat
0 siblings, 1 reply; 27+ messages in thread
From: Krzysztof Kozlowski @ 2024-12-10 14:47 UTC (permalink / raw)
To: Raj Kumar Bhagat, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree,
Balamurugan S, P Praneesh
On 10/12/2024 08:41, Raj Kumar Bhagat wrote:
> From: Balamurugan S <quic_bselvara@quicinc.com>
>
> Add Initial Ath12k AHB driver support for IPQ5332. IPQ5332 is AHB
> based IEEE802.11be 2 GHz 2x2 WiFi device.
>
> Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
> Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1
>
> Signed-off-by: Balamurugan S <quic_bselvara@quicinc.com>
> Co-developed-by: P Praneesh <quic_ppranees@quicinc.com>
> Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
> Co-developed-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
> Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
> ---
> drivers/net/wireless/ath/ath12k/ahb.c | 878 +++++++++++++++++++++++++
> drivers/net/wireless/ath/ath12k/ahb.h | 37 ++
> drivers/net/wireless/ath/ath12k/core.h | 4 +
> drivers/net/wireless/ath/ath12k/hal.h | 1 +
> drivers/net/wireless/ath/ath12k/hw.h | 1 +
> 5 files changed, 921 insertions(+)
> create mode 100644 drivers/net/wireless/ath/ath12k/ahb.c
> create mode 100644 drivers/net/wireless/ath/ath12k/ahb.h
>
> diff --git a/drivers/net/wireless/ath/ath12k/ahb.c b/drivers/net/wireless/ath/ath12k/ahb.c
> new file mode 100644
> index 000000000000..fcd949faea9f
> --- /dev/null
> +++ b/drivers/net/wireless/ath/ath12k/ahb.c
> @@ -0,0 +1,878 @@
> +// SPDX-License-Identifier: BSD-3-Clause-Clear
> +/*
> + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
> + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
> + */
> +
> +#include <linux/dma-mapping.h>
> +#include <linux/iommu.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
You don't use this header.
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +#include <linux/remoteproc.h>
More headers here look unused.
> +#include <linux/soc/qcom/smem.h>
> +#include <linux/soc/qcom/smem_state.h>
> +#include "ahb.h"
> +#include "debug.h"
> +#include "hif.h"
> +
> +static const struct of_device_id ath12k_ahb_of_match[] = {
> + { .compatible = "qcom,ipq5332-wifi",
> + .data = (void *)ATH12K_HW_IPQ5332_HW10,
> + },
> + { }
> +};
> +
> +MODULE_DEVICE_TABLE(of, ath12k_ahb_of_match);
This goes to driver struct declaration. It is really unusual to see it
in some other places.
> +
> +#define ATH12K_IRQ_CE0_OFFSET 4
> +
...
> +
> +static int ath12k_ahb_probe(struct platform_device *pdev)
> +{
> + struct ath12k_base *ab;
> + const struct ath12k_hif_ops *hif_ops;
> + struct device_node *mem_node;
> + enum ath12k_hw_rev hw_rev;
> + u32 addr;
> + int ret;
> +
> + hw_rev = ath12k_ahb_get_hw_rev(pdev);
> + switch (hw_rev) {
> + case ATH12K_HW_IPQ5332_HW10:
> + hif_ops = &ath12k_ahb_hif_ops_ipq5332;
> + break;
> + default:
> + dev_err(&pdev->dev, "Unsupported device type %d\n", hw_rev);
You already print once in ath12k_ahb_get_hw_rev() and none of these can
happen. No need to print impossible conditions at all. No need to print
impossible things twice.
> + return -EOPNOTSUPP;
> + }
> +
> + ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
> + if (ret) {
> + dev_err(&pdev->dev, "Failed to set 32-bit coherent dma\n");
> + return ret;
> + }
> +
> + ab = ath12k_core_alloc(&pdev->dev, sizeof(struct ath12k_ahb),
> + ATH12K_BUS_AHB);
> + if (!ab) {
> + dev_err(&pdev->dev, "failed to allocate ath12k base\n");
> + return -ENOMEM;
> + }
> +
> + ab->hif.ops = hif_ops;
> + ab->pdev = pdev;
> + ab->hw_rev = hw_rev;
> + platform_set_drvdata(pdev, ab);
> +
> + /* Set fixed_mem_region to true for platforms that support fixed memory
> + * reservation from DT. If memory is reserved from DT for FW, ath12k driver
> + * need not to allocate memory.
> + */
> + if (!of_property_read_u32(ab->dev->of_node, "memory-region", &addr)) {
> + set_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags);
> +
> + /* If the platform supports fixed memory, then it should define/
> + * reserve MLO global memory in DT to support Multi Link Operation
> + * (IEEE 802.11be).
> + * If MLO global memory is not reserved in fixed memory mode, then
> + * MLO cannot be supported.
> + */
> + mem_node = of_find_node_by_name(NULL, "mlo_global_mem_0");
NAK. Incorrect name, not conforming to coding style. Undocumented ABI.
Drop all calls to of_find_node_by_name() or any other stuff like this.
> + if (!mem_node)
> + ab->single_chip_mlo_supp = false;
> + }
> +
> + ret = ath12k_core_pre_init(ab);
> + if (ret)
> + goto err_core_free;
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v4 09/13] wifi: ath12k: Power up root PD
2024-12-10 7:41 ` [PATCH v4 09/13] wifi: ath12k: Power up root PD Raj Kumar Bhagat
@ 2024-12-10 14:50 ` Krzysztof Kozlowski
2025-01-29 18:32 ` Raj Kumar Bhagat
0 siblings, 1 reply; 27+ messages in thread
From: Krzysztof Kozlowski @ 2024-12-10 14:50 UTC (permalink / raw)
To: Raj Kumar Bhagat, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree,
Sowmiya Sree Elavalagan
On 10/12/2024 08:41, Raj Kumar Bhagat wrote:
> +
> +static void ath12k_ahb_unregister_rproc_notifier(struct ath12k_base *ab)
> +{
> + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
> +
> + if (!ab_ahb->root_pd_notifier) {
> + ath12k_err(ab, "Rproc notifier not registered\n");
> + return;
> + }
> +
> + qcom_unregister_ssr_notifier(ab_ahb->root_pd_notifier,
> + &ab_ahb->root_pd_nb);
> +}
> +
> +static int ath12k_ahb_get_rproc(struct ath12k_base *ab)
> +{
> + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
> + struct device *dev = ab->dev;
> + struct rproc *prproc;
> + phandle rproc_phandle;
> +
> + if (of_property_read_u32(dev->of_node, "qcom,rproc", &rproc_phandle)) {
You are not supposed to read phandles as numbers but use proper phandle
parsing API. See of.h, e.g. of_parse_phandle.
> + ath12k_err(ab, "failed to get q6_rproc handle\n");
> + return -ENOENT;
> + }
> +
> + prproc = rproc_get_by_phandle(rproc_phandle);
> + if (!prproc) {
> + ath12k_err(ab, "failed to get rproc\n");
This is supposed to be dev_err_probe. Lack of handling deferred probes
and resulting dmesg flood is all over your code. You need to start
supporting defer.
> + return -EINVAL;
> + }
> + ab_ahb->tgt_rproc = prproc;
> +
> + return 0;
> +}
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v4 11/13] wifi: ath12k: Power up userPD
2024-12-10 7:41 ` [PATCH v4 11/13] wifi: ath12k: Power up userPD Raj Kumar Bhagat
@ 2024-12-10 14:52 ` Krzysztof Kozlowski
2025-01-29 18:34 ` Raj Kumar Bhagat
0 siblings, 1 reply; 27+ messages in thread
From: Krzysztof Kozlowski @ 2024-12-10 14:52 UTC (permalink / raw)
To: Raj Kumar Bhagat, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree,
Sowmiya Sree Elavalagan
On 10/12/2024 08:41, Raj Kumar Bhagat wrote:
> +
> + time_left = wait_for_completion_timeout(&ab_ahb->userpd_ready,
> + ATH12K_USERPD_READY_TIMEOUT);
> + if (!time_left) {
> + ath12k_err(ab, "UserPD ready wait timed out\n");
> + ret = -ETIMEDOUT;
> + goto err_fw2;
> + }
> +
> + qcom_smem_state_update_bits(ab_ahb->spawn_state, BIT(ab_ahb->spawn_bit), 0);
> +
> + ath12k_info(ab, "UserPD%d is now UP\n", ab_ahb->userpd_id);
Don't bug users with success messages. Your driver is supposed to be
silent on success.
> +
> +err_fw2:
> + release_firmware(fw2);
> +err_fw:
> + release_firmware(fw);
> + return ret;
> +}
> +
> static void ath12k_ahb_init_qmi_ce_config(struct ath12k_base *ab)
> {
> struct ath12k_qmi_ce_cfg *cfg = &ab->qmi.ce_cfg;
> @@ -557,6 +694,7 @@ static const struct ath12k_hif_ops ath12k_ahb_hif_ops_ipq5332 = {
> .irq_enable = ath12k_ahb_ext_irq_enable,
> .irq_disable = ath12k_ahb_ext_irq_disable,
> .map_service_to_pipe = ath12k_ahb_map_service_to_pipe,
> + .power_up = ath12k_ahb_power_up,
> };
>
> static irqreturn_t ath12k_userpd_irq_handler(int irq, void *data)
> diff --git a/drivers/net/wireless/ath/ath12k/ahb.h b/drivers/net/wireless/ath/ath12k/ahb.h
> index 0999e2bbe970..0dbbbfd45eab 100644
> --- a/drivers/net/wireless/ath/ath12k/ahb.h
> +++ b/drivers/net/wireless/ath/ath12k/ahb.h
> @@ -19,7 +19,15 @@
> #define ATH12K_PCI_IRQ_CE0_OFFSET 3
> #define ATH12K_ROOTPD_READY_TIMEOUT (5 * HZ)
> #define ATH12K_RPROC_AFTER_POWERUP QCOM_SSR_AFTER_POWERUP
> -
Why? You just added this line in previous commits.
> +#define ATH12K_AHB_FW_PREFIX "q6_fw"
> +#define ATH12K_AHB_FW_SUFFIX ".mdt"
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332
2024-12-10 7:41 [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
` (12 preceding siblings ...)
2024-12-10 7:41 ` [PATCH v4 13/13] wifi: ath12k: enable ath12k AHB support Raj Kumar Bhagat
@ 2024-12-10 15:08 ` Krzysztof Kozlowski
2024-12-10 15:12 ` Krzysztof Kozlowski
13 siblings, 1 reply; 27+ messages in thread
From: Krzysztof Kozlowski @ 2024-12-10 15:08 UTC (permalink / raw)
To: Raj Kumar Bhagat, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree
On 10/12/2024 08:41, Raj Kumar Bhagat wrote:
> Currently, Ath12k driver only supports WiFi devices that are based on
> PCI bus. New Ath12k device IPQ5332 is based on AHB bus. Hence, add
> Ath12k AHB support for IPQ5332.
>
> IPQ5332 is IEEE802.11be 2 GHz 2x2 Wifi device. To bring-up IPQ5332
> device:
> - Add hardware parameters for IPQ5332.
> - CE register address space in IPQ5332 is separate from WCSS register
> space. Hence, add logic to remap CE register address.
> - Add support for fixed QMI firmware memory for IPQ5332.
> - Support userPD handling for WCSS secure PIL driver to enable ath12k
> AHB support.
>
> v4:
> - Missed to include some review list in v3. Hence sending v4 with
> all review list as per - scripts/get_maintainers.pl
>
The amount of undocumented ABI you add here, points to the problem that
either your drivers don't work or your drivers would never work with
upstream. Why? Because either you would have wrong DTS or drivers not
matching DTS, thus not working.
Please point us to your upstream DTS implementing (and working 100%)
this ABI, so we can review that you do not sneak more broken or
undocumented things. I will NAK also future submissions without above,
because I believe you usptream something which will not work.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332
2024-12-10 15:08 ` [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Krzysztof Kozlowski
@ 2024-12-10 15:12 ` Krzysztof Kozlowski
2025-01-28 9:16 ` Raj Kumar Bhagat
0 siblings, 1 reply; 27+ messages in thread
From: Krzysztof Kozlowski @ 2024-12-10 15:12 UTC (permalink / raw)
To: Raj Kumar Bhagat, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree
On 10/12/2024 16:08, Krzysztof Kozlowski wrote:
> On 10/12/2024 08:41, Raj Kumar Bhagat wrote:
>> Currently, Ath12k driver only supports WiFi devices that are based on
>> PCI bus. New Ath12k device IPQ5332 is based on AHB bus. Hence, add
>> Ath12k AHB support for IPQ5332.
>>
>> IPQ5332 is IEEE802.11be 2 GHz 2x2 Wifi device. To bring-up IPQ5332
>> device:
>> - Add hardware parameters for IPQ5332.
>> - CE register address space in IPQ5332 is separate from WCSS register
>> space. Hence, add logic to remap CE register address.
>> - Add support for fixed QMI firmware memory for IPQ5332.
>> - Support userPD handling for WCSS secure PIL driver to enable ath12k
>> AHB support.
>>
>> v4:
>> - Missed to include some review list in v3. Hence sending v4 with
>> all review list as per - scripts/get_maintainers.pl
>>
> The amount of undocumented ABI you add here, points to the problem that
> either your drivers don't work or your drivers would never work with
> upstream. Why? Because either you would have wrong DTS or drivers not
> matching DTS, thus not working.
>
> Please point us to your upstream DTS implementing (and working 100%)
> this ABI, so we can review that you do not sneak more broken or
> undocumented things. I will NAK also future submissions without above,
> because I believe you usptream something which will not work.
I dug a bit and I found your earlier v2:
https://lore.kernel.org/all/20241015182637.955753-3-quic_rajkbhag@quicinc.com/
which confirms:
1. DTS not following coding style, so not possible to accept
2. Driver relying on that exact DTS, so not really working.
Please post in separate series updated DTS, after fixing all the issues
pointed out by DTS coding style.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v4 07/13] wifi: ath12k: add support for fixed QMI firmware memory
2024-12-10 14:43 ` Krzysztof Kozlowski
@ 2024-12-10 17:00 ` Raj Kumar Bhagat
2024-12-11 8:52 ` Krzysztof Kozlowski
0 siblings, 1 reply; 27+ messages in thread
From: Raj Kumar Bhagat @ 2024-12-10 17:00 UTC (permalink / raw)
To: Krzysztof Kozlowski, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree
On 12/10/2024 8:13 PM, Krzysztof Kozlowski wrote:
> On 10/12/2024 08:41, Raj Kumar Bhagat wrote:
>> + case CALDB_MEM_REGION_TYPE:
>> + /* Cold boot calibration is not enabled in Ath12k. Hence,
>> + * assign paddr = 0.
>> + * Once cold boot calibration is enabled add support to
>> + * assign reserved memory from DT.
>> + */
>> + ab->qmi.target_mem[idx].paddr = 0;
>> + ab->qmi.target_mem[idx].v.ioaddr = NULL;
>> + ab->qmi.target_mem[idx].size = ab->qmi.target_mem[i].size;
>> + ab->qmi.target_mem[idx].type = ab->qmi.target_mem[i].type;
>> + idx++;
>> + break;
>> + case M3_DUMP_REGION_TYPE:
>> + dev_node = of_find_node_by_name(NULL, "m3_dump");
>
> NAK
>
> That's neither correct name nor documented in the bindings. You created
> now undocumented ABI. Even with incorrect name. :/
>
Most of the Device Tree related concern in this series are from the
undocumented ABIs and wrong naming (use of '_' instead of '-'):
"m3_dump" and "mlo_global_mem_0".
To address the undocumented ABIs, "memory-region" and "memory-region-names"
should be used to reference all the reserved memory required. This should
include "m3_dump" and "mlo_global_mem_0" memory region.
If the above approach valid to address undocumented ABIs?
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v4 07/13] wifi: ath12k: add support for fixed QMI firmware memory
2024-12-10 17:00 ` Raj Kumar Bhagat
@ 2024-12-11 8:52 ` Krzysztof Kozlowski
0 siblings, 0 replies; 27+ messages in thread
From: Krzysztof Kozlowski @ 2024-12-11 8:52 UTC (permalink / raw)
To: Raj Kumar Bhagat
Cc: ath12k, linux-wireless, Kalle Valo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Jeff Johnson, linux-kernel,
devicetree
On Tue, Dec 10, 2024 at 10:30:54PM +0530, Raj Kumar Bhagat wrote:
> On 12/10/2024 8:13 PM, Krzysztof Kozlowski wrote:
> > On 10/12/2024 08:41, Raj Kumar Bhagat wrote:
> >> + case CALDB_MEM_REGION_TYPE:
> >> + /* Cold boot calibration is not enabled in Ath12k. Hence,
> >> + * assign paddr = 0.
> >> + * Once cold boot calibration is enabled add support to
> >> + * assign reserved memory from DT.
> >> + */
> >> + ab->qmi.target_mem[idx].paddr = 0;
> >> + ab->qmi.target_mem[idx].v.ioaddr = NULL;
> >> + ab->qmi.target_mem[idx].size = ab->qmi.target_mem[i].size;
> >> + ab->qmi.target_mem[idx].type = ab->qmi.target_mem[i].type;
> >> + idx++;
> >> + break;
> >> + case M3_DUMP_REGION_TYPE:
> >> + dev_node = of_find_node_by_name(NULL, "m3_dump");
> >
> > NAK
> >
> > That's neither correct name nor documented in the bindings. You created
> > now undocumented ABI. Even with incorrect name. :/
> >
>
> Most of the Device Tree related concern in this series are from the
> undocumented ABIs and wrong naming (use of '_' instead of '-'):
> "m3_dump" and "mlo_global_mem_0".
>
> To address the undocumented ABIs, "memory-region" and "memory-region-names"
> should be used to reference all the reserved memory required. This should
> include "m3_dump" and "mlo_global_mem_0" memory region.
You already use them, so this code here and explanation is confusing.
>
> If the above approach valid to address undocumented ABIs?
Dunno. Change all node names, run dtbs_check. Do you see errors? Now run
your driver. Does it work correctly? If yes, then ABI seems documented.
If not, ABI is not documented.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332
2024-12-10 15:12 ` Krzysztof Kozlowski
@ 2025-01-28 9:16 ` Raj Kumar Bhagat
2025-01-28 9:20 ` Krzysztof Kozlowski
0 siblings, 1 reply; 27+ messages in thread
From: Raj Kumar Bhagat @ 2025-01-28 9:16 UTC (permalink / raw)
To: Krzysztof Kozlowski, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree
On 12/10/2024 8:42 PM, Krzysztof Kozlowski wrote:
> On 10/12/2024 16:08, Krzysztof Kozlowski wrote:
>> On 10/12/2024 08:41, Raj Kumar Bhagat wrote:
>>> Currently, Ath12k driver only supports WiFi devices that are based on
>>> PCI bus. New Ath12k device IPQ5332 is based on AHB bus. Hence, add
>>> Ath12k AHB support for IPQ5332.
>>>
>>> IPQ5332 is IEEE802.11be 2 GHz 2x2 Wifi device. To bring-up IPQ5332
>>> device:
>>> - Add hardware parameters for IPQ5332.
>>> - CE register address space in IPQ5332 is separate from WCSS register
>>> space. Hence, add logic to remap CE register address.
>>> - Add support for fixed QMI firmware memory for IPQ5332.
>>> - Support userPD handling for WCSS secure PIL driver to enable ath12k
>>> AHB support.
>>>
>>> v4:
>>> - Missed to include some review list in v3. Hence sending v4 with
>>> all review list as per - scripts/get_maintainers.pl
>>>
>> The amount of undocumented ABI you add here, points to the problem that
>> either your drivers don't work or your drivers would never work with
>> upstream. Why? Because either you would have wrong DTS or drivers not
>> matching DTS, thus not working.
>>
>> Please point us to your upstream DTS implementing (and working 100%)
>> this ABI, so we can review that you do not sneak more broken or
>> undocumented things. I will NAK also future submissions without above,
>> because I believe you usptream something which will not work.
>
>
> I dug a bit and I found your earlier v2:
> https://lore.kernel.org/all/20241015182637.955753-3-quic_rajkbhag@quicinc.com/
>
> which confirms:
> 1. DTS not following coding style, so not possible to accept
> 2. Driver relying on that exact DTS, so not really working.
>
> Please post in separate series updated DTS, after fixing all the issues
> pointed out by DTS coding style.
>
To fix all the issues in DTS (including undocumented ABIs) we did changes in
dt-binding as well.
The dt-binding and working DTS are now posted as separate series -
https://lore.kernel.org/lkml/20250128091012.2574478-1-quic_rajkbhag@quicinc.com/
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332
2025-01-28 9:16 ` Raj Kumar Bhagat
@ 2025-01-28 9:20 ` Krzysztof Kozlowski
0 siblings, 0 replies; 27+ messages in thread
From: Krzysztof Kozlowski @ 2025-01-28 9:20 UTC (permalink / raw)
To: Raj Kumar Bhagat, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree
On 28/01/2025 10:16, Raj Kumar Bhagat wrote:
> On 12/10/2024 8:42 PM, Krzysztof Kozlowski wrote:
>> On 10/12/2024 16:08, Krzysztof Kozlowski wrote:
>>> On 10/12/2024 08:41, Raj Kumar Bhagat wrote:
>>>> Currently, Ath12k driver only supports WiFi devices that are based on
>>>> PCI bus. New Ath12k device IPQ5332 is based on AHB bus. Hence, add
>>>> Ath12k AHB support for IPQ5332.
>>>>
>>>> IPQ5332 is IEEE802.11be 2 GHz 2x2 Wifi device. To bring-up IPQ5332
>>>> device:
>>>> - Add hardware parameters for IPQ5332.
>>>> - CE register address space in IPQ5332 is separate from WCSS register
>>>> space. Hence, add logic to remap CE register address.
>>>> - Add support for fixed QMI firmware memory for IPQ5332.
>>>> - Support userPD handling for WCSS secure PIL driver to enable ath12k
>>>> AHB support.
>>>>
>>>> v4:
>>>> - Missed to include some review list in v3. Hence sending v4 with
>>>> all review list as per - scripts/get_maintainers.pl
>>>>
>>> The amount of undocumented ABI you add here, points to the problem that
>>> either your drivers don't work or your drivers would never work with
>>> upstream. Why? Because either you would have wrong DTS or drivers not
>>> matching DTS, thus not working.
>>>
>>> Please point us to your upstream DTS implementing (and working 100%)
>>> this ABI, so we can review that you do not sneak more broken or
>>> undocumented things. I will NAK also future submissions without above,
>>> because I believe you usptream something which will not work.
>>
>>
>> I dug a bit and I found your earlier v2:
>> https://lore.kernel.org/all/20241015182637.955753-3-quic_rajkbhag@quicinc.com/
>>
>> which confirms:
>> 1. DTS not following coding style, so not possible to accept
>> 2. Driver relying on that exact DTS, so not really working.
>>
>> Please post in separate series updated DTS, after fixing all the issues
>> pointed out by DTS coding style.
>>
>
> To fix all the issues in DTS (including undocumented ABIs) we did changes in
> dt-binding as well.
>
> The dt-binding and working DTS are now posted as separate series -
> https://lore.kernel.org/lkml/20250128091012.2574478-1-quic_rajkbhag@quicinc.com/
You replied 1.5 months after, so entire context is gone. Anyway, your
DTS does not work.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v4 08/13] wifi: ath12k: add AHB driver support for IPQ5332
2024-12-10 14:47 ` Krzysztof Kozlowski
@ 2025-01-29 18:28 ` Raj Kumar Bhagat
0 siblings, 0 replies; 27+ messages in thread
From: Raj Kumar Bhagat @ 2025-01-29 18:28 UTC (permalink / raw)
To: Krzysztof Kozlowski, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree,
Balamurugan S, P Praneesh
On 12/10/2024 8:17 PM, Krzysztof Kozlowski wrote:
> On 10/12/2024 08:41, Raj Kumar Bhagat wrote:
>> From: Balamurugan S <quic_bselvara@quicinc.com>
>>
>> Add Initial Ath12k AHB driver support for IPQ5332. IPQ5332 is AHB
>> based IEEE802.11be 2 GHz 2x2 WiFi device.
>>
>> Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
>> Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1
>>
>> Signed-off-by: Balamurugan S <quic_bselvara@quicinc.com>
>> Co-developed-by: P Praneesh <quic_ppranees@quicinc.com>
>> Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
>> Co-developed-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
>> Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
>> ---
>> drivers/net/wireless/ath/ath12k/ahb.c | 878 +++++++++++++++++++++++++
>> drivers/net/wireless/ath/ath12k/ahb.h | 37 ++
>> drivers/net/wireless/ath/ath12k/core.h | 4 +
>> drivers/net/wireless/ath/ath12k/hal.h | 1 +
>> drivers/net/wireless/ath/ath12k/hw.h | 1 +
>> 5 files changed, 921 insertions(+)
>> create mode 100644 drivers/net/wireless/ath/ath12k/ahb.c
>> create mode 100644 drivers/net/wireless/ath/ath12k/ahb.h
>>
>> diff --git a/drivers/net/wireless/ath/ath12k/ahb.c b/drivers/net/wireless/ath/ath12k/ahb.c
>> new file mode 100644
>> index 000000000000..fcd949faea9f
>> --- /dev/null
>> +++ b/drivers/net/wireless/ath/ath12k/ahb.c
>> @@ -0,0 +1,878 @@
>> +// SPDX-License-Identifier: BSD-3-Clause-Clear
>> +/*
>> + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
>> + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
>> + */
>> +
>> +#include <linux/dma-mapping.h>
>> +#include <linux/iommu.h>
>> +#include <linux/module.h>
>> +#include <linux/of.h>
>> +#include <linux/of_address.h>
>
> You don't use this header.
>
>> +#include <linux/of_device.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/remoteproc.h>
>
> More headers here look unused.
>
sure, will remove unused headers in next version.
>> +#include <linux/soc/qcom/smem.h>
>> +#include <linux/soc/qcom/smem_state.h>
>> +#include "ahb.h"
>> +#include "debug.h"
>> +#include "hif.h"
>> +
>> +static const struct of_device_id ath12k_ahb_of_match[] = {
>> + { .compatible = "qcom,ipq5332-wifi",
>> + .data = (void *)ATH12K_HW_IPQ5332_HW10,
>> + },
>> + { }
>> +};
>> +
>> +MODULE_DEVICE_TABLE(of, ath12k_ahb_of_match);
>
> This goes to driver struct declaration. It is really unusual to see it
> in some other places.
>
>
>> +
>> +#define ATH12K_IRQ_CE0_OFFSET 4
>> +
>
>
> ...
>
>> +
>> +static int ath12k_ahb_probe(struct platform_device *pdev)
>> +{
>> + struct ath12k_base *ab;
>> + const struct ath12k_hif_ops *hif_ops;
>> + struct device_node *mem_node;
>> + enum ath12k_hw_rev hw_rev;
>> + u32 addr;
>> + int ret;
>> +
>> + hw_rev = ath12k_ahb_get_hw_rev(pdev);
>> + switch (hw_rev) {
>> + case ATH12K_HW_IPQ5332_HW10:
>> + hif_ops = &ath12k_ahb_hif_ops_ipq5332;
>> + break;
>> + default:
>> + dev_err(&pdev->dev, "Unsupported device type %d\n", hw_rev);
>
> You already print once in ath12k_ahb_get_hw_rev() and none of these can
> happen. No need to print impossible conditions at all. No need to print
> impossible things twice.
>
sure, will drop this print.
>> + return -EOPNOTSUPP;
>> + }
>> +
>
>> + ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
>> + if (ret) {
>> + dev_err(&pdev->dev, "Failed to set 32-bit coherent dma\n");
>> + return ret;
>> + }
>> +
>> + ab = ath12k_core_alloc(&pdev->dev, sizeof(struct ath12k_ahb),
>> + ATH12K_BUS_AHB);
>> + if (!ab) {
>> + dev_err(&pdev->dev, "failed to allocate ath12k base\n");
>> + return -ENOMEM;
>> + }
>> +
>> + ab->hif.ops = hif_ops;
>> + ab->pdev = pdev;
>> + ab->hw_rev = hw_rev;
>> + platform_set_drvdata(pdev, ab);
>> +
>> + /* Set fixed_mem_region to true for platforms that support fixed memory
>> + * reservation from DT. If memory is reserved from DT for FW, ath12k driver
>> + * need not to allocate memory.
>> + */
>> + if (!of_property_read_u32(ab->dev->of_node, "memory-region", &addr)) {
>> + set_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags);
>> +
>> + /* If the platform supports fixed memory, then it should define/
>> + * reserve MLO global memory in DT to support Multi Link Operation
>> + * (IEEE 802.11be).
>> + * If MLO global memory is not reserved in fixed memory mode, then
>> + * MLO cannot be supported.
>> + */
>> + mem_node = of_find_node_by_name(NULL, "mlo_global_mem_0");
>
> NAK. Incorrect name, not conforming to coding style. Undocumented ABI.
>
> Drop all calls to of_find_node_by_name() or any other stuff like this.
>
Sure, will remove all calls to - of_find_node_by_name()
>> + if (!mem_node)
>> + ab->single_chip_mlo_supp = false;
>> + }
>> +
>> + ret = ath12k_core_pre_init(ab);
>> + if (ret)
>> + goto err_core_free;
>
> Best regards,
> Krzysztof
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v4 09/13] wifi: ath12k: Power up root PD
2024-12-10 14:50 ` Krzysztof Kozlowski
@ 2025-01-29 18:32 ` Raj Kumar Bhagat
0 siblings, 0 replies; 27+ messages in thread
From: Raj Kumar Bhagat @ 2025-01-29 18:32 UTC (permalink / raw)
To: Krzysztof Kozlowski, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree,
Sowmiya Sree Elavalagan
On 12/10/2024 8:20 PM, Krzysztof Kozlowski wrote:
> On 10/12/2024 08:41, Raj Kumar Bhagat wrote:
>> +
>> +static void ath12k_ahb_unregister_rproc_notifier(struct ath12k_base *ab)
>> +{
>> + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
>> +
>> + if (!ab_ahb->root_pd_notifier) {
>> + ath12k_err(ab, "Rproc notifier not registered\n");
>> + return;
>> + }
>> +
>> + qcom_unregister_ssr_notifier(ab_ahb->root_pd_notifier,
>> + &ab_ahb->root_pd_nb);
>> +}
>> +
>> +static int ath12k_ahb_get_rproc(struct ath12k_base *ab)
>> +{
>> + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);
>> + struct device *dev = ab->dev;
>> + struct rproc *prproc;
>> + phandle rproc_phandle;
>> +
>> + if (of_property_read_u32(dev->of_node, "qcom,rproc", &rproc_phandle)) {
>
> You are not supposed to read phandles as numbers but use proper phandle
> parsing API. See of.h, e.g. of_parse_phandle.
>
will use of_parse_phandle() in next version.
>> + ath12k_err(ab, "failed to get q6_rproc handle\n");
>> + return -ENOENT;
>> + }
>> +
>> + prproc = rproc_get_by_phandle(rproc_phandle);
>> + if (!prproc) {
>> + ath12k_err(ab, "failed to get rproc\n");
>
> This is supposed to be dev_err_probe. Lack of handling deferred probes
> and resulting dmesg flood is all over your code. You need to start
> supporting defer.
>
Sure, will use dev_err_probe() in next version for all applicable probe error log.
>> + return -EINVAL;
>> + }
>> + ab_ahb->tgt_rproc = prproc;
>> +
>> + return 0;
>> +}
>
>
>
>
> Best regards,
> Krzysztof
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v4 11/13] wifi: ath12k: Power up userPD
2024-12-10 14:52 ` Krzysztof Kozlowski
@ 2025-01-29 18:34 ` Raj Kumar Bhagat
0 siblings, 0 replies; 27+ messages in thread
From: Raj Kumar Bhagat @ 2025-01-29 18:34 UTC (permalink / raw)
To: Krzysztof Kozlowski, ath12k
Cc: linux-wireless, Kalle Valo, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jeff Johnson, linux-kernel, devicetree,
Sowmiya Sree Elavalagan
On 12/10/2024 8:22 PM, Krzysztof Kozlowski wrote:
> On 10/12/2024 08:41, Raj Kumar Bhagat wrote:
>> +
>> + time_left = wait_for_completion_timeout(&ab_ahb->userpd_ready,
>> + ATH12K_USERPD_READY_TIMEOUT);
>> + if (!time_left) {
>> + ath12k_err(ab, "UserPD ready wait timed out\n");
>> + ret = -ETIMEDOUT;
>> + goto err_fw2;
>> + }
>> +
>> + qcom_smem_state_update_bits(ab_ahb->spawn_state, BIT(ab_ahb->spawn_bit), 0);
>> +
>> + ath12k_info(ab, "UserPD%d is now UP\n", ab_ahb->userpd_id);
>
> Don't bug users with success messages. Your driver is supposed to be
> silent on success.
>
sure, will move this to ath12k_dbg() print.
>> +
>> +err_fw2:
>> + release_firmware(fw2);
>> +err_fw:
>> + release_firmware(fw);
>> + return ret;
>> +}
>> +
>> static void ath12k_ahb_init_qmi_ce_config(struct ath12k_base *ab)
>> {
>> struct ath12k_qmi_ce_cfg *cfg = &ab->qmi.ce_cfg;
>> @@ -557,6 +694,7 @@ static const struct ath12k_hif_ops ath12k_ahb_hif_ops_ipq5332 = {
>> .irq_enable = ath12k_ahb_ext_irq_enable,
>> .irq_disable = ath12k_ahb_ext_irq_disable,
>> .map_service_to_pipe = ath12k_ahb_map_service_to_pipe,
>> + .power_up = ath12k_ahb_power_up,
>> };
>>
>> static irqreturn_t ath12k_userpd_irq_handler(int irq, void *data)
>> diff --git a/drivers/net/wireless/ath/ath12k/ahb.h b/drivers/net/wireless/ath/ath12k/ahb.h
>> index 0999e2bbe970..0dbbbfd45eab 100644
>> --- a/drivers/net/wireless/ath/ath12k/ahb.h
>> +++ b/drivers/net/wireless/ath/ath12k/ahb.h
>> @@ -19,7 +19,15 @@
>> #define ATH12K_PCI_IRQ_CE0_OFFSET 3
>> #define ATH12K_ROOTPD_READY_TIMEOUT (5 * HZ)
>> #define ATH12K_RPROC_AFTER_POWERUP QCOM_SSR_AFTER_POWERUP
>> -
>
> Why? You just added this line in previous commits.
>
will take care in next version.
>> +#define ATH12K_AHB_FW_PREFIX "q6_fw"
>> +#define ATH12K_AHB_FW_SUFFIX ".mdt"
> Best regards,
> Krzysztof
^ permalink raw reply [flat|nested] 27+ messages in thread
end of thread, other threads:[~2025-01-29 18:34 UTC | newest]
Thread overview: 27+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-12-10 7:41 [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 01/13] dt-bindings: net: wireless: describe the ath12k AHB module Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 02/13] wifi: ath12k: fix incorrect CE addresses Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 03/13] wifi: ath12k: refactor ath12k_hw_regs structure Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 04/13] wifi: ath12k: add ath12k_hw_params for IPQ5332 Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 05/13] wifi: ath12k: avoid m3 firmware download in AHB device IPQ5332 Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 06/13] wifi: ath12k: Add hw_params to remap CE register space for IPQ5332 Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 07/13] wifi: ath12k: add support for fixed QMI firmware memory Raj Kumar Bhagat
2024-12-10 14:43 ` Krzysztof Kozlowski
2024-12-10 17:00 ` Raj Kumar Bhagat
2024-12-11 8:52 ` Krzysztof Kozlowski
2024-12-10 7:41 ` [PATCH v4 08/13] wifi: ath12k: add AHB driver support for IPQ5332 Raj Kumar Bhagat
2024-12-10 14:47 ` Krzysztof Kozlowski
2025-01-29 18:28 ` Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 09/13] wifi: ath12k: Power up root PD Raj Kumar Bhagat
2024-12-10 14:50 ` Krzysztof Kozlowski
2025-01-29 18:32 ` Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 10/13] wifi: ath12k: Register various userPD interrupts and save SMEM entries Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 11/13] wifi: ath12k: Power up userPD Raj Kumar Bhagat
2024-12-10 14:52 ` Krzysztof Kozlowski
2025-01-29 18:34 ` Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 12/13] wifi: ath12k: Power down userPD Raj Kumar Bhagat
2024-12-10 7:41 ` [PATCH v4 13/13] wifi: ath12k: enable ath12k AHB support Raj Kumar Bhagat
2024-12-10 15:08 ` [PATCH v4 00/13] wifi: ath12k: add Ath12k AHB driver support for IPQ5332 Krzysztof Kozlowski
2024-12-10 15:12 ` Krzysztof Kozlowski
2025-01-28 9:16 ` Raj Kumar Bhagat
2025-01-28 9:20 ` Krzysztof Kozlowski
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